[Cryptech Tech] dev-bridge board

[Paul Selkirk]

Current status summary: STM32 is talking to the FPGA cores over the FMC
bus. And there was much rejoicing.

To done:
- build Fredrik's self-tests
- integrate fmc with existing cores
- build Rob's libhal tests
- other useful tests

There's now a sw/stm32 repo. I need to reorganize it a bit, and clean up
the Makefile, but it includes both Fredrik's native stm32 self-test
code, and Rob's lihal tests. In the latter case, there is a minimal
wrapper for main(), which sets up the stm32, runs the test, and exits;
to run the test again, you reset the board (e.g. through the st-link).

As an aside, I took some performance numbers for 2 million reads and
writes to a dummy register through libhal:
read:  3.363 seconds,  594707/sec
write: 2.127 seconds,  940291/sec

By contrast, EIM is rather faster:
read:  1.774579 seconds, 1127027/sec
write: 1.696443 seconds, 1178937/sec

I haven't done any analysis yet, just presenting the numbers I
collected. In any case, I don't think the bus is going to be the
bottleneck when we're talking to cores that are actually doing something.

To do:
- cleanup and documentation
- merge activelow branch
- merge modexps6 branch
- merge config_core_selector branch
- request/reply dispatch loop
- ?
- profit

The last bit (dispatch loop) will make the stm32 a front-end to the FPGA
for application software running on a host, talking to the dev-bridge
board over USB. Then the real fun begins.

				paul