[Cryptech Tech] Updated novena noise board

[Jacob]

>> 3. Al caps like C1, C9 (and possibly others) are rated at
>> 1000 hrs. This is considered below par for IT equipment. I suggest minimum
>> 2000 hrs life spec as with the Panasonic EEE-FK1E100R series.
>
> Hmm, hrs as in hours? How is that measured? I must be reading that wrong -
> 1000 hours is just 41 days =).
>
> Anyway, thanks for recommending a specific series.

Yes, as in hours. The life (actually, endurance) is determined by some 
test standards that measure how much time it takes for a specific 
electrolytic capacitor to lose x% of its nominal capacitance and to 
increase its effective resistance by Y% while operating at nominal 
voltage and max rated temp. It's not that the capacitor will 
catastrophically die after that stated time, but it is an indication how 
good it is to keep its capacitance and ESR over time, especially at 
higher temp.
Note that 2000 hrs at 105 deg translates to well over 100,000 hrs at 45 
deg. component case temperature. In well designed electronic boards 
(i.e. no stressed components), the Al electrolytic capacitors are 
usually the first components to go and malfunction the system.

>
>> 4. The ORANGE
>> LED off the -15V rail in the DC-DC supply is not specced out, but I doubt
>> that you would see any light out on a regular led at 1mA current. I suggest
>> to reduce R3 value to 1.5 KOHM to get 8 mA or so through it.
>
> I used to have orange LEDs of unknown spec, but ran out so started using amber
> LEDs instead - also of unknown spec. It does shine quite clearly with 15K,
> although not the brightest level I'm sure. You can see it in this picture:
>
>    https://wiki.cryptech.is/attachment/wiki/WikiStart/trng_on_novena.jpg

Low current LEDS (e.g. 2mA current) are less common than "regular" LEDS. 
Regulars require about 10mA for full brightness, and are normally 
designed for that. But if the existing LEDS are bright enough on that 
board - no problem!

.
>
>> Layout:

>
>> 3. Why are the footprint of JP1 and JP2 not in-line?
>
> It simplifies mounting of 100-mil pin headers to have the holes slightly
> offset. The pins won't wobble around as much while soldering them. You can
> actually get the headers at something very close to 90 degrees like that,
> instead of 82-99 degrees ;).
>
> The footprints are from the SparkFun Eagle library if I remember correctly.

I am used to buying connectors with 1st and last pins crimped in order 
to keep them well inserted and vertical before soldering. Nice trick 
though, especially for a shoe-string operation :-)

>
>> 4. Missing fiducials for assembly
>
> Right. Can those be placed arbitrarily, or are there standard distances,
> regions etc.? Is three a good number? What size ought they be?
>

Fiducials should be placed arbitrarily on the board, min of 3 on each 
mounting side. However, they ideally should be the vertices of a very 
rough equilateral triangle.  Normally we keep the side length of the 
triangle at about 3-6 cm. If the PCB is large, we put more fiducials so 
the assembly house can home on any triangle that it likes that will 
circumscribe the SMD in the region to be placed. Near fine-pitch 
components you need to put at least 2 extra fiducials on the package 
diagonal and outside the chip/connector packaging.

Good fiducials are SMD 40 mil diameter with 80-120 mil clearance circle. 
Clearance is from solder mask and from any other copper/via or silk, and 
preferably cleared on both layers.
Ref Des them as FID1 FID2 etc so they are clear in the BOM.

>
>> 6. Should design in some openings in the soldemask of the connector pads. As
>> it is now, there is a danger of shorts during assembly.
>
> Sorry, this one I don't understand?
>

If you look at the Soldermask and copper Gerbers where the big connector 
is mounted, you see that the Solder Mask (SM) for each connector pin is 
overlapping its neighbor, which means no soldermask dam between pins, 
which means a possible danger of solder shorts during assembly.
You need to have a soldermask opening 2 mils over the pad on each side 
of the pad, with at least 4 mils separation (dam) between adjacent 
openings (this is a bit confusing since SM gerbers are negatives). This 
means that the distance between connector pins, edge to closest edge 
(i.e. pads clearance), should be more than 2+2+4 = 8 mils. If the 
connector is fine-pitch and you reduced the pads width as much as 
possible but still have clearance between pads < 8 mil, you need to talk 
to your board fab house AND assembler to get a recommendation. the 
choices are either to go with an expensive SM process, or to forgo the 
separation and pay for a very delicate assembly job and possible 
rejects. See attached pic.

>
>> 8.I have some issues with the acute angle of some of the
>> traces, but not to such a concern to flag them out now.
>
> If it's not too much trouble I would appreciate an example pointing out good
> and bad ones. I'm always interested in improving and learing from those more
> experienced =).

See attached pic. Acute angles are difficult-to-rinse pockets during the 
etching process during board fab, and the retained etching solution can 
cause corrosion later on. Also it is a weaker mechanical connection that 
can crack under vibrations in the field.

Jacob


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