[Cryptech Tech] [Cryptech-Commits] [user/sra/aes-keywrap] 01/01: Initial commit of AES Key Wrap implementation.

[Joachim Strömbergson]

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Aloha!

Rob Austein wrote:
> The software version needs a chunk of memory big enough to hold the 
> ciphertext, which will always be a bit larger than the plaintext due 
> to the initialization vector and rounding the plaintext up to the
> next block boundary.  One can move stuff around to do encrypt in
> place, but there's no simple way to avoid the buffer.
> 
> In a hardware version I guess one could unroll the j loop into a 
> series of six stages.  One could almost do the i loop in parallel, 
> except that (I think) one has to serialize the AES operations due to 
> the feedback cycle taking place in the A register.

Yes, I think it is hard to avoid the looping there. The
rotation/movement of words in R should be possible to replace by simple
index increment. But I don't see a way to avoid receiving the complete P
before processing. This means that we need to define a max size of P in
number of 64-bit words.

What would be the proper size? 4096 kbits, 8192, 16384?

The same memory would then be used as output buffer.
The interface would then look something like:

(1) Write n number of words to the keywrap buffer memory.
(2) Write n to the MESSAGE_SIZE register.
(3) Write 0x01 to the control register
(4) Wait for ready bit in status reg to be set.
(5) Read out the result from the buffer memory.

Looks ok?

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
========================================================================
 Joachim Strömbergson          Secworks AB          joachim at secworks.se
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