[Cryptech Tech] [Cryptech Core] alpha board paper sketch

[Joachim Strömbergson]

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Aloha!

Peter Stuge wrote:
> Is AVR8 a Harvard architecture? I think that would be appropriate.

Yes it is a Harvard architecture, clean RISC.


> Why is CPU allowed to send *data* to tamper detector? I would expect 
> one or more discrete signals instead.

The possibility to ask the Tamper detect more info and for development
purposes. Note that that connection can be severed by pulling the
jumpers. For the Beta board this connection might be removed completely.


> Also, should there be a discrete component for 
> monitoring/auditing/accountability, e.g. watching FPGA's MKM use?

Not sure. How would that work?

One thing I've penned into the sketch is the ability to pull MISO low
from the MKM to the tamper detect MCU. That way it should be possible to
write data to the memory (thus destroying any contents), but not read
from the memory.


> And what expectations are there on the two USB-SPI interfaces from
> CPU?

What do you mean by expectations? Speed, functionality, use cases, interop?

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
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 Joachim Strömbergson          Secworks AB          joachim at secworks.se
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