[Cryptech Tech] AES SIV mode for key wrapping?

[Randy Bush]

> Also, if you're encapsulating the whole thing in a tamper-responsive
> mesh as per the recent ATtiny discussion, why do you then need to
> isolate things in the FPGA?

oh goodie, we can fork to a different pissing contest :)

< security superstition >

in the long run, an fpga is far simpler and more regular than an arm soc
with 42 household appliances built in.  there is more of a chance that
the fpga might be at least somewhat auditable.  so instinct causes us to
want to migrate sensitive data to the fpga, even though it may be in the
soc in earlier versions because the roadmap is shorter.

randy