[Cryptech Tech] Alpha status

[Jacob]

I will try to explain while referring to the attached pictures.

1. SignallingLoopConcept.png depicts, in a very conceptual and basic 
form, the current path of a generic signal traveling from a driver gate 
to a receiver gate.
One needs to keep the current flow as short as possible (for proper SI) 
AND to have a current loop area as small as possible (to minimize 
radiated emission).

One also wants to have the lowest possible inductance on the return path 
(i.e. grounds) for proper signalling (hence the use of copper planes).

What happens if the receiver gate (gate B) sees a different ground than 
the driver gate (gate A), e.g. when one gate is connected to GND and the 
other gate to AGND? Let's follow the signal:
Gate A raises a voltage pulse. For that pulse to go downstream and do 
any useful work at gate B, it needs to generate current flow (please 
excuse the unscientific explanation).
Now, to have current flow the signal needs to return to the sender and 
close the flow loop. However, if gate A is connected to GND and gate B 
to AGND (or vice versa), then the pulse signal will exit from the AGND 
pin at receiver gate B and search for a path to the driver gate A's GND 
- as long a path as it takes. If the path is too long, we will have a 
bad circuit (noisy, poor switching waveform, radiating etc.)

2. In our circuit, the two different grounds are only connected together 
under the noise circuit cage, so if you look at NoiseCircuit_PS.jpg you 
see that we have a problem: The local Power Supply for the Noise Circuit 
is actually C4, but it is connected to GND and not to AGND as the rest 
of the noise components.
This is even worse that a driver-receiver couple, since ANY signal 
referencing AGND will not easily find its current supply ground.
In addition, we also lose the isolation between the GND and the AGND 
circuitry.

------FIX----------
Put C4 right at the entry of the analog region, and connect its terminal 
to AGND. This will establish a smaller area current loop between the 
analog PS and its consumers. The filter R6-C4 will serve as the isolator 
between the GND and AGND.
-----------------------------------------

3. Now to U2 - The Digitizer. See Digitizer_CurrentPath.jpg
This part is connected to AGND which is good - it establishes a proper 
ground closure with the noise diodes/amplifier.

However, its output (net DIGITIZER) goes to a far-away FPGA which is 
connected to GND.
That DIGITIZER signal will have hard time, after visiting the FPGA, to 
find its AGND to close the current loop (the DIGITIZER signal, although 
generated by a component referenced to AGND, will travel down over a GND 
reference plane, thus losing any SI benefits). This will also create a 
very large current loop in the process.

--------- FIX-----------
Install a fast optocoupler at the output of U2. This will isolate the 
DIGITIZER/AGND from the DIGITIZER_FPGA/GND. Per scope pictures at the 
wiki, the DIGITIZER frequency is 1-2 MHz. A fast 10 mbps optocoupler 
(several vendors have such parts) will nicely do the job here.
----------------------------------------

NOTE: the above comments on the existing layout do not imply that the 
circuit will not work. However, they do imply that it will probably not 
work well: When you have unfiltered lengthy ground loops outside the 
cage, this causes signal interference and information leakage. Depending 
of the quality of the ground planes, the circuit may not work at all 
under some circumstances (mitigating factor here is the very low 
frequency of signals we deal with here). The proposed 2 fixes will make 
the analog sub-section more robust and less radiating/leaking.

P.S. DA_IF.jpg shows the existing layout of the Digital-Analog Interface 
section (annotated) for reference.

Hope this helps.

Jacob



On 7/24/2015 11:14 AM, Fredrik Thulin wrote:
> On Friday, July 24, 2015 03:30:25 AM Jacob wrote:
>> This is quite encouraging.
>>
>> I wonder if your next phase is to test the noise circuitry with its
>> digitizer. I have had some concerns about the grounds in that circuitry
>> vis a vis its -15V filtered supply.
>
> Having a good entropy source is very important. Please elaborate on your
> concerns and the testing you think should be performed.
>
> /Fredrik

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