[Cryptech Tech] goals / use cases

[Leif Johansson]

On 01/28/2015 03:16 PM, Fredrik Thulin wrote:
> On Thursday, January 29, 2015 03:07:08 AM Peter Gutmann wrote:
>> Leif Johansson <leifj at sunet.se> writes:
>>> On 01/28/2015 09:27 AM, Peter Gutmann wrote:
>>>> In terms of a "roomy and fast CPU", the TI CPU that was mentioned earlier
>>>> already has onboard crypto support for AES and SHA (and other stuff as
>>>> well), if it's supported by the host CPU is there any need to do the
>>>> same in an FPGA? By leaving the host to do bulk encryption operations
>>>> you could save space in the FPGA for things the host can't do natively.
>>>
>>> Do we have source for those functions for review?
>>
>> No, but why would you need that?  Both SHA-1 and AES are totally
>> deterministic, even if the implementation came straight from the NSA, what
>> could they do with it?
> 
> (trying to speak from underneath a big pile of tinfoil)
> 
> If we show the SoC made of stuff that we can't audit the AES/HMAC key, it might 
> exfiltrate it through some kind of side channel - not necessarily in the output 
> of the AES/HMAC operation which, as you say, is totally deterministic.
> 
> /Fredrik
> 

yeah don't underestimate our level of tinfoil :-)