[Cryptech Tech] goals / use cases

Joachim Strömbergson joachim at secworks.se
Sun Jan 25 20:53:50 UTC 2015


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Aloha!

Ben Laurie wrote:
> On 24 January 2015 at 17:40, Fredrik Thulin <fredrik at thulin.net>
> wrote:
>> What methodology can we use to choose MCU? I think the choice at
>> this time is either for an ARM Cortex M4 (later on perhaps upgraded
>> to pin compatible new M7), or Cortex A8/A9. I think both will work
>> for this "not necessarily fast" target, but there would/could be a
>> huge difference in how we do development in the next year or so
>> based on this choice.
> 
> Can I point out CHERI?
> 
> http://www.cl.cam.ac.uk/research/security/ctsrd/cheri/
> 
> In short: a MIPS-64 softcore with a capability coprocessor (i.e. 
> fine-grained [down to the byte] memory controls), a FreeBSD port and 
> LLVM-based toolchain.

Very nice. Skimming the website I don't get a feeling for what FPGA they
have used to implement CHERI on. And how big it is.

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
========================================================================
 Joachim Strömbergson          Secworks AB          joachim at secworks.se
========================================================================
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