[Cryptech Tech] Short note on the current FPGA activities

[Joachim Strömbergson]

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Aloha!

As you probably have seen there has been a series of commits (and more
will happen the next days.) I just wanted to explain what I'm doing.

In the process of getting our cores to work with the EIM interface and
the clocks in the Novena I have ended up with a lot of test stuff. Also,
the general top level of the Novena is somewhat unstructured and fairly
large making it hard to separate what is needed, what needs to be changed.

I therefore decided to do some refactoring and cleanup. The goal is to
have a top level that contains the clock and reset implementation in a
submodule and the complete EIM interface with its associated clock
implementation in second submodule. This leaves the top short and easy
for Novena FPGA implementors to see where to add their own logic.

During the cleanup I'm also fixing warnings and esp looking at the clock
implementation. I've added the generation of a 66 MHz EIM clock in phase
with the 133 MHz clock.

I'm not done the refactoring yet so big parts of the EIM is still left
to add. Hopefylly I will be back at full standard EIM functionality on
Monday. For those that want to look at the code it is here:

http://wiki.cryptech.is/browser/user/js/test/novena_eim_base

It really is a playground - lots of dragons there and not to be used for
anything remotely important.

And yes Rob, another repo. Sorry. We will need to clean up as soon as I
have the EIM issue done.

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
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 Joachim Strömbergson          Secworks AB          joachim at secworks.se
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