[Cryptech Tech] PCB prototyping machine [Was: BCP prototyping machine]

Павел Шатов meisterpaul1 at yandex.ru
Wed Feb 25 19:33:24 UTC 2015



On 25.02.2015 22:02, Benedikt Stockebrand wrote:
> Hi Pavel and list,
>
> Павел Шатов <meisterpaul1 at yandex.ru> writes:
>
>> Yes, having modular design with modules, that can be worked on
>> independently is vital for our project.
>
> good!
>
>>> Put all of that on a single module with only low speed connectors going
>>> off that module?
>>
>> Yes, that is what I suggest. Have you seen my suggestion to use
>> CPU+RAM module from http://www.imx6rex.com/ on the list?
>
> Sorry, but I've missed that one.  OK, so that's at least one option for
> the CPU/RAM part.
>
>> Another module will be the baseboard (carrier), that we will need to
>> develop ourselves, it will require a factory-made PCB.
>
> Out of curiosity: How much bandwidth to we actually need between the
> CPU/RAM part and the FPGA(s)?  I understand that EIM is something other
> than I2C (relax Joachim, everything is fine, no need to get excited:-),
> but what throughput do we actually need/use there?

I asked exactly the same question as I joined this project in December 
:) There's still no clear answer. As far as I understand it depends on 
actual application, so it's better to ask someone who is working on use 
cases.

Current EIM arbiter implementation takes on average 12 BCLK cycles to 
transfer 32 bits of data over EIM. BCLK is now 33 MHz, so the raw 
bandwidth is about 10 megabytes per second right now. This can be 
increased if necessary by changing BCLK to 66 or 133 MHz and switching 
to separate address/data mode from multiplexed address/data mode.

--
With best regards,
Pavel Shatov


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