[Cryptech Tech] Alpha board strategy

[Ben Laurie]

On 17 February 2015 at 20:31, Randy Bush <randy at psg.com> wrote:
>>> More specifically the C7 version:
>>> http://www.altera.com/literature/hb/cyclone-v/cv_51001.pdf
>>>
>>> This device provides 150k logic elements, which is a bit more than 2x
>>> the amount provided by the Xilinx Spartan-6 LX45 on the Novena (if we
>>> allow us to do some apples and pears comparison). We would like to have
>>> the C9 device since it would give us headroom to handle all we think we
>>> want to put in the FPGA with room to spare.
>>
>> Cool. That should be big enough to fit a CHERI CPU. As I mentioned
>> before, I think this is a better option than ARM on account of having
>> a far better memory protection model. Also means you don't have to
>> rely on the CPU being honest (if you believe its hard to subvert an
>> FPGA, that is).
>
> the philosophy seems eminently sensible, but ...
>
> if we want to keep under the pay-for-license ceiling, we are on a tight
> LE budget.  this puts us in a nasty trade-off space.  how many LE does
> a cheri cpu eat?

Apparently it depends, but on the order of 100k.