[Cryptech Tech] First hash via EIM

[Joachim Strömbergson]

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Aloha!

Paul Selkirk wrote:
> The one strange thing I found (which you can see in core_selector.v)
> is that I wasn't able to use (sys_eim_wr|sys_eim_rd) for cs, but had
> to rely solely on sys_eim_addr. I noticed that Joachim basically did
> the same thing in his earlier version. I haven't looked to see if the
> timing is different for the rd/wr controls vs the address. Maybe
> Pavel can shed some light on this?

having separate flags for read and write is excessive unless one wants
to do them both at the same time. Right now I don't see that we have any
timing issues with the mux logic.

One thing we need to consider is how we handle the availabe address
space. Most cores have an 8-bit address space. With 14-bit addresses
going in it gives us room for 2**6=64 cores. But the TRNHG for example
allocates 12 bits of addresses. And the modexp core (for RSA, D-H etc)
requires something like 12 bits too.

Also, if we want to not redo SW mapping we should probably decide on at
least a provisional FPGA address map, where the cores will be, about
now. There will probably be things that we want to redo later on, but a
first attempt now would be good.

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
========================================================================
 Joachim Strömbergson          Secworks AB          joachim at secworks.se
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