[Cryptech Tech] STM32 FMC problem
Fredrik Thulin
fredrik at thulin.net
Wed Aug 19 10:24:23 UTC 2015
On Wednesday, August 19, 2015 12:04:28 AM Павел Шатов wrote:
...
> Well, I think, Fredrik used 25 MHz crystal, because it is the highest
> frequency, that our particular STM32 supports for HSE, seems like an
> obvious choice for me. Note, that he could use, for example, 20 MHz
> crystal and still have core running at 180 MHz by configuring PLL in a
> different way.
Yes. 25 MHz HSE was the recommended value for timing critical applications
such as high speed USB, Ethernet and (presumably) 90 MHz communication with
FPGAs ;)
...
> > I would suggest trying to run some simple design with a single core
> > block (for example SHA256) in synchronous mode and see if you can get it
> > to work without errors over the FMC interface.
>
> Synchronous mode is attractive, because it simplifies the system, but we
> lose flexibility, i.e. we will no longer be able to run data transfer at
> one frequency and clock cores at some other frequency.
>
> The good news is, that I actually ditched DMA engine idea from the
> errata and adapted what Peter suggested earlier, namely configuring
> NWAIT pin as GPIO and polling it manually after reading or writing. This
> seems to be stable, I tried leaving my demo program running at 90 MHz
> for more than an hour yesterday and didn't get any data transfer errors.
> The code needs a bit of polishing, I think, I will upload it during the
> weekend. It would be great, if you and Fredrik could test it then.
Great news! Looking forward to test. I plan to build two more dev-bridge
boards this Friday. I was slightly delayed waiting for the assembly house we
used to return surplus Novena connectors to me. Joachim will get one, and if
there is need I can ship one (or two) to Rob/Paul.
/Fredrik
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