[Cryptech Tech] STM32 FMC problem
Joachim Strömbergson
joachim at secworks.se
Thu Aug 13 07:22:52 UTC 2015
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA256
Aloha!
BTW: Good work even though it wasn't a breeze. This is why the bridge
board is useful since it allows us to solve issues like this before the
alpha board is ready.
Pavel Shatov wrote:
> The only possible explanation for this behaviuor I found, is item
> 2.9.4 in STM32F429 errata
> (http://www.st.com/web/en/resource/technical/document/errata_sheet/DM00068628.pdf)
>
>
This seems possible, since we have SysTick interrupt, but on the other
> hand, that issue is said to only affect revision "A" devices, while
> I have "3" next to ST logo on my processor. Very strange.
Have you tried to disable SysTick interrupt during FMC read?
Clearing bit 1 in the SysTick control and status register (STK_CTRL)
should disable the interrupt. Or disabling all interrupts during read?
Just to make sure if the problem is in the STM32 itself or in the
STM23/FPGA interface.
> Using DMA to transfer 32 bits at a time is not very efficient, but I
> was unable to find a better solution. Does anyone else have any
> ideas? I can provide compiled FPGA bitstream with FMC arbiter, in
> case anyone wants to try debugging the issue.
I need a bridge board.
- --
Med vänlig hälsning, Yours
Joachim Strömbergson - Alltid i harmonisk svängning.
========================================================================
Joachim Strömbergson Secworks AB joachim at secworks.se
========================================================================
-----BEGIN PGP SIGNATURE-----
Comment: GPGTools - http://gpgtools.org
Comment: Using GnuPG with Mozilla - http://enigmail.mozdev.org/
iQIcBAEBCAAGBQJVzEXLAAoJEF3cfFQkIuyNz6MQAMtf6rUx2xZyYNEutaPBSoP2
qZvoQYQ2mNSUmKIxmDF03SfMDaY18NguVLFnFGPJ04ujSbRyOYP/zrJLBRP80BhA
whjGRw3MZWM9wkQwAyX4twYcxtu6HerZvgzrEN6Dd2ij3koMce3JxvdaEdqT3ZkI
uKPLbQPI+ljWY6e4gw+3dTK5nwrmKCxbP5m7AHwD0+y5byoGkp8br7xMGduigPHM
C4BqR6pG3182LK9kmfoyT7MLS6q+EUGCObWAK76ricephPgabpWT+yxcTO+xDJCJ
ilyvYm+FjMFsI5PzqyHIZFHbX+GHGhp9kDta3lhjx3hPuj0JG1hFreS0ksjP1ErD
MIuJokbYUGZTBuMJdOgHhmijg9ojwYtgIqFZl9Jl1vxG8vs+Lnu2yLgTUZcQ41xw
se3NCZs+GZOLMRiVeIQg1sayZWsIYprrGmTOksNVgFmrqOE13EM3dedSAux+1UOO
KcgZup6JvCEALCrIeDFCrChkiPgIsf5621Ac/mhugtae7RFjbK9pr/6RGxlvk1c4
pCZ/y/Mygefb0GMrgmzCoSqnIE3rLl4bInUdyW06AWBCV+Fvkl7O+iMtw3AYMtpj
xlUTr0DQDy7cViVN8sIlEVzeHAwEJPBQGjdVQifKLlGOyKcJzcCdSGwzmVQcpaCz
QZ9gXh8oXC/7yN8BW71l
=tPdQ
-----END PGP SIGNATURE-----
More information about the Tech
mailing list