[Cryptech Tech] FPGA tasks

[Павел Шатов]

On 09.04.2015 5:06, Paul Selkirk wrote:
> On 04/08/2015 05:13 PM, Павел Шатов wrote:
>> On 08.04.2015 18:28, Joachim Strömbergson wrote:
>>> (1) Paul has been trying to build the complete FPGA for the Novena but
>>> with i2c interface. This should be a more relaxed design than EIM, but
>>> Paul can't get timimg closure. Your Xilinx knowledge would be a great
>>> help.
>>
>> Speaking of FPGA issues, let's start from (1). What repository contains
>> this simplified I2C system? Is it under test/novena_i2c_simple?
>
> I've abandoned novena_i2c_simple as a noble experiment that doesn't fit
> with our core selector and memory map, which is why I moved it from core
> to test.
>
> The design I've been trying to build is core/platform/novena/i2c/build
> (I've only tried with the command-line tools, not with ISE, but it
> should be the same, of course). It has the hash cores, plus the rng
> cores, plus chacha for the mixer. The same set of modules builds in
> reasonable time with eim, but fails to converge with i2c.
>
> OTOH, i2c is a bit of a side-show, since we've got eim working now. I
> just like to verify that changes work with all communication channels,
> or at least don't gratuitously break a supported configuration. (e.g. I
> can't actually verify that the terasic/uart code still works, because I
> don't have that board to run it on, but I have the toolset, and I can
> verify that it builds something.)
>
> So I wouldn't put a lot of energy into i2c, unless it somehow gets us to
> a more efficient design for the novena, and thus for the alpha board.
>

Well, the only I2C interface I see in Alpha is the one from CPU to RTC. 
So, Alpha will most probably not benefit in any way from debugging I2C 
in FPGA.

Joachim, Randy suggested working on ECDSA. Have you already done 
anything? I think we need to sync to avoid doing duplicate work.

--
With best regards,
Pavel Shatov