[Cryptech Tech] Dieharder test of Cryptech RNG data

[Павел Шатов]

On 04.04.2015 16:36, Joachim Strömbergson wrote:
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> Aloha!
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> Павел Шатов wrote:
>> Joachim, I was specifically talking about avalanche noise circuit.
>> About transistors, resistors, capacitors and so on. Not about FPGA
>> internals, of course.
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> Sorry for misunderstanding. You said trng.

Yes, I said TRNG, because from this document 
(http://wiki.cryptech.is/wiki/GitRepositories/core/rng/trng) I see, that 
avalanche noise circuit produces entropy for TRNG. As far as I 
understand, to have good random number generator we need good entropy 
source. That's why I asked about schematics of avalanche noise circuit.

In trng.v there's an input port named `avalanche_noise'. What signal was 
applied to this pin when you collected random data?

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With best regards,
Pavel Shatov