[Cryptech Tech] trng ready for play

[Joachim Strömbergson]

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Aloha!

Bernd Paysan wrote:
> Well, if you want ultra-high-speed randomness, you most likely have
> to go to the CPU core itself; ChaCha takes only a few cycles per
> byte, and everything but cache is aleady slower than that.

My core does 1.25 cycles/byte. The clock frequency is way lower than a
modern, desktop/server CPU and can be beaten core for core. But that is
not the point.

The point is - we can build a HSM, an embedded, dedicated, hard wired
and (hopefully) secure system that even in low cost implementation can
deliver high quality random number at Gbps performance. And by
instantiating more cores (and thus increasing cost) can scale the
performance above what you can achieve with CPU cores.

You will not for example achieve similar performance running on the ARM
cores in the CPU on the Novena board.

If you want to build a system that does Tbps random generation using a
32-core x86-64 CPU or even using multiple CPUs then yes, it is quite
possible. But I'm not so sure it will be considered a HSM.

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
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 Joachim Strömbergson          Secworks AB          joachim at secworks.se
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