[Cryptech Tech] EIM: mostly working

[Joachim Strömbergson]

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Bernd Paysan wrote:
> Another timing problem is in the synchronous reset, again here the
> routing delay is the culprit.

We shouldn't be using synch reset (even though Xilinx recommends
otherwise and Altera gives mixed recommendations), for the reasons you
stated. I thought I had changed to asynch reset.

I've checked and updated a few (sha-1, sha-256, coretest, uart). Now all
main cores are using asynch reset. Thanks for pointing this out.

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
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 Joachim Strömbergson          Secworks AB          joachim at secworks.se
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