[Cryptech Tech] Short status on test of Bernds fpga based entropy source

[Bernd Paysan]

Am Sonntag, 25. Mai 2014, 00:14:25 schrieb Joachim Strömbergson:
> Aloha!
> 
> I've now added SW needed to talk to the coretest system and read out
> entropy data from the source. I've extracted about 500 kByte data which
> took about 30 mins. I will do an analysis the coming days and also do
> more extractions.
> 
> And if anybody wants to see some random numbers here are a few:
> 
> READ_OK. address 0x1012 = 0x0000514e.
> READ_OK. address 0x1012 = 0x00006fd9.
> READ_OK. address 0x1012 = 0x00008953.
> READ_OK. address 0x1012 = 0x0000361c.

You'll probably get better use of your serial port if you pack 32 of the 
entropy sources into one word.

I used my b16 to collect data, and that is limited to 16 bit, that's why it's 
arranged in 16 bits per address.  Also, you should be able to read out way 
faster; maybe I should do some measurements with slowed down access.  The 16 
cycles/read I've done was to make sure the jitter noise still is measurable; 
for me, that sort of analysis is really important (characterizing the device 
and tuning the number of delay elements - I started with 8 delay elements to 
be sure that I get something meaningful).

I can get about 18kB/s from the device (with 230kbaud and unfortunately a lot 
of unreasonable overhead from Linux), the actual readout time is pretty short 
(1k samples in 16k cycles at 50MHz, that's 0.3ms, with 200ms to read that out 
through the serial line...).

I probably should try obtaining more values at a rate where randomness is next 
to perfect (128 cycles per read-out for delay chain length 2 or so)...

-- 
Bernd Paysan
"If you want it done right, you have to do it yourself"
http://bernd-paysan.de/
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