[Cryptech Tech] Hardware entropy

[Joachim Strömbergson]

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Aloha!

Randy Bush wrote:
> if you have reproducible code, i am home and can now run.

You should be able to clone the repo at github and build a FPGA config
file for the TerasIC C5G board. The source file pointers in the psf-file
needs to be updated though. But clock and pins are set up for the board

https://github.com/secworks/coretest_bpaysan_entropy

You should only get significant warnings for the combinational loops in
the rcon-instances.

The Python code is still not done. I have the board with me home and
will try and get the sW side working today or tomorrow.

We should move the code into the Cryptech repo, but I would first
separate out the enropy core from the test system.

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
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 Joachim Strömbergson          Secworks AB          joachim at secworks.se
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