[Cryptech Tech] Hardware entropy

Bernd Paysan bernd at net2o.de
Fri May 23 13:53:15 UTC 2014


Am Freitag, 23. Mai 2014, 15:43:07 schrieb Joachim Strömbergson:
> Aloha!
> 
> Joachim Strömbergson wrote:
> > Short answer to your latest emails: Cool and thanks for doing this.
> > I will try to recreate the results when I get back to my dev boards.
> 
> Short update on my implementation test:
> 
> I've created a FPGA project for testing Berndts FPGA entropy source and
> integrate it into the coretest system:
> 
> https://github.com/secworks/coretest_bpaysan_entropy
> 
> Berndt: I didn't know what license you want use on your code so I just
> added (C) 2014, Berndy Paysan to it. Is it ok to use 2-clause BSD?

Yes.  But please, spell my name right: it's "Bernd Paysan" without a t in the 
copyright message.  Otherwise I don't care.

You are using the a delay length of 8, and read it out slowly, though my 
suggestion was to use a shorter delay (2), and read it out more frequently, to 
produce more entropy in a shorter time (the quality, i.e. bias of the entropy 
is then lower, but the overall entropy is higher).

> Besides minor edits to get the code integrated into coretest it was
> fairly easy going. I've also added a debug port that samples internal
> values in the entropy source about 10 times/minute. The debug port is
> connected to the LEDs on the dev board to give some direct feedback that
> something is happening.
> 
> The project includes pin assignments, clocks etc needed to build the
> system on the TerasIC C5G board. Quartus complains in the combinational
> loops, but have no problems actually generating a FPGA design. The
> resulting design requires 521 ALMs and 472 registers. Most of that is
> from coretest and uart.
> 
> I have not yet been able to complete the SW needed to read out data from
> the entropy source and save it to be able to run Dieharder on it. I will
> try to do that the coming evenings.
> 
> If one wants to see the entropy source in action, there is a little 10
> second movie with blinkenlights here:
> 
> http://secworks.se/wp-content/uploads/2014/05/fpga_entropy.mov
> 
> The LEDs at the lower right corner is the debug port and are currently
> connected to the lower 8 bits of the n-vector in entropy.v
> 
> Very random. Much blinken. Wow.

-- 
Bernd Paysan
"If you want it done right, you have to do it yourself"
http://bernd-paysan.de/
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