[Cryptech Tech] Hardware entropy

[Randy Bush]

> Yes. Your comment shows that I need to clarify the presentation. The
> idea is _not_ to allow injection by default, but only when the RNG is in
> a specific debug/test mode. When in this mode you can only generate a
> limited number of random values - enough to confirm that seed values
> result in the expected values from the CSPRNG. When leaving debug mode,
> the whole RNG state is discarded and reseeded based on entropy collected
> after exiting the debug mode.

we read a good paper on this.  now i just have to dig it up again, sigh.

>> I'm using the Altera DE1 board.
> That board should do fine. The TerasIC DE0 Nano is also nice.

do we have a prototyping environment other than novena which lets us
have the green layer on a classic cpu core closely bound to the fpga?
peek and poke are a bit primitive.

randy