[Cryptech Tech] How to start using coretest_hashes on the TerasIC C5G Board
Joachim Strömbergson
joachim at secworks.se
Sat Mar 22 16:05:06 UTC 2014
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Aloha!
Василий Долматов wrote:
> Unconstrained Input Ports 2 2 3 Unconstrained Input Port Paths 3667
> 3667 4 Unconstrained Output Ports 9 9 5 Unconstrained Output Port
> Paths 9 9 6
Looks like you forgot to define the pins.
The setup I'm using is also rather basic with no delay, arrival time
etc. For the I/O speed we are using it is really not necessary.
- --
Med vänlig hälsning, Yours
Joachim Strömbergson - Alltid i harmonisk svängning.
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Joachim Strömbergson Secworks AB joachim at secworks.se
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