[Cryptech Tech] Padding in hash cores?

[Randy Bush]

>> Do you want to handle the padding or just divide the messsage into
>> blocks and for the final block just inform the core that it is the last
>> block and how much data that block contains?
> 
> It seems reasonable to me that the FPGA expects fixed size blocks, and the 
> layer above (MCU) does any necessary padding.
> 
> Unless there are any apparent downsides to this, I would prefer to not
> have to make sure every client library (meaning the computer side API)
> gets that right.

are these two in opposition?  or do you see the padder being in a layer
between the client library and the fpga, i.e. we have some nouns to
arrange?

my concern is if this opens up a vulnerability.  i am not seeing it.
perhaps it will come to me in ofuro.

randy