[Cryptech Tech] Entropy source delivered

[Joachim Strömbergson]

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Aloha!

CC:ing this to @tech

Fredrik Thulin wrote:
>> A din't know if this paper will be of help to you. It describes a
>> method of generating Verilog or VHDL code for the parallel CRC.
>> 
>> http://outputlogic.com/my-stuff/circuit-cellar-january-2010-crc.pdf
>
>> 
> Elena, thank you for the suggestion.
> 
> Joachim, you are probably the one who will be most affected by the
> choice of CRC algorithm - do you have any preferences? Even better if
> you respond on- list =).

No big preferences. The shorter it is the less logic. But CRCs are
generally easy and compact. My suggestion is to use a std CRC, for
example the CRC for Ethernet frames. See this list:

http://en.wikipedia.org/wiki/Cyclic_redundancy_check

- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
========================================================================
 Joachim Strömbergson          Secworks AB          joachim at secworks.se
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