[Cryptech Tech] ASIC implementation page on wiki

[Bernd Paysan]

Am Mittwoch, 13. August 2014, 11:52:14 schrieb Joachim Strömbergson:
> Aloha!
> 
> I've just added a brief text about what a possible ASIC implementation
> of the Cryptech design will entail. Comments and suggestions would be
> appreciated.
> 
> https://trac.cryptech.is/wiki/ASICImplementations

Some comments:

* Memories - in an FPGA design, you can let the synthesis tool choose your 
memory blocks from an RTL description - and that's the right way to do.  ASIC 
process flows don't work that way (they don't choose memory blocks).  Good 
design is to wrap the memory up in one Verilog module, so you can replace that 
for the ASIC design.

* Synchronous/asynchronous reset: Both Altera and Xilinx flip-flops offer 
asynchronous reset.  Use it.  It will help porting to an ASIC.  You might want 
to gate your clock with the reset so that reset edge/clock edge timing 
problems disappear.  In an ASIC you implement a clock driver which starts 
after the reset goes away - problem solved.

* Avalanche diode noise: Depending on the process options, it might be 
possible to have an internal avalanche diode.  This sort of diodes are often 
part of the ESD structures in IO pins, so with some knowledge of the process, 
you just can use that.  In a power management capable process, you can also 
include the stuff for the step-up converter (excluding coils and capacitors, 
of course).

* Ring oscillator: I'm pretty sure the adder-based ring oscillator will 
produce a working oscillator on an ASIC, with somewhat similar noise 
characteristics, as the carry chain in the FPGA is just a "hardcoded" carry 
chain, i.e. about the same thing you would do in an ASIC.  Of course, the 
resulting circuit has to be characterized, and hand-layouted ring oscillators 
can do better (and a lot smaller - a few inverters instead of several full 
adders).

Ways to obtain tools:

* Get Cadence/Synopsys to sponsor the tools for that project

* Cooperate with a fab with design center services (those do have the tools 
available)

* Cooperate with an university which has the tools and connections to fabs.

Having worked in the semiconductor industry for quite some time, the best 
contact I have is to TowerJazz, with one of my former bosses ending up as the 
European sales director there.

-- 
Bernd Paysan
"If you want it done right, you have to do it yourself"
http://bernd-paysan.de/
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 198 bytes
Desc: This is a digitally signed message part.
URL: <https://lists.cryptech.is/archives/tech/attachments/20140813/6948bfb4/attachment.sig>