[Cryptech Core] Fwd: SV: SV: SV: SV: SV: SV: Från BitSim...

Leif Johansson leifj at sunet.se
Thu May 21 07:42:46 UTC 2015


I just got an updated quote from bitsim. Here is what they say:


>
>  What is the difference between tho two quotations or How could it be less hours just like that?
>
> For the first quota, we got the feeling that you wanted to start as fast as possible, so instead of digging deeper into the Novena-project, (which of course takes more time since everything is new to us), we looked at similar boards that we already designed before. That we tried to interpolate, some are more advanced and some less. That is how we got our first estimates.
>
> For the second quota, we looked at all material in more detail. We then found that we could reuse ~1/3 of the schematics (the design itself, maybe not the schematic). We also found that no of connections are less then first anticipated for such a board ("only" ~3 000). When designing boards like this, we have rules of thumbs, we know that it takes x minutes/connection (for layout for example). We also need to know how complicated it will be to design, like pitch size (components), no of layers (stuck-up), what kind of vias are necessary, mechanical requirments, difficulties to produce (otherwise we'll get a home work from our sub-contractors), etc etc.
>
> It is less advanced than we first thought.


	Cheers Leif
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