[Cryptech Core] proposed core reorganization

[Павел Шатов]

On 07.03.2015 4:36, Paul Selkirk wrote:
> I actually want to use the preprocessor in Verilog, but I have a
> question about where to put the defines, so that core_selector.v doesn't
> have to know the location of a platform-specific (or project-specific)
> header file. In C, I'd have a CFLAGS variable in the makefile, which
> would contain a bunch of -D options. Does such a thing exist for the
> Xilinx or Altera tools?

Instead of -D option you need to use -define option (page 355):
http://www.xilinx.com/support/documentation/sw_manuals/xilinx14_7/xst_v6s6.pdf

-- 
With best regards,
Pavel Shatov