[Cryptech Core] cryptech pitch slides - first draft

Joachim Strömbergson joachim at secworks.se
Tue Jan 7 12:35:15 UTC 2014


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Aloha!

Randy Bush wrote:
> pull it again, fixes in, http://archive.psg.com/140106.cryptech.pdf

Sorry for a late response. The comments are on the presentation linked
above.

(1) I would like to more clearly highlight that what we develop are two
things:
 1. A platform with components that can be used to create HSMs with
different functionality and capabilities.

 2. A set of tools, methodology and support structure to allow somebody
to create a HSM (or having somebody else do it for them) - and then
verify that the HSM works as stated. To establish trust in the HSM created.



(2) The Goals slide does not actually mention the tool-chain. But that
is actually one of the really important issues. Toolchain, test cases,
user guidelines, best practices. How are users/integrators actually take
what we provide and create a working HSM that they can trust?



(3) Jakob brought up the issue of security target. I think we need to at
least say something about the security that should be possible to
achieve with our HSM platform. On the meeting we said that the platform
is not targeted to meet CC EAL, FIPS 140-x, SBI etc. But I think we
should at least state that HSMs built with our platform should be
possible to evaulate and meet some of these requirements.

As an example: Some of the on-line entropy source tests that at least I
think we need should meet the German SBI requirements.


(4) Another goal thing: We should really emphasize that the project is
being run in an open, transparent manner with traceability for all
decisions etc. And that we do this in order to build trust in the
project itself.


(5) What we discussed on the meeting i Dec was to be fairly
implementation agnostic at the lowest layer of the cake. We will produce
and provide HW-cores to implement them in FPGA. This components shall
also _not_ use specific FPGA technologies to allow them to be
implemented in different kinds of FPGAs as well as in ASICS. The key
words are "process independent RTL"
https://en.wikipedia.org/wiki/Register-transfer_level

But we also said that it should be possible to implement the lowest
layer using SW-cores that we provide. Basically good, clean
implementations in C (C89-C90 or similar - Stuge probably can provide
guidelines). We need to have these models anyway for validation.


(6) How about relations to other projects? I think we should say
something like what we discussed at the meeting - that this project
might finance, support other projects that we see can provide things
that we need. This project is not an isolated island. And that we do
this not only to be more cost efficient, but also to further diversify
and build trust.

Some projects worth pointing to:

* Truecrypt audit: http://istruecryptauditedyet.com/
* OpenCores: http://opencores.org/
* Icarus Verilog: http://iverilog.icarus.com/
* Valgrind: http://valgrind.org/
* clang+llvm: http://clang.llvm.org/

The reason I want to point to Valgrind is that there are some really
cool side-channel work being done. For example the Valgrind stuff Adam
Langley has done:

https://github.com/agl/ctgrind

The clang+llvw project is providing good STA tools but are also adding
more and more support for secure code analysis etc.



(6) Nitpick: At least for me "cipher" is the more common spelling. But
what we really are talking about is crypto as in cryptography. I would
use the term "crypto" instead.



- -- 
Med vänlig hälsning, Yours

Joachim Strömbergson - Alltid i harmonisk svängning.
========================================================================
 Joachim Strömbergson          Secworks AB          joachim at secworks.se
========================================================================
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