June 2021 Archives by thread

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Starting: Mon Jun 7 10:44:30 UTC 2021
Ending: Tue Jun 29 03:12:32 UTC 2021
Messages: 29

• [Cryptech-Commits] [user/shatov/alpha_rev04] branch master updated (e4885e5 -> 7a20646)   git at cryptech.is
  • [Cryptech-Commits] [user/shatov/alpha_rev04] 02/07: Updated the board with the new power jack footprint.   git at cryptech.is
  • [Cryptech-Commits] [user/shatov/alpha_rev04] 03/07: Regenerated NC Drill with the fixed power jack footprint.   git at cryptech.is
  • [Cryptech-Commits] [user/shatov/alpha_rev04] 04/07: Repaired fabrication layers for all the footprints. These are used to generate assembly drawings needed for soldering. As it turned out, component outlines got imported just as a set of lines from Altium, without linking them to the actual component. Moreover, reference designators didn't get converted altogether, had to add them manually.   git at cryptech.is
  • [Cryptech-Commits] [user/shatov/alpha_rev04] 05/07: Updated the board with the new footprints to correct the fabrication layers.   git at cryptech.is
  • [Cryptech-Commits] [user/shatov/alpha_rev04] 06/07: Added assembly drawings support to the production package generator script.   git at cryptech.is
  • [Cryptech-Commits] [user/shatov/alpha_rev04] 07/07: Added the generated assembly drawings.   git at cryptech.is
• [Cryptech-Commits] [user/shatov/alpha_rev04] 01/07: Fixed power jack footprint (0.8x3.0 oval holes turned 0.8 circular after exporting from Altium). Did the fix long time ago, just forgot to commit.   git at cryptech.is
• [Cryptech-Commits] [core/hash/sha3] branch master updated (8dcb8ea -> f762c8d)   git at cryptech.is
  • [Cryptech-Commits] [core/hash/sha3] 01/03: Reformatted   git at cryptech.is
  • [Cryptech-Commits] [core/hash/sha3] 02/03: Change reads from clocked to unclocked to match read timing of other cores.   git at cryptech.is
  • [Cryptech-Commits] [core/hash/sha3] 03/03: The SHA-3 algorithm really wants everything to be little-endian, which is at odds with everything else in our system (including the register interface to sha3_wrapper). Rather than trying to rewrite Bernd's beautiful code, I'll isolate it in its own little-endian universe by byte-swapping all reads and writes.   git at cryptech.is
• [Cryptech-Commits] [core/hash/sha3] branch sha3_mode created (now 4b8d3a9)   git at cryptech.is
  • [Cryptech-Commits] [core/hash/sha3] 01/02: The SHA-3 algorithm really wants everything to be little-endian, which is at odds with everything else in our system (including the register interface to sha3_wrapper). Rather than trying to rewrite sha3, I'll isolate it in its own little-endian universe by byte-swapping all reads and writes.   git at cryptech.is
  • [Cryptech-Commits] [core/hash/sha3] 02/02: Add mode bits for the various flavors of SHA-3, so that the software driver doesn't have to know that the internal block size is actually 1600 bits. This involves having the "init" state zero-extend the block data, and having "next" only absorb the block bits for that mode.   git at cryptech.is
• [Cryptech-Commits] [core/platform/common] branch master updated: Add sha3 core   git at cryptech.is
• [Cryptech-Commits] [sw/libhal] branch master updated (11a3fe1 -> 8ef2a4e)   git at cryptech.is
  • [Cryptech-Commits] [sw/libhal] 01/02: Minor hashsig cleanup, add hal_hashsig_public_key_len().   git at cryptech.is
  • [Cryptech-Commits] [sw/libhal] 02/02: Add support for the SHA-3 core.   git at cryptech.is
• [Cryptech-Commits] [user/shatov/alpha_rev04] branch master updated (7a20646 -> 2ac9aeb)   git at cryptech.is
  • [Cryptech-Commits] [user/shatov/alpha_rev04] 01/02: Discrete 0402 and 0603 packages had too small font on the fabrication layer, increased to make it readable.   git at cryptech.is
  • [Cryptech-Commits] [user/shatov/alpha_rev04] 02/02: Updated the board with the fixed footprints.   git at cryptech.is
• [Cryptech-Commits] [user/shatov/alpha_rev04] branch master updated: Regenerated assembly drawings with increased font size.   git at cryptech.is
• [Cryptech-Commits] [sw/libhal] branch sha3_mode created (now d0d6512)   git at cryptech.is
  • [Cryptech-Commits] [sw/libhal] 01/01: Add mode bits for the various flavors of SHA-3, so that the software driver doesn't have to know that the core's internal block size is actually 1600 bits.   git at cryptech.is
• [Cryptech-Commits] [sw/stm32] branch master updated: Revert Peter's hardware flow control patch, as it sometimes causes corruption on the sending side of USART2 (user/RPC) under load.   git at cryptech.is
• [Cryptech-Commits] [sw/libhal] branch master updated (8ef2a4e -> 12f20b6)   git at cryptech.is
  • [Cryptech-Commits] [sw/libhal] 01/02: A couple more Python 3 changes.   git at cryptech.is
  • [Cryptech-Commits] [sw/libhal] 02/02: weakref.WeakValueDictionary (at least in Python 3, at least at this moment in time, at least on this platform) is sometimes overly aggressive about garbage collecting, including some things that are not garbage. Replace it with a regular dict, and have RPCIOStream.rpc_input manage both adding and removing queues.   git at cryptech.is

Last message date: Tue Jun 29 03:12:32 UTC 2021
Archived on: Tue Jun 29 03:12:34 UTC 2021

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