[Cryptech-Commits] [core/util/keywrap] 84/95: Splitted the auto-zeroise test case into three separate tests.

git at cryptech.is git at cryptech.is
Wed Mar 25 17:19:23 UTC 2020


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paul at psgd.org pushed a commit to branch master
in repository core/util/keywrap.

commit 3c0ce8cc00a82478170b8c60c56a172ee9b721e1
Author: Joachim Strömbergson <joachim at secworks.se>
AuthorDate: Fri Dec 14 15:20:56 2018 +0100

    Splitted the auto-zeroise test case into three separate tests.
---
 src/tb/tb_keywrap.v | 225 ++++++++++++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 217 insertions(+), 8 deletions(-)

diff --git a/src/tb/tb_keywrap.v b/src/tb/tb_keywrap.v
index e0b82c4..ba23f4d 100644
--- a/src/tb/tb_keywrap.v
+++ b/src/tb/tb_keywrap.v
@@ -1162,22 +1162,229 @@ module tb_keywrap();
     end
   endtask // test_big_wrap_256
 
+
   //----------------------------------------------------------------
-  // test_zeroise
+  // test_zeroise1
   // Test the auto_zeroise functionality. We test that:
   //   1. We can init a key and have it auto zeroise.
   //   2. We can init a key and keep it alive.
   //   3. We can init a key and the force zeroisation.
   //----------------------------------------------------------------
-  task test_zeroise;
-    begin : test_zeroise
+  task test_zeroise1;
+    begin : test_zeroise1
+      integer i;
+      integer err;
+
+      err = 0;
+
+      $display("** TC test_zeroise1 START.");
+      $display("** Test of auto zeroise.");
+
+      tc_ctr = tc_ctr + 1;
+
+      // Write key and keylength, we also want to encrypt/wrap.
+      write_word(ADDR_KEY0,   32'h55aa55aa);
+      write_word(ADDR_KEY1,   32'h55aa55aa);
+      write_word(ADDR_KEY2,   32'h55aa55aa);
+      write_word(ADDR_KEY3,   32'h55aa55aa);
+      write_word(ADDR_KEY4,   32'h55aa55aa);
+      write_word(ADDR_KEY5,   32'h55aa55aa);
+      write_word(ADDR_KEY6,   32'h55aa55aa);
+      write_word(ADDR_KEY7,   32'h55aa55aa);
+      write_word(ADDR_CONFIG, 32'h00000003);
+
+      read_word(ADDR_STATUS);
+      $display("Status register: 0x%032b", read_data);
+
+      // Set the key timeout to 256 cycles.
+      write_word(ADDR_TIMEOUT, 32'hdeadbeef);
+      read_word(ADDR_TIMEOUT);
+      if (read_data != 32'hdeadbeef)
+        $display("Error. Timout value = 0x%04x, expected 0xdeadbeef", read_data);
+
+      // Display contents in key expansion register 2.
+      $display("Contents of the key_mem[2] before init: 0x%016x",
+               dut.core.aes.keymem.key_mem[2]);
+
+      // Initialize the AES engine (to expand the key).
+      // Wait for init to complete.
+      // Note, not actually needed to wait. We can write R data during init.
+      $display("* Initializing.");
+      write_word(ADDR_CTRL, 32'h00000001);
+      #(2 * CLK_PERIOD);
+      wait_ready();
+      $display("* Init done.");
+
+      // Display contents in key expansion register 2 again.
+      $display("Contents of the key_mem[2] after init: 0x%016x",
+               dut.core.aes.keymem.key_mem[2]);
+
+      // Check if key is loaded, according to the loaded flag.
+      read_word(ADDR_STATUS);
+      $display("Status register: 0b%032b", read_data);
+
+      // Display the timeout counter a few times.
+      $display("Contents of timeout counter: 0x%04x",
+               dut.core.key_timeout_ctr_reg);
+      #(2 * CLK_PERIOD);
+      $display("Contents of timeout counter: 0x%04x",
+               dut.core.key_timeout_ctr_reg);
+      #(2 * CLK_PERIOD);
+      $display("Contents of timeout counter: 0x%04x",
+               dut.core.key_timeout_ctr_reg);
+      #(2 * CLK_PERIOD);
+      $display("Contents of timeout counter: 0x%04x",
+               dut.core.key_timeout_ctr_reg);
+      #(2 * CLK_PERIOD);
+
+      read_word(ADDR_STATUS);
+      $display("Status register: 0x%032b", read_data);
+
+      // Display contents in one of the key expansion registers
+      $display("Contents of the key_mem[2]: 0x%016x",
+               dut.core.aes.keymem.key_mem[2]);
+      // Display contents in one of the key expansion registers
+      $display("Contents of the key_mem[2]: 0x%016x",
+               dut.core.aes.keymem.key_mem[2]);
+      // Display contents in one of the key expansion registers
+      $display("Contents of the key_mem[2]: 0x%016x",
+               dut.core.aes.keymem.key_mem[2]);
+
+      #(40 * CLK_PERIOD);
+
+      // Set the key timeout to 16 cycles.
+      // Read status to perform ping.
+      write_word(ADDR_TIMEOUT, 32'h00000010);
+      read_word(ADDR_STATUS);
+      #(400 * CLK_PERIOD);
+
+
+      read_word(ADDR_STATUS);
+      $display("Status register: 0x%032b", read_data);
+
+
+      $display("** TC test_zeroise1 END.\n");
+    end
+  endtask // test_zeroise1
+
+
+  //----------------------------------------------------------------
+  // test_zeroise2
+  // Test the auto_zeroise functionality. We test that:
+  //   2. We can init a key and keep it alive.
+  //----------------------------------------------------------------
+  task test_zeroise2;
+    begin : test_zeroise2
+      integer i;
+      integer err;
+
+      err = 0;
+
+      $display("** TC test_zeroise2 START.");
+      $display("** Test of key keep alive..");
+
+      tc_ctr = tc_ctr + 1;
+
+      // Write key and keylength, we also want to encrypt/wrap.
+      write_word(ADDR_KEY0,   32'h55aa55aa);
+      write_word(ADDR_KEY1,   32'h55aa55aa);
+      write_word(ADDR_KEY2,   32'h55aa55aa);
+      write_word(ADDR_KEY3,   32'h55aa55aa);
+      write_word(ADDR_KEY4,   32'h55aa55aa);
+      write_word(ADDR_KEY5,   32'h55aa55aa);
+      write_word(ADDR_KEY6,   32'h55aa55aa);
+      write_word(ADDR_KEY7,   32'h55aa55aa);
+      write_word(ADDR_CONFIG, 32'h00000003);
+
+      read_word(ADDR_STATUS);
+      $display("Status register: 0x%032b", read_data);
+
+      // Set the key timeout to 256 cycles.
+      write_word(ADDR_TIMEOUT, 32'hdeadbeef);
+      read_word(ADDR_TIMEOUT);
+      if (read_data != 32'hdeadbeef)
+        $display("Error. Timout value = 0x%04x, expected 0xdeadbeef", read_data);
+
+      // Display contents in key expansion register 2.
+      $display("Contents of the key_mem[2] before init: 0x%016x",
+               dut.core.aes.keymem.key_mem[2]);
+
+      // Initialize the AES engine (to expand the key).
+      // Wait for init to complete.
+      // Note, not actually needed to wait. We can write R data during init.
+      $display("* Initializing.");
+      write_word(ADDR_CTRL, 32'h00000001);
+      #(2 * CLK_PERIOD);
+      wait_ready();
+      $display("* Init done.");
+
+      // Display contents in key expansion register 2 again.
+      $display("Contents of the key_mem[2] after init: 0x%016x",
+               dut.core.aes.keymem.key_mem[2]);
+
+      // Check if key is loaded, according to the loaded flag.
+      read_word(ADDR_STATUS);
+      $display("Status register: 0b%032b", read_data);
+
+      // Display the timeout counter a few times.
+      $display("Contents of timeout counter: 0x%04x",
+               dut.core.key_timeout_ctr_reg);
+      #(2 * CLK_PERIOD);
+      $display("Contents of timeout counter: 0x%04x",
+               dut.core.key_timeout_ctr_reg);
+      #(2 * CLK_PERIOD);
+      $display("Contents of timeout counter: 0x%04x",
+               dut.core.key_timeout_ctr_reg);
+      #(2 * CLK_PERIOD);
+      $display("Contents of timeout counter: 0x%04x",
+               dut.core.key_timeout_ctr_reg);
+      #(2 * CLK_PERIOD);
+
+      read_word(ADDR_STATUS);
+      $display("Status register: 0x%032b", read_data);
+
+      // Display contents in one of the key expansion registers
+      $display("Contents of the key_mem[2]: 0x%016x",
+               dut.core.aes.keymem.key_mem[2]);
+      // Display contents in one of the key expansion registers
+      $display("Contents of the key_mem[2]: 0x%016x",
+               dut.core.aes.keymem.key_mem[2]);
+      // Display contents in one of the key expansion registers
+      $display("Contents of the key_mem[2]: 0x%016x",
+               dut.core.aes.keymem.key_mem[2]);
+
+      #(40 * CLK_PERIOD);
+
+      // Set the key timeout to 16 cycles.
+      // Read status to perform ping.
+      write_word(ADDR_TIMEOUT, 32'h00000010);
+      read_word(ADDR_STATUS);
+      #(400 * CLK_PERIOD);
+
+
+      read_word(ADDR_STATUS);
+      $display("Status register: 0x%032b", read_data);
+
+
+      $display("** TC test_zeroise2 END.\n");
+    end
+  endtask // test_zeroise2
+
+
+  //----------------------------------------------------------------
+  // test_zeroise3
+  // Test the auto_zeroise functionality. We test that:
+  //   3. We can init a key and the force zeroisation.
+  //----------------------------------------------------------------
+  task test_zeroise3;
+    begin : test_zeroise3
       integer i;
       integer err;
 
       err = 0;
 
-      $display("** TC test_zeroise START.");
-      $display("** Test 1: Auto zeroise.");
+      $display("** TC test_zeroise3 START.");
+      $display("** Test of forceed zeroisation.");
 
       tc_ctr = tc_ctr + 1;
 
@@ -1262,9 +1469,9 @@ module tb_keywrap();
       $display("Status register: 0x%032b", read_data);
 
 
-      $display("** TC test_zeroise END.\n");
+      $display("** TC test_zerois3 END.\n");
     end
-  endtask // test_zeroise
+  endtask // test_zeroise3
 
 
   //----------------------------------------------------------------
@@ -1295,7 +1502,9 @@ module tb_keywrap();
 
 //      test_big_wrap_256();
 
-      test_zeroise();
+      test_zeroise1();
+      test_zeroise2();
+      test_zeroise3();
 
       display_test_results();
 



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