[Cryptech-Commits] [user/js/mkmif] branch master updated: Fixed spelinng erorrs.

git at cryptech.is git at cryptech.is
Tue Sep 18 11:51:54 UTC 2018


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joachim at secworks.se pushed a commit to branch master
in repository user/js/mkmif.

The following commit(s) were added to refs/heads/master by this push:
     new 965a2d4  Fixed spelinng erorrs.
965a2d4 is described below

commit 965a2d4c023bc00c3e37f39953c3137d8679bb86
Author: Joachim Strömbergson <joachim at secworks.se>
AuthorDate: Tue Sep 18 13:51:43 2018 +0200

    Fixed spelinng erorrs.
---
 README.md | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/README.md b/README.md
index 771cb6f..c51dbbf 100644
--- a/README.md
+++ b/README.md
@@ -10,17 +10,17 @@ The Master Key Memory is where a cryptographic master key is stored. the
 key is used (for example) to cryptographically wrap other keys and
 secrets. By wiping the MKM and thus the master key, the wrapped secrets
 are protected against leakage to a local attacker that physically breaks
-an actuve tamper detect shield.
+an active tamper detect shield.
 
-The core will in future versions provide functionality to autonomosly
+The core will in future versions provide functionality to autonomously
 protect against memory remanence effects by rotating bits in stored data
 and moving data to different addresses in the external memory. The core
-will also be able to automously zeroise the memory when given an alarm
+will also be able to autonomously zeroise the memory when given an alarm
 signal.
 
 The current version however simply provides an interface to the slower,
 serial memory including initializing the memory in the correct mode. The
-core supports three commands: read word, write word and initalize
+core supports three commands: read word, write word and initialize
 memory.
 
 
@@ -45,7 +45,7 @@ The implementation is divided into three parts:
   read data. The SPI interface also generates the SPI clock and chip
   enable.
 
-- A command handler core that tha read and write words as well as send
+- A command handler core that read and write words as well as send
   init commands to the memory using the SPI interface.
 
 - An API interface that provides the ability to configure the SPI clock

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