[Cryptech-Commits] [user/js/keywrap] 01/01: Adding initial version of repo and design for core implementing aes key wrap.
git at cryptech.is
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Tue Jun 19 14:28:35 UTC 2018
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joachim at secworks.se pushed a commit to branch master
in repository user/js/keywrap.
commit f5a18694df2fcba38cf6c07d055f8734e511ad01
Author: Joachim Strömbergson <joachim at secworks.se>
AuthorDate: Tue Jun 19 16:28:26 2018 +0200
Adding initial version of repo and design for core implementing aes key wrap.
---
LICENSE | 29 ++++++++++++++
README.md | 16 ++++++++
src/rtl/keywrap_mem.v | 51 ++++++++++++++++++++++++
src/tb/tb_keywrap_mem.v | 100 ++++++++++++++++++++++++++++++++++++++++++++++++
toolruns/Makefile | 79 ++++++++++++++++++++++++++++++++++++++
toolruns/mem.sim | 78 +++++++++++++++++++++++++++++++++++++
6 files changed, 353 insertions(+)
diff --git a/LICENSE b/LICENSE
new file mode 100644
index 0000000..aa1732f
--- /dev/null
+++ b/LICENSE
@@ -0,0 +1,29 @@
+Author: Joachim Strömbergson
+Copyright (c) 2014, NORDUnet A/S
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are
+met:
+- Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+- Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+- Neither the name of the NORDUnet nor the names of its contributors may
+ be used to endorse or promote products derived from this software
+ without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/README.md b/README.md
new file mode 100644
index 0000000..7ef8732
--- /dev/null
+++ b/README.md
@@ -0,0 +1,16 @@
+keywrap
+=======
+## Introduction ##
+
+This core implememts AES KEY WRAP as defined in [RFC
+3394](https://tools.ietf.org/html/rfc3394) and the keywrap with padding
+according to [RFC 5694](https://tools.ietf.org/html/rfc5649)
+
+The user/host system writes data to be wrapped/unwrapped to the core as
+well as the wrapping key. The core then handles the wrapping/unwrapping
+operation independently. When operation has completed the result can be
+read back.
+
+
+## Status ##
+Initial design has just been started. Does not work. Do not use.
diff --git a/src/rtl/keywrap_mem.v b/src/rtl/keywrap_mem.v
new file mode 100644
index 0000000..21d3a2b
--- /dev/null
+++ b/src/rtl/keywrap_mem.v
@@ -0,0 +1,51 @@
+//======================================================================
+//
+// keywrap_mem.v
+// -------------
+// Memory for AES KEY WRAP processing.
+//
+//
+// Author: Joachim Strombergson
+// Copyright (c) 2018, NORDUnet A/S
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+// - Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer.
+//
+// - Redistributions in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the distribution.
+//
+// - Neither the name of the NORDUnet nor the names of its contributors may
+// be used to endorse or promote products derived from this software
+// without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+// IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+// PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+// TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+//======================================================================
+
+module keywrap_mem
+
+ (
+ input wire sys_clk,
+ input wire reset_n
+ );
+
+endmodule // keywrap_mem
+
+//======================================================================
+// EOF keywrap_mem.v
+//======================================================================
diff --git a/src/tb/tb_keywrap_mem.v b/src/tb/tb_keywrap_mem.v
new file mode 100644
index 0000000..c96bf04
--- /dev/null
+++ b/src/tb/tb_keywrap_mem.v
@@ -0,0 +1,100 @@
+//======================================================================
+//
+// tb_keywrap_mem.v
+// ----------------
+// Testbench for the keywrap mempory.
+//
+//
+// Author: Joachim Strombergson
+// Copyright (c) 2018, NORDUnet A/S
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+// - Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer.
+//
+// - Redistributions in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the distribution.
+//
+// - Neither the name of the NORDUnet nor the names of its contributors may
+// be used to endorse or promote products derived from this software
+// without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+// IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+// PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+// TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+//======================================================================
+
+module tb_keywrap_mem();
+
+ parameter CLK_HALF_PERIOD = 1;
+ parameter CLK_PERIOD = 2 * CLK_HALF_PERIOD;
+
+ integer cycle_ctr;
+ reg tb_sys_clk;
+ reg tb_reset_n;
+
+
+ //----------------------------------------------------------------
+ // clk_gen
+ //
+ // Always running clock generator process.
+ //----------------------------------------------------------------
+ always
+ begin : clk_gen
+ #CLK_HALF_PERIOD;
+ tb_sys_clk = !tb_sys_clk;
+ end // clk_gen
+
+
+ //----------------------------------------------------------------
+ // sys_monitor()
+ //
+ // An always running process that creates a cycle counter and
+ // conditionally displays information about the DUT.
+ //----------------------------------------------------------------
+ always
+ begin : sys_monitor
+ cycle_ctr = cycle_ctr + 1;
+
+ #(CLK_PERIOD);
+ end
+
+
+ //----------------------------------------------------------------
+ // init_sim()
+ //
+ // Initialize all counters and testbed functionality as well
+ // as setting the DUT inputs to defined values.
+ //----------------------------------------------------------------
+ initial
+ begin
+ cycle_ctr = 0;
+ tb_sys_clk = 0;
+ tb_reset_n = 0;
+
+ #(CLK_PERIOD * 10);
+
+ tb_reset_n = 1;
+
+ #(CLK_PERIOD * 10);
+ $finish;
+ end
+
+endmodule // tb_keywrap_mem
+
+//======================================================================
+// EOF tb_keywrap_mem.v
+//======================================================================
diff --git a/toolruns/Makefile b/toolruns/Makefile
new file mode 100755
index 0000000..8682672
--- /dev/null
+++ b/toolruns/Makefile
@@ -0,0 +1,79 @@
+#===================================================================
+#
+# Makefile
+# --------
+# Makefile for building the keywrap module.
+#
+#
+# Author: Joachim Strombergson
+# Copyright (c) 2018, NORDUnet A/S
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met:
+# - Redistributions of source code must retain the above copyright notice,
+# this list of conditions and the following disclaimer.
+#
+# - Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# - Neither the name of the NORDUnet nor the names of its contributors may
+# be used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+# PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+# TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#===================================================================
+
+MEM_SRC =../src/rtl/keywrap_mem.v
+TB_MEM_SRC =../src/tb/tb_keywrap_mem.v
+
+CC = iverilog
+CC_FLAGS = -Wall
+
+LINT = verilator
+LINT_FLAGS = +1364-2001ext+ --lint-only -Wall -Wno-fatal -Wno-DECLFILENAME
+
+all: mem.sim
+
+
+mem.sim: $(TB_MEM_SRC) $(MEM_SRC)
+ $(CC) $(CC_FLAGS) -o mem.sim $(TB_MEM_SRC) $(MEM_SRC)
+
+
+sim-mem: mem.sim
+ ./mem.sim
+
+
+lint: $(MEM_SRC)
+ $(LINT) $(LINT_FLAGS) $(MEM_SRC)
+
+
+clean:
+ rm -f mem.sim
+
+
+help:
+ @echo "Supported targets:"
+ @echo "------------------"
+ @echo "all: Build all simulation targets."
+ @echo "lint: Lint all rtl source files."
+ @echo "mem.sim: Build mem simulation target."
+ @echo "sim-mem: Run mem simulation."
+ @echo "clean: Delete all built files."
+
+#===================================================================
+# EOF Makefile
+#===================================================================
diff --git a/toolruns/mem.sim b/toolruns/mem.sim
new file mode 100755
index 0000000..96aff4a
--- /dev/null
+++ b/toolruns/mem.sim
@@ -0,0 +1,78 @@
+#! /usr/local/Cellar/icarus-verilog/HEAD/bin/vvp
+:ivl_version "11.0 (devel)" "(a1e0040)";
+:ivl_delay_selection "TYPICAL";
+:vpi_time_precision + 0;
+:vpi_module "system";
+:vpi_module "vhdl_sys";
+:vpi_module "v2005_math";
+:vpi_module "va_math";
+S_0x7ff56cd001b0 .scope module, "keywrap_mem" "keywrap_mem" 2 40;
+ .timescale 0 0;
+ .port_info 0 /INPUT 1 "sys_clk"
+ .port_info 1 /INPUT 1 "reset_n"
+o0x1004b5008 .functor BUFZ 1, C4<z>; HiZ drive
+v0x7ff56cd00620_0 .net "reset_n", 0 0, o0x1004b5008; 0 drivers
+o0x1004b5038 .functor BUFZ 1, C4<z>; HiZ drive
+v0x7ff56cd10660_0 .net "sys_clk", 0 0, o0x1004b5038; 0 drivers
+S_0x7ff56cd00340 .scope module, "tb_keywrap_mem" "tb_keywrap_mem" 3 40;
+ .timescale 0 0;
+P_0x7ff56cd004a0 .param/l "CLK_HALF_PERIOD" 0 3 42, +C4<00000000000000000000000000000001>;
+P_0x7ff56cd004e0 .param/l "CLK_PERIOD" 0 3 43, +C4<0000000000000000000000000000000000000000000000000000000000000010>;
+v0x7ff56cd10a80_0 .var/i "cycle_ctr", 31 0;
+v0x7ff56cd10b30_0 .var "tb_reset_n", 0 0;
+v0x7ff56cd10bd0_0 .var "tb_sys_clk", 0 0;
+S_0x7ff56cd10710 .scope begin, "clk_gen" "clk_gen" 3 56, 3 56 0, S_0x7ff56cd00340;
+ .timescale 0 0;
+S_0x7ff56cd108c0 .scope begin, "sys_monitor" "sys_monitor" 3 69, 3 69 0, S_0x7ff56cd00340;
+ .timescale 0 0;
+ .scope S_0x7ff56cd00340;
+T_0 ;
+ %fork t_1, S_0x7ff56cd10710;
+ %jmp t_0;
+ .scope S_0x7ff56cd10710;
+t_1 ;
+ %delay 1, 0;
+ %load/vec4 v0x7ff56cd10bd0_0;
+ %nor/r;
+ %store/vec4 v0x7ff56cd10bd0_0, 0, 1;
+ %end;
+ .scope S_0x7ff56cd00340;
+t_0 %join;
+ %jmp T_0;
+ .thread T_0;
+ .scope S_0x7ff56cd00340;
+T_1 ;
+ %fork t_3, S_0x7ff56cd108c0;
+ %jmp t_2;
+ .scope S_0x7ff56cd108c0;
+t_3 ;
+ %load/vec4 v0x7ff56cd10a80_0;
+ %addi 1, 0, 32;
+ %store/vec4 v0x7ff56cd10a80_0, 0, 32;
+ %delay 2, 0;
+ %end;
+ .scope S_0x7ff56cd00340;
+t_2 %join;
+ %jmp T_1;
+ .thread T_1;
+ .scope S_0x7ff56cd00340;
+T_2 ;
+ %pushi/vec4 0, 0, 32;
+ %store/vec4 v0x7ff56cd10a80_0, 0, 32;
+ %pushi/vec4 0, 0, 1;
+ %store/vec4 v0x7ff56cd10bd0_0, 0, 1;
+ %pushi/vec4 0, 0, 1;
+ %store/vec4 v0x7ff56cd10b30_0, 0, 1;
+ %delay 20, 0;
+ %pushi/vec4 1, 0, 1;
+ %store/vec4 v0x7ff56cd10b30_0, 0, 1;
+ %delay 20, 0;
+ %vpi_call 3 93 "$finish" {0 0 0};
+ %end;
+ .thread T_2;
+# The file index is used to find the file name in the following table.
+:file_names 4;
+ "N/A";
+ "<interactive>";
+ "../src/rtl/keywrap_mem.v";
+ "../src/tb/tb_keywrap_mem.v";
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