[Cryptech-Commits] [user/js/toggle] 01/01: Adding toggle design including testbench and Makefile to run simulation.
git at cryptech.is
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Thu Jun 14 11:42:33 UTC 2018
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joachim at secworks.se pushed a commit to branch master
in repository user/js/toggle.
commit 478179fd21ec7147208f071260b887e866b3a5c9
Author: Joachim Strömbergson <joachim at secworks.se>
AuthorDate: Thu Jun 14 13:42:19 2018 +0200
Adding toggle design including testbench and Makefile to run simulation.
---
LICENSE | 29 ++++++++++++++
README.md | 14 +++++++
src/rtl/toggle.v | 92 ++++++++++++++++++++++++++++++++++++++++++++
src/tb/tb_toggle.v | 110 +++++++++++++++++++++++++++++++++++++++++++++++++++++
toolruns/Makefile | 79 ++++++++++++++++++++++++++++++++++++++
5 files changed, 324 insertions(+)
diff --git a/LICENSE b/LICENSE
new file mode 100644
index 0000000..aa1732f
--- /dev/null
+++ b/LICENSE
@@ -0,0 +1,29 @@
+Author: Joachim Strömbergson
+Copyright (c) 2014, NORDUnet A/S
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are
+met:
+- Redistributions of source code must retain the above copyright notice,
+ this list of conditions and the following disclaimer.
+
+- Redistributions in binary form must reproduce the above copyright
+ notice, this list of conditions and the following disclaimer in the
+ documentation and/or other materials provided with the distribution.
+
+- Neither the name of the NORDUnet nor the names of its contributors may
+ be used to endorse or promote products derived from this software
+ without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
diff --git a/README.md b/README.md
new file mode 100644
index 0000000..b2c0d35
--- /dev/null
+++ b/README.md
@@ -0,0 +1,14 @@
+toggle
+======
+## Introduction ##
+
+This repo contains a simple deign that toggles an ouput pin. The toggle
+is in sync with the given sys_clk, but the toggle circuit divides down
+the clock. The divisor is build time defined.
+
+The design is used in the Cryptech FPGA design to observe internal
+clock frequencies.
+
+
+## Status ##
+Has been simulated with Icarus Verilog.
diff --git a/src/rtl/toggle.v b/src/rtl/toggle.v
new file mode 100644
index 0000000..548b85e
--- /dev/null
+++ b/src/rtl/toggle.v
@@ -0,0 +1,92 @@
+//======================================================================
+//
+// toggle
+// ------
+// gpio pin toggler.
+//
+//
+// Author: Joachim Strombergson
+// Copyright (c) 2018, NORDUnet A/S
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+// - Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer.
+//
+// - Redistributions in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the distribution.
+//
+// - Neither the name of the NORDUnet nor the names of its contributors may
+// be used to endorse or promote products derived from this software
+// without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+// IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+// PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+// TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+//======================================================================
+
+module toggle
+
+ (
+ input wire sys_clk,
+ input wire reset_n,
+ output wire [7 : 0] gpio_b
+ );
+
+ localparam TOGGLE_DELAY_CYCLES = 100;
+
+ reg [7 : 0] toggle_ctr_reg;
+ reg [7 : 0] toggle_ctr_new;
+
+ reg toggle_reg;
+ reg toggle_we;
+
+ assign gpio_b = {7'b1010101, toggle_reg};
+
+ always @(posedge sys_clk)
+ begin: sys_clk_toggle_reg_update
+ if (!reset_n)
+ begin
+ toggle_ctr_reg <= 32'h0;
+ toggle_reg <= 1'b0;
+ end
+ else
+ begin
+ toggle_ctr_reg <= toggle_ctr_new;
+
+ if (toggle_we)
+ toggle_reg <= ~toggle_reg;
+ end
+ end
+
+ always @*
+ begin : sys_clk_toggle
+ if (toggle_ctr_reg == TOGGLE_DELAY_CYCLES)
+ begin
+ toggle_ctr_new = 32'h0;
+ toggle_we = 1'b1;
+ end
+ else
+ begin
+ toggle_ctr_new = toggle_ctr_reg + 1'b1;
+ toggle_we = 1'b0;
+ end
+ end
+
+endmodule // toggle
+
+//======================================================================
+// EOF toggle.v
+//======================================================================
diff --git a/src/tb/tb_toggle.v b/src/tb/tb_toggle.v
new file mode 100644
index 0000000..0f3a9ad
--- /dev/null
+++ b/src/tb/tb_toggle.v
@@ -0,0 +1,110 @@
+//======================================================================
+//
+// tb_toggle
+// ---------
+// Testbench for the gpio pin toggler.
+//
+//
+// Author: Joachim Strombergson
+// Copyright (c) 2018, NORDUnet A/S
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met:
+// - Redistributions of source code must retain the above copyright notice,
+// this list of conditions and the following disclaimer.
+//
+// - Redistributions in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the distribution.
+//
+// - Neither the name of the NORDUnet nor the names of its contributors may
+// be used to endorse or promote products derived from this software
+// without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+// IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+// PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+// TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+// LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+//======================================================================
+
+module tb_toggle();
+
+ parameter CLK_HALF_PERIOD = 1;
+ parameter CLK_PERIOD = 2 * CLK_HALF_PERIOD;
+
+ reg tb_sys_clk;
+ reg tb_reset_n;
+ wire [7 : 0] tb_gpio_b;
+ reg [31 : 0] cycle_ctr;
+
+ toggle dut(
+ .sys_clk(tb_sys_clk),
+ .reset_n(tb_reset_n),
+ .gpio_b(tb_gpio_b)
+ );
+
+
+ //----------------------------------------------------------------
+ // clk_gen
+ //
+ // Always running clock generator process.
+ //----------------------------------------------------------------
+ always
+ begin : clk_gen
+ #CLK_HALF_PERIOD;
+ tb_sys_clk = !tb_sys_clk;
+ end // clk_gen
+
+
+ //----------------------------------------------------------------
+ // sys_monitor()
+ //
+ // An always running process that creates a cycle counter and
+ // conditionally displays information about the DUT.
+ //----------------------------------------------------------------
+ always
+ begin : sys_monitor
+ cycle_ctr = cycle_ctr + 1;
+
+ #(CLK_PERIOD);
+
+ $display("cycle: 0x%016x gpio_b: 0x%08x toggle_ctr: 0x%08x toggle_reg: 0x%01x",
+ cycle_ctr, tb_gpio_b, dut.toggle_ctr_reg, dut.toggle_reg);
+ end
+
+
+ //----------------------------------------------------------------
+ // init_sim()
+ //
+ // Initialize all counters and testbed functionality as well
+ // as setting the DUT inputs to defined values.
+ //----------------------------------------------------------------
+ initial
+ begin
+ cycle_ctr = 0;
+ tb_sys_clk = 0;
+ tb_reset_n = 0;
+
+ #(CLK_PERIOD * 10);
+
+ tb_reset_n = 1;
+
+ #(CLK_PERIOD * 10000);
+ $finish;
+ end
+
+endmodule // tb_toggle
+
+//======================================================================
+// EOF tb_toggle.v
+//======================================================================
diff --git a/toolruns/Makefile b/toolruns/Makefile
new file mode 100755
index 0000000..1bd9c87
--- /dev/null
+++ b/toolruns/Makefile
@@ -0,0 +1,79 @@
+#===================================================================
+#
+# Makefile
+# --------
+# Makefile for building the toggle design and simulation.
+#
+#
+# Author: Joachim Strombergson
+# Copyright (c) 2018, NORDUnet A/S
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met:
+# - Redistributions of source code must retain the above copyright notice,
+# this list of conditions and the following disclaimer.
+#
+# - Redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution.
+#
+# - Neither the name of the NORDUnet nor the names of its contributors may
+# be used to endorse or promote products derived from this software
+# without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+# IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+# PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+# TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+# PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+# LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+# NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+#===================================================================
+
+TOGGLE_SRC =../src/rtl/toggle.v
+TB_TOGGLE_SRC =../src/tb/tb_toggle.v
+
+CC = iverilog
+CC_FLAGS = -Wall
+
+LINT = verilator
+LINT_FLAGS = +1364-2001ext+ --lint-only -Wall -Wno-fatal -Wno-DECLFILENAME
+
+all: top.sim
+
+
+top.sim: $(TB_TOGGLE SRC) $(TOGGLE_SRC)
+ $(CC) $(CC_FLAGS) -o top.sim $(TB_TOGGLE_SRC) $(TOGGLE_SRC)
+
+
+sim-top: top.sim
+ ./top.sim
+
+
+lint: $(TOP_SRC)
+ $(LINT) $(LINT_FLAGS) $(TOGGLE_SRC)
+
+
+clean:
+ rm -f top.sim
+
+
+help:
+ @echo "Supported targets:"
+ @echo "------------------"
+ @echo "all: Build all simulation targets."
+ @echo "lint: Lint all rtl source files."
+ @echo "top.sim: Build top level simulation target."
+ @echo "sim-top: Run top level simulation."
+ @echo "clean: Delete all built files."
+
+#===================================================================
+# EOF Makefile
+#===================================================================
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