[Cryptech-Commits] [sw/stm32] 02/02: non-working code to upload an application and jump to it

git at cryptech.is git at cryptech.is
Tue May 24 15:14:45 UTC 2016


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fredrik at thulin.net pushed a commit to branch ft-dfu-code-loading
in repository sw/stm32.

commit be280fa4a8c851d774cf4581972bc99329c43e6b
Author: Fredrik Thulin <fredrik at thulin.net>
AuthorDate: Tue May 24 17:14:28 2016 +0200

    non-working code to upload an application and jump to it
    
    Committing my work in progress in case someone else wants to help.
---
 .../TOOLCHAIN_GCC_ARM/STM32F429BI.ld               |   7 +-
 .../TARGET_CRYPTECH_ALPHA/cmsis_nvic.c             |   3 +-
 projects/cli-test/Makefile                         |   2 +-
 projects/cli-test/cli-test.c                       |   2 +
 projects/cli-test/filetransfer                     |   9 +
 projects/cli-test/mgmt-cli.c                       |   1 -
 projects/cli-test/mgmt-cli.h                       |   2 +-
 projects/cli-test/mgmt-dfu.c                       | 187 +++++++++++++++++++++
 projects/cli-test/{test_sdram.h => mgmt-dfu.h}     |  22 +--
 projects/cli-test/test_sdram.h                     |   5 +
 10 files changed, 224 insertions(+), 16 deletions(-)

diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/STM32F429BI.ld b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/STM32F429BI.ld
index c3aa304..cb19009 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/STM32F429BI.ld
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/TOOLCHAIN_GCC_ARM/STM32F429BI.ld
@@ -1,9 +1,12 @@
 /* Linker script to configure memory regions. */
 MEMORY
 { 
-  FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048k
+  /* FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048k */
+  BOOTLOADER (rx) : ORIGIN = 0x08000000, LENGTH = 128K
+  FIRMWARE (rx)   : ORIGIN = 0x08100000, LENGTH = 2048K - 128K
+  FLASH (rx)   : ORIGIN = 0x08000000, LENGTH = 2048K
   CCM (rwx) : ORIGIN = 0x10000000, LENGTH = 64K
-  RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 192k
+  RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 192K
 }
 
 /* Linker script to place sections and symbol values. Should be used together
diff --git a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/cmsis_nvic.c b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/cmsis_nvic.c
index 2da63fc..ac2c92a 100644
--- a/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/cmsis_nvic.c
+++ b/libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/TARGET_CRYPTECH_ALPHA/cmsis_nvic.c
@@ -38,7 +38,8 @@ void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
     uint32_t i;
 
     // Copy and switch to dynamic vectors if the first time called
-    if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
+    if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS ||
+	SCB->VTOR == 0x08100000) {
         uint32_t *old_vectors = vectors;
         vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
         for (i=0; i<NVIC_NUM_VECTORS; i++) {
diff --git a/projects/cli-test/Makefile b/projects/cli-test/Makefile
index 7737e13..39619fc 100644
--- a/projects/cli-test/Makefile
+++ b/projects/cli-test/Makefile
@@ -1,6 +1,6 @@
 TEST = cli-test
 
-OBJS = crc32.o mgmt-cli.o test_sdram.o
+OBJS = crc32.o mgmt-cli.o test_sdram.o mgmt-dfu.o
 
 CFLAGS += -I$(LIBCLI_DIR)
 LIBS += $(LIBCLI_DIR)/libcli.a
diff --git a/projects/cli-test/cli-test.c b/projects/cli-test/cli-test.c
index 41d7365..30623a4 100644
--- a/projects/cli-test/cli-test.c
+++ b/projects/cli-test/cli-test.c
@@ -39,6 +39,7 @@
 #include "stm-keystore.h"
 #include "stm-sdram.h"
 #include "mgmt-cli.h"
+#include "mgmt-dfu.h"
 #include "test_sdram.h"
 
 #include <string.h>
@@ -420,6 +421,7 @@ main()
     configure_cli_fpga(&cli);
     configure_cli_test(&cli);
     configure_cli_misc(&cli);
+    configure_cli_dfu(&cli);
 
     led_off(LED_RED);
     led_on(LED_GREEN);
diff --git a/projects/cli-test/filetransfer b/projects/cli-test/filetransfer
index 2b74570..025a6ac 100755
--- a/projects/cli-test/filetransfer
+++ b/projects/cli-test/filetransfer
@@ -40,6 +40,7 @@ import argparse
 from binascii import crc32
 
 CHUNK_SIZE = 256
+DFU_CHUNK_SIZE = 256
 FPGA_CHUNK_SIZE = 4096
 
 
@@ -57,6 +58,11 @@ def parse_args():
                         action='store_true', default=False,
                         help='Perform FPGA bitstream upload',
                         )
+    parser.add_argument('--dfu',
+                        dest='dfu',
+                        action='store_true', default=False,
+                        help='Perform DFU application upload',
+                        )
 
     parser.add_argument('--device',
                         dest='device',
@@ -117,6 +123,9 @@ def send_file(filename, args, dst):
         src.read(0x64)
         chunk_size = FPGA_CHUNK_SIZE
         response = _execute(dst, 'fpga bitstream upload')
+    elif args.dfu:
+        chunk_size = DFU_CHUNK_SIZE
+        response = _execute(dst, 'dfu upload')
     else:
         chunk_size = CHUNK_SIZE
         response = _execute(dst, 'filetransfer')
diff --git a/projects/cli-test/mgmt-cli.c b/projects/cli-test/mgmt-cli.c
index faaafda..46faae8 100644
--- a/projects/cli-test/mgmt-cli.c
+++ b/projects/cli-test/mgmt-cli.c
@@ -31,7 +31,6 @@
  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
-#include "stm32f4xx_hal.h"
 #include "stm-init.h"
 #include "stm-uart.h"
 #include "mgmt-cli.h"
diff --git a/projects/cli-test/mgmt-cli.h b/projects/cli-test/mgmt-cli.h
index e6780a3..cf8444f 100644
--- a/projects/cli-test/mgmt-cli.h
+++ b/projects/cli-test/mgmt-cli.h
@@ -35,7 +35,7 @@
 #ifndef __STM32_MGMT_CLI_H
 #define __STM32_MGMT_CLI_H
 
-#include "stm32f4xx_hal.h"
+#include "stm-init.h"
 #include <libcli.h>
 
 
diff --git a/projects/cli-test/mgmt-dfu.c b/projects/cli-test/mgmt-dfu.c
new file mode 100644
index 0000000..1f8aa0a
--- /dev/null
+++ b/projects/cli-test/mgmt-dfu.c
@@ -0,0 +1,187 @@
+/*
+ * mgmt-dfu.c
+ * ---------
+ * Management CLI Device Firmware Upgrade code.
+ *
+ * Copyright (c) 2016, NORDUnet A/S All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are
+ * met:
+ * - Redistributions of source code must retain the above copyright notice,
+ *   this list of conditions and the following disclaimer.
+ *
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ *
+ * - Neither the name of the NORDUnet nor the names of its contributors may
+ *   be used to endorse or promote products derived from this software
+ *   without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
+ * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
+ * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
+ * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
+ * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
+ * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
+ * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "stm-init.h"
+#include "mgmt-cli.h"
+#include "stm-uart.h"
+#include "cmsis_nvic.h"
+
+#include <string.h>
+
+
+#define DFU_BASE_ADDRESS	0x08100000
+#define DFU_BASE_PTR		(__IO uint32_t *) DFU_BASE_ADDRESS
+
+
+extern uint32_t update_crc(uint32_t crc, uint8_t *buf, int len);
+
+
+/* The chunk size have to be a multiple of the SPI flash page size (256 bytes),
+   and it has to match the chunk size in the program sending the bitstream over the UART.
+*/
+#define DFU_UPLOAD_CHUNK_SIZE 256
+
+int cmd_dfu_upload(struct cli_def *cli, const char *command, char *argv[], int argc)
+{
+    uint32_t filesize = 0, crc = 0, my_crc = 0, counter = 0, i, j;
+    uint32_t offset = 0, n = DFU_UPLOAD_CHUNK_SIZE;
+    uint32_t buf[DFU_UPLOAD_CHUNK_SIZE / 4];
+    FLASH_EraseInitTypeDef FLASH_EraseInitStruct;
+    uint32_t SectorError = 0;
+
+    cli_print(cli, "OK, write DFU application file size (4 bytes), data in %i byte chunks, CRC-32 (4 bytes)",
+	      DFU_UPLOAD_CHUNK_SIZE);
+
+    /* Read file size (4 bytes) */
+    uart_receive_bytes(STM_UART_MGMT, (void *) &filesize, 4, 1000);
+    cli_print(cli, "File size %li", filesize);
+
+    HAL_FLASH_Unlock();
+
+    FLASH_EraseInitStruct.TypeErase = TYPEERASE_SECTORS;
+    FLASH_EraseInitStruct.Sector = 12; /* the sector for DFU_BASE_ADDRESS (0x08100000) */
+    FLASH_EraseInitStruct.NbSectors = 1;
+    FLASH_EraseInitStruct.VoltageRange = VOLTAGE_RANGE_3;
+
+    if (HAL_FLASHEx_Erase(&FLASH_EraseInitStruct, &SectorError) != HAL_OK) {
+	cli_print(cli, "Failed erasing flash sector");
+	return CLI_ERROR;
+    }
+
+    while (filesize) {
+	/* By initializing buf to the same value that erased flash has (0xff), we don't
+	 * have to try and be smart when writing the last page of data to the memory.
+	 */
+	memset(buf, 0xffffffff, sizeof(buf));
+
+	if (filesize < n) {
+	    n = filesize;
+	}
+
+	if (uart_receive_bytes(STM_UART_MGMT, (void *) &buf, n, 1000) != HAL_OK) {
+	    cli_print(cli, "Receive timed out");
+	    return CLI_ERROR;
+	}
+	filesize -= n;
+
+	/* After reception of a chunk but before ACKing we have "all" the time in the world to
+	 * calculate CRC and write it to flash.
+	 */
+	my_crc = update_crc(my_crc, (uint8_t *) buf, n);
+
+	for (i = 0; i < DFU_UPLOAD_CHUNK_SIZE / 4; i++) {
+	    if ((j = HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, DFU_BASE_ADDRESS + offset, buf[i])) != HAL_OK) {
+		cli_print(cli, "Failed writing data at offset %li: %li", offset, j);
+		return CLI_ERROR;
+	    }
+	    offset += 4;
+	}
+
+	/* ACK this chunk by sending the current chunk counter (4 bytes) */
+	counter++;
+	uart_send_bytes(STM_UART_MGMT, (void *) &counter, 4);
+    }
+
+    HAL_FLASH_Lock();
+
+    /* The sending side will now send it's calculated CRC-32 */
+    cli_print(cli, "Send CRC-32");
+    uart_receive_bytes(STM_UART_MGMT, (void *) &crc, 4, 1000);
+    cli_print(cli, "CRC-32 %li", crc);
+    if (crc == my_crc) {
+	cli_print(cli, "CRC checksum MATCHED");
+    } else {
+	cli_print(cli, "CRC checksum did NOT match");
+    }
+
+    return CLI_OK;
+}
+
+int cmd_dfu_dump(struct cli_def *cli, const char *command, char *argv[], int argc)
+{
+    cli_print(cli, "First 256 bytes from DFU application address %p:\r\n", DFU_BASE_PTR);
+
+    uart_send_hexdump(STM_UART_MGMT, (uint8_t *) DFU_BASE_PTR, 0, 0xff);
+    uart_send_string2(STM_UART_MGMT, (char *) "\r\n\r\n");
+
+    return CLI_OK;
+}
+
+typedef  int (*pFunction)(void);
+
+int cmd_dfu_jump(struct cli_def *cli, const char *command, char *argv[], int argc)
+{
+    uint32_t new_msp, i;
+    /* Load first byte from the DFU_BASE_PTR to verify it contains an IVT before
+     * jumping there.
+     */
+    new_msp = *DFU_BASE_PTR;
+    i = new_msp & 0xFF000000;
+    /* 'i' is supposed to be a pointer to the new applications stack, it should
+     * point either at RAM (0x20000000) or at the CCM memory (0x10000000).
+     */
+    if (i == 0x20000000 || i == 0x10000000) {
+	uint32_t jmp_to = *(DFU_BASE_PTR + 1);
+	pFunction loaded_app = (pFunction) jmp_to;
+
+	__disable_irq();
+	HAL_NVIC_DisableIRQ(SysTick_IRQn);
+
+	HAL_DeInit();
+
+	/* Relocate interrupt vector table */
+	//NVIC_SetVectorTable(DFU_BASE_ADDRESS);
+	SCB->VTOR == DFU_BASE_ADDRESS;
+	NVIC_SetVector(WWDG_IRQn, *DFU_BASE_PTR + 1);
+
+	/* Re-initialize stack pointer */
+	__set_MSP(new_msp);
+	/* Jump to the DFU loaded application */
+	loaded_app();
+	Error_Handler();
+    } else {
+	cli_print(cli, "No loaded application found at %p", DFU_BASE_PTR);
+    }
+
+    return CLI_OK;
+}
+
+void configure_cli_dfu(struct cli_def *cli)
+{
+    cli_command_root(dfu);
+
+    cli_command_node(dfu, dump, "Show the first 256 bytes of the loaded application");
+    cli_command_node(dfu, jump, "Jump to the loaded application");
+    cli_command_node(dfu, upload, "Load a new application");
+}
diff --git a/projects/cli-test/test_sdram.h b/projects/cli-test/mgmt-dfu.h
similarity index 78%
copy from projects/cli-test/test_sdram.h
copy to projects/cli-test/mgmt-dfu.h
index b848d18..c38a63e 100644
--- a/projects/cli-test/test_sdram.h
+++ b/projects/cli-test/mgmt-dfu.h
@@ -1,7 +1,7 @@
 /*
- * test_sdram.h
- * ------------
- * Prototypes and defines for testing the 2x512 MBit SDRAM working memory.
+ * mgmt-dfu.h
+ * ---------
+ * Management CLI Device Firmware Upgrade code.
  *
  * Copyright (c) 2016, NORDUnet A/S All rights reserved.
  *
@@ -31,12 +31,14 @@
  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
-extern uint32_t lfsr1;
-extern uint32_t lfsr2;
 
-extern int test_sdram_sequential(uint32_t *base_addr);
-extern int test_sdram_random(uint32_t *base_addr);
-extern int test_sdrams_interleaved(uint32_t *base_addr1, uint32_t *base_addr2);
+#ifndef __STM32_CLI_MGMT_DFU_H
+#define __STM32_CLI_MGMT_DFU_H
 
-extern uint32_t lfsr_next_32(uint32_t lfsr);
-extern uint32_t lfsr_next_24(uint32_t lfsr);
+#include "stm-init.h"
+#include <libcli.h>
+
+
+extern void configure_cli_dfu(struct cli_def *cli);
+
+#endif /* __STM32_CLI_MGMT_DFU_H */
diff --git a/projects/cli-test/test_sdram.h b/projects/cli-test/test_sdram.h
index b848d18..3076aa1 100644
--- a/projects/cli-test/test_sdram.h
+++ b/projects/cli-test/test_sdram.h
@@ -31,6 +31,9 @@
  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
+#ifndef __STM32_CLI_TEST_SDRAM_H
+#define __STM32_CLI_TEST_SDRAM_H
+
 extern uint32_t lfsr1;
 extern uint32_t lfsr2;
 
@@ -40,3 +43,5 @@ extern int test_sdrams_interleaved(uint32_t *base_addr1, uint32_t *base_addr2);
 
 extern uint32_t lfsr_next_32(uint32_t lfsr);
 extern uint32_t lfsr_next_24(uint32_t lfsr);
+
+#endif /* __STM32_CLI_TEST_SDRAM_H */



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