[Cryptech-Commits] [hardware] branch master updated (4bb3cfc -> 4afe0c5)
git at cryptech.is
git at cryptech.is
Thu Jul 21 08:36:23 UTC 2016
This is an automated email from the git hooks/post-receive script.
fredrik at thulin.net pushed a change to branch master
in repository hardware.
from 4bb3cfc Gerber and drill files for Alpha rev02, as received from Pavel/Infotecs.
new cfe1eea move to subdirectory
new 8ae0e55 Manufacturing files for rev03, as received from Pavel.
new 4686ce4 reorganize
new 4afe0c5 Altium Designer source files for rev03, as received from Pavel.
The 4 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
{eagle/dev-bridge => cad}/rev01/rev01.brd | 0
{eagle/dev-bridge => cad}/rev01/rev01.sch | 0
{eagle => cad/rev02}/alpha/rev02/rev02-bom.csv | 0
{eagle => cad/rev02}/alpha/rev02/rev02.brd | 0
{eagle => cad/rev02}/alpha/rev02/rev02.sch | 0
{eagle => cad/rev02}/lbr/Alpha-IC.lbr | 0
{eagle => cad/rev02}/lbr/Alpha-Power.lbr | 0
cad/rev03/CHIPS.PcbLib | Bin 0 -> 3103232 bytes
cad/rev03/Components.PcbLib | Bin 0 -> 5495808 bytes
cad/rev03/Connectors.PcbLib | Bin 0 -> 3147776 bytes
cad/rev03/CrypTech.PcbDoc | Bin 0 -> 8497664 bytes
cad/rev03/rev02.OutJob | 130 +
cad/rev03/rev02.PcbLib | Bin 0 -> 1762304 bytes
cad/rev03/rev02.PrjPcb | 2344 +++
cad/rev03/rev02.PrjPcbStructure | 1 +
cad/rev03/rev02_0.SchDoc | Bin 0 -> 939008 bytes
cad/rev03/rev02_1.SCHLIB | Bin 0 -> 1301504 bytes
cad/rev03/rev02_1.SchDoc | Bin 0 -> 126976 bytes
cad/rev03/rev02_10.SchDoc | Bin 0 -> 171520 bytes
cad/rev03/rev02_11.SchDoc | Bin 0 -> 131584 bytes
cad/rev03/rev02_12.SchDoc | Bin 0 -> 99328 bytes
cad/rev03/rev02_13.SchDoc | Bin 0 -> 339456 bytes
cad/rev03/rev02_14.SchDoc | Bin 0 -> 1239552 bytes
cad/rev03/rev02_15.SchDoc | Bin 0 -> 129024 bytes
cad/rev03/rev02_16.SchDoc | Bin 0 -> 502784 bytes
cad/rev03/rev02_17.SchDoc | Bin 0 -> 535552 bytes
cad/rev03/rev02_18.SchDoc | Bin 0 -> 144384 bytes
cad/rev03/rev02_19.SchDoc | Bin 0 -> 348672 bytes
cad/rev03/rev02_2.SchDoc | Bin 0 -> 69120 bytes
cad/rev03/rev02_20.SchDoc | Bin 0 -> 277504 bytes
cad/rev03/rev02_21.SchDoc | Bin 0 -> 1342464 bytes
cad/rev03/rev02_22.SchDoc | Bin 0 -> 202752 bytes
cad/rev03/rev02_23.SchDoc | Bin 0 -> 193024 bytes
cad/rev03/rev02_24.SchDoc | Bin 0 -> 100864 bytes
cad/rev03/rev02_25.SchDoc | Bin 0 -> 77312 bytes
cad/rev03/rev02_3.SchDoc | Bin 0 -> 184320 bytes
cad/rev03/rev02_4.SchDoc | Bin 0 -> 228352 bytes
cad/rev03/rev02_5.SchDoc | Bin 0 -> 285696 bytes
cad/rev03/rev02_6.SchDoc | Bin 0 -> 250368 bytes
cad/rev03/rev02_7.SchDoc | Bin 0 -> 29696 bytes
cad/rev03/rev02_8.SchDoc | Bin 0 -> 40448 bytes
cad/rev03/rev02_9.SchDoc | Bin 0 -> 170496 bytes
cad/rev03/rev03.txt | 18 +
production_files/alpha/{ => rev02}/Layers.txt | 0
production_files/alpha/{ => rev02}/Notes.txt | 0
production_files/alpha/{ => rev02}/Stackup.xls | Bin
.../alpha/{ => rev02}/cryptech_28032016.bot | 0
.../alpha/{ => rev02}/cryptech_28032016.brd | 0
.../alpha/{ => rev02}/cryptech_28032016.drn | 0
.../alpha/{ => rev02}/cryptech_28032016.drp | 0
.../alpha/{ => rev02}/cryptech_28032016.in1 | 0
.../alpha/{ => rev02}/cryptech_28032016.in2 | 0
.../alpha/{ => rev02}/cryptech_28032016.in3 | 0
.../alpha/{ => rev02}/cryptech_28032016.in4 | 0
.../alpha/{ => rev02}/cryptech_28032016.in5 | 0
.../alpha/{ => rev02}/cryptech_28032016.in6 | 0
.../alpha/{ => rev02}/cryptech_28032016.mil | 0
.../alpha/{ => rev02}/cryptech_28032016.psb | 0
.../alpha/{ => rev02}/cryptech_28032016.pst | 0
.../alpha/{ => rev02}/cryptech_28032016.slb | 0
.../alpha/{ => rev02}/cryptech_28032016.slt | 0
.../alpha/{ => rev02}/cryptech_28032016.smb | 0
.../alpha/{ => rev02}/cryptech_28032016.smt | 0
.../alpha/{ => rev02}/cryptech_28032016.top | 0
.../alpha/rev03/BOM/Alpha_BOM_20160528.csv | 46 +
.../alpha/rev03/BOM/Alpha_BOM_20160528.xls | Bin 0 -> 26112 bytes
.../rev03/BOM/Alpha_BOM_Capacitors_20160528.csv | 15 +
.../rev03/BOM/Alpha_BOM_Capacitors_20160528.xls | Bin 0 -> 20992 bytes
.../rev03/BOM/Alpha_BOM_Resistors_20160528.csv | 24 +
.../rev03/BOM/Alpha_BOM_Resistors_20160528.xls | Bin 0 -> 20992 bytes
.../alpha/rev03/CrypTech Description PCB.docx | Bin 0 -> 127638 bytes
.../alpha/rev03/Cryptech Assembly Drawings.pdf | Bin 0 -> 90739 bytes
.../alpha/rev03/Cryptech Drill Drawing.pdf | Bin 0 -> 87771 bytes
.../Gerbers/CrypTech-RoundHoles-NonPlated.DRL | 13 +
.../rev03/Gerbers/CrypTech-RoundHoles-Plated.DRL | 1644 +++
.../rev03/Gerbers/CrypTech-SlotHoles-Plated.DRL | 24 +
production_files/alpha/rev03/Gerbers/CrypTech.G1 | 10561 ++++++++++++++
production_files/alpha/rev03/Gerbers/CrypTech.G2 | 10959 ++++++++++++++
production_files/alpha/rev03/Gerbers/CrypTech.GBL | 12080 ++++++++++++++++
production_files/alpha/rev03/Gerbers/CrypTech.GBO | 4828 +++++++
production_files/alpha/rev03/Gerbers/CrypTech.GBP | 2574 ++++
production_files/alpha/rev03/Gerbers/CrypTech.GBS | 2904 ++++
production_files/alpha/rev03/Gerbers/CrypTech.GM1 | 53 +
production_files/alpha/rev03/Gerbers/CrypTech.GP1 | 2181 +++
production_files/alpha/rev03/Gerbers/CrypTech.GP2 | 3065 ++++
production_files/alpha/rev03/Gerbers/CrypTech.GP3 | 2689 ++++
production_files/alpha/rev03/Gerbers/CrypTech.GP4 | 2181 +++
production_files/alpha/rev03/Gerbers/CrypTech.GTL | 9865 +++++++++++++
production_files/alpha/rev03/Gerbers/CrypTech.GTO | 14390 +++++++++++++++++++
production_files/alpha/rev03/Gerbers/CrypTech.GTP | 1621 +++
production_files/alpha/rev03/Gerbers/CrypTech.GTS | 1829 +++
production_files/alpha/rev03/Layers.docx | Bin 0 -> 13371 bytes
.../alpha/rev03/Pick Place for CrypTech.csv | 388 +
production_files/alpha/{ => rev03}/Stackup.xls | Bin 30720 -> 30720 bytes
{eagle/alpha/rev02 => schematics}/rev02.pdf | Bin
schematics/rev03.pdf | Bin 0 -> 5280455 bytes
96 files changed, 86427 insertions(+)
rename {eagle/dev-bridge => cad}/rev01/rev01.brd (100%)
rename {eagle/dev-bridge => cad}/rev01/rev01.sch (100%)
rename {eagle => cad/rev02}/alpha/rev02/rev02-bom.csv (100%)
rename {eagle => cad/rev02}/alpha/rev02/rev02.brd (100%)
rename {eagle => cad/rev02}/alpha/rev02/rev02.sch (100%)
rename {eagle => cad/rev02}/lbr/Alpha-IC.lbr (100%)
rename {eagle => cad/rev02}/lbr/Alpha-Power.lbr (100%)
create mode 100644 cad/rev03/CHIPS.PcbLib
create mode 100644 cad/rev03/Components.PcbLib
create mode 100644 cad/rev03/Connectors.PcbLib
create mode 100644 cad/rev03/CrypTech.PcbDoc
create mode 100644 cad/rev03/rev02.OutJob
create mode 100644 cad/rev03/rev02.PcbLib
create mode 100644 cad/rev03/rev02.PrjPcb
create mode 100644 cad/rev03/rev02.PrjPcbStructure
create mode 100644 cad/rev03/rev02_0.SchDoc
create mode 100644 cad/rev03/rev02_1.SCHLIB
create mode 100644 cad/rev03/rev02_1.SchDoc
create mode 100644 cad/rev03/rev02_10.SchDoc
create mode 100644 cad/rev03/rev02_11.SchDoc
create mode 100644 cad/rev03/rev02_12.SchDoc
create mode 100644 cad/rev03/rev02_13.SchDoc
create mode 100644 cad/rev03/rev02_14.SchDoc
create mode 100644 cad/rev03/rev02_15.SchDoc
create mode 100644 cad/rev03/rev02_16.SchDoc
create mode 100644 cad/rev03/rev02_17.SchDoc
create mode 100644 cad/rev03/rev02_18.SchDoc
create mode 100644 cad/rev03/rev02_19.SchDoc
create mode 100644 cad/rev03/rev02_2.SchDoc
create mode 100644 cad/rev03/rev02_20.SchDoc
create mode 100644 cad/rev03/rev02_21.SchDoc
create mode 100644 cad/rev03/rev02_22.SchDoc
create mode 100644 cad/rev03/rev02_23.SchDoc
create mode 100644 cad/rev03/rev02_24.SchDoc
create mode 100644 cad/rev03/rev02_25.SchDoc
create mode 100644 cad/rev03/rev02_3.SchDoc
create mode 100644 cad/rev03/rev02_4.SchDoc
create mode 100644 cad/rev03/rev02_5.SchDoc
create mode 100644 cad/rev03/rev02_6.SchDoc
create mode 100644 cad/rev03/rev02_7.SchDoc
create mode 100644 cad/rev03/rev02_8.SchDoc
create mode 100644 cad/rev03/rev02_9.SchDoc
create mode 100644 cad/rev03/rev03.txt
rename production_files/alpha/{ => rev02}/Layers.txt (100%)
rename production_files/alpha/{ => rev02}/Notes.txt (100%)
copy production_files/alpha/{ => rev02}/Stackup.xls (100%)
rename production_files/alpha/{ => rev02}/cryptech_28032016.bot (100%)
rename production_files/alpha/{ => rev02}/cryptech_28032016.brd (100%)
rename production_files/alpha/{ => rev02}/cryptech_28032016.drn (100%)
rename production_files/alpha/{ => rev02}/cryptech_28032016.drp (100%)
rename production_files/alpha/{ => rev02}/cryptech_28032016.in1 (100%)
rename production_files/alpha/{ => rev02}/cryptech_28032016.in2 (100%)
rename production_files/alpha/{ => rev02}/cryptech_28032016.in3 (100%)
rename production_files/alpha/{ => rev02}/cryptech_28032016.in4 (100%)
rename production_files/alpha/{ => rev02}/cryptech_28032016.in5 (100%)
rename production_files/alpha/{ => rev02}/cryptech_28032016.in6 (100%)
rename production_files/alpha/{ => rev02}/cryptech_28032016.mil (100%)
rename production_files/alpha/{ => rev02}/cryptech_28032016.psb (100%)
rename production_files/alpha/{ => rev02}/cryptech_28032016.pst (100%)
rename production_files/alpha/{ => rev02}/cryptech_28032016.slb (100%)
rename production_files/alpha/{ => rev02}/cryptech_28032016.slt (100%)
rename production_files/alpha/{ => rev02}/cryptech_28032016.smb (100%)
rename production_files/alpha/{ => rev02}/cryptech_28032016.smt (100%)
rename production_files/alpha/{ => rev02}/cryptech_28032016.top (100%)
create mode 100644 production_files/alpha/rev03/BOM/Alpha_BOM_20160528.csv
create mode 100644 production_files/alpha/rev03/BOM/Alpha_BOM_20160528.xls
create mode 100644 production_files/alpha/rev03/BOM/Alpha_BOM_Capacitors_20160528.csv
create mode 100644 production_files/alpha/rev03/BOM/Alpha_BOM_Capacitors_20160528.xls
create mode 100644 production_files/alpha/rev03/BOM/Alpha_BOM_Resistors_20160528.csv
create mode 100644 production_files/alpha/rev03/BOM/Alpha_BOM_Resistors_20160528.xls
create mode 100644 production_files/alpha/rev03/CrypTech Description PCB.docx
create mode 100644 production_files/alpha/rev03/Cryptech Assembly Drawings.pdf
create mode 100644 production_files/alpha/rev03/Cryptech Drill Drawing.pdf
create mode 100644 production_files/alpha/rev03/Gerbers/CrypTech-RoundHoles-NonPlated.DRL
create mode 100644 production_files/alpha/rev03/Gerbers/CrypTech-RoundHoles-Plated.DRL
create mode 100644 production_files/alpha/rev03/Gerbers/CrypTech-SlotHoles-Plated.DRL
create mode 100644 production_files/alpha/rev03/Gerbers/CrypTech.G1
create mode 100644 production_files/alpha/rev03/Gerbers/CrypTech.G2
create mode 100644 production_files/alpha/rev03/Gerbers/CrypTech.GBL
create mode 100644 production_files/alpha/rev03/Gerbers/CrypTech.GBO
create mode 100644 production_files/alpha/rev03/Gerbers/CrypTech.GBP
create mode 100644 production_files/alpha/rev03/Gerbers/CrypTech.GBS
create mode 100644 production_files/alpha/rev03/Gerbers/CrypTech.GM1
create mode 100644 production_files/alpha/rev03/Gerbers/CrypTech.GP1
create mode 100644 production_files/alpha/rev03/Gerbers/CrypTech.GP2
create mode 100644 production_files/alpha/rev03/Gerbers/CrypTech.GP3
create mode 100644 production_files/alpha/rev03/Gerbers/CrypTech.GP4
create mode 100644 production_files/alpha/rev03/Gerbers/CrypTech.GTL
create mode 100644 production_files/alpha/rev03/Gerbers/CrypTech.GTO
create mode 100644 production_files/alpha/rev03/Gerbers/CrypTech.GTP
create mode 100644 production_files/alpha/rev03/Gerbers/CrypTech.GTS
create mode 100644 production_files/alpha/rev03/Layers.docx
create mode 100644 production_files/alpha/rev03/Pick Place for CrypTech.csv
rename production_files/alpha/{ => rev03}/Stackup.xls (99%)
rename {eagle/alpha/rev02 => schematics}/rev02.pdf (100%)
create mode 100644 schematics/rev03.pdf
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