[Cryptech-Commits] [sw/libhal] branch master updated: More post-merge cleanup.

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paul at psgd.org pushed a commit to branch master
in repository sw/libhal.

The following commit(s) were added to refs/heads/master by this push:
       new  03e6a67   More post-merge cleanup.
03e6a67 is described below

commit 03e6a672c964ebaf0e61018b0a7a63edb2748990
Author: Paul Selkirk <paul at psgd.org>
Date:   Tue Nov 17 23:45:17 2015 -0500

    More post-merge cleanup.
    
    - Joachim says always check entropy and csprng for 'valid' before reading.
    - Harmonize RNG status valid bit with other cores.
    - Clean up compiler warnings about printf formats.
---
 csprng.c            |  2 +-
 tests/test-bus.c    |  2 +-
 tests/test-trng.c   | 15 +++++----------
 verilog_constants.h |  2 +-
 4 files changed, 8 insertions(+), 13 deletions(-)

diff --git a/csprng.c b/csprng.c
index 9517d0d..24a4c05 100644
--- a/csprng.c
+++ b/csprng.c
@@ -38,7 +38,7 @@
 #include "verilog_constants.h"
 
 #ifndef WAIT_FOR_CSPRNG_VALID
-#define WAIT_FOR_CSPRNG_VALID   0
+#define WAIT_FOR_CSPRNG_VALID   1
 #endif
 
 hal_error_t hal_get_random(const hal_core_t *core, void *buffer, const size_t length)
diff --git a/tests/test-bus.c b/tests/test-bus.c
index d30f3fc..1c60e5d 100644
--- a/tests/test-bus.c
+++ b/tests/test-bus.c
@@ -68,7 +68,7 @@ static int sanity(const hal_core_t *board_core)
     }
 
     if (data != rnd) {
-        printf("Data bus fail: expected %08lx, got %08lx, diff %08lx\n", rnd, data, data ^ rnd);
+        printf("Data bus fail: expected %08x, got %08x, diff %08x\n", rnd, data, data ^ rnd);
         return 1;
     }
 
diff --git a/tests/test-trng.c b/tests/test-trng.c
index 8ca64e0..ebfe701 100644
--- a/tests/test-trng.c
+++ b/tests/test-trng.c
@@ -46,7 +46,7 @@
 #include <verilog_constants.h>
 
 #ifndef WAIT_FOR_CSPRNG_VALID
-#define WAIT_FOR_CSPRNG_VALID   0
+#define WAIT_FOR_CSPRNG_VALID   1
 #endif
 
 static void show_core(const hal_core_t *core, const char *whinge)
@@ -71,12 +71,7 @@ static hal_error_t test_random(const char *name)
         return HAL_ERROR_CORE_NOT_FOUND;
 
     for (i = 0; i < 8; ++i) {
-	/* The entropy sources are faster than the bus speed, so querying
-	 * the "status_valid" bit always returns true. Also, at the
-	 * moment, the trng cores use bit 0 for valid, while all the other
-	 * cores use bit 1, so we query the "status_ready" bit.
-	 */
-	if (WAIT_FOR_CSPRNG_VALID && (err = hal_io_wait_ready(core)) != HAL_OK) {
+	if (WAIT_FOR_CSPRNG_VALID && (err = hal_io_wait_valid(core)) != HAL_OK) {
 	    printf("hal_io_wait_valid: %s\n", hal_error_string(err));
 	    return err;
         }
@@ -89,7 +84,7 @@ static hal_error_t test_random(const char *name)
             return err;
         }
 
-        printf("%08lx ", rnd);
+        printf("%08x ", rnd);
     }
     printf("\n");
 
@@ -105,13 +100,13 @@ int main(void)
     /* Exercise the API function. This gets random data from the CSPRNG,
      * so we end up hitting that twice.
      */
-    printf("hal_get_random:\n");
+    printf("hal_get_random\n");
     if ((err = hal_get_random(NULL, (void *) &rnd, sizeof(rnd))) != HAL_OK) {
 	printf("hal_get_random: %s\n", hal_error_string(err));
     }
     else {
 	for (i = 0; i < 8; ++i) {
-	    printf("%08lx ", rnd[i]);
+	    printf("%08x ", rnd[i]);
 	}
 	printf("\n");
     }
diff --git a/verilog_constants.h b/verilog_constants.h
index f30a979..879d2af 100644
--- a/verilog_constants.h
+++ b/verilog_constants.h
@@ -41,7 +41,7 @@
 #define _VERILOG_CONSTANTS_H_
 
 /*
- * Common to all (well, almost all) cores.
+ * Common to all cores.
  */
 #define ADDR_NAME0              (0x00)
 #define ADDR_NAME1              (0x01)

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