[Cryptech-Commits] [core/platform/common] 01/01: Fixed missing assignment to debug port if the RNGS segment is not enabled. Moved default assignments in output select to before the case to make ISE happier. Added proper name of process.
git at cryptech.is
git at cryptech.is
Fri May 8 12:46:05 UTC 2015
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joachim at secworks.se pushed a commit to branch master
in repository core/platform/common.
commit f05a3c65ec65004b097cb63d5ac6d463a7a9dc2f
Author: Joachim Strömbergson <joachim at secworks.se>
Date: Fri May 8 14:45:57 2015 +0200
Fixed missing assignment to debug port if the RNGS segment is not enabled. Moved default assignments in output select to before the case to make ISE happier. Added proper name of process.
---
core_selector/src/rtl/core_selector.v | 22 +++++++++++++++-------
1 file changed, 15 insertions(+), 7 deletions(-)
diff --git a/core_selector/src/rtl/core_selector.v b/core_selector/src/rtl/core_selector.v
index 0d3d158..79c1fa4 100644
--- a/core_selector/src/rtl/core_selector.v
+++ b/core_selector/src/rtl/core_selector.v
@@ -152,6 +152,7 @@ module core_selector
wire segment_enable_rngs = (addr_segment == SEGMENT_ADDR_RNGS) ? 1'b1 : 1'b0;
wire [31: 0] segment_rngs_read_data;
wire segment_rngs_error;
+ wire [7 : 0] segment_rngs_debug;
rng_selector rngs
(
@@ -167,7 +168,7 @@ module core_selector
.sys_error(segment_rngs_error),
.noise(noise), // only RNG segment uses these ports
- .debug(debug)
+ .debug(segment_rngs_debug)
);
`endif
@@ -178,7 +179,6 @@ module core_selector
`ifdef USE_SEGMENT_CIPHERS
wire segment_enable_ciphers = (addr_segment == SEGMENT_ADDR_CIPHERS) ? 1'b1 : 1'b0;
wire [31: 0] segment_ciphers_read_data;
- wire segment_ciphers_error;
cipher_selector ciphers
(
@@ -222,12 +222,20 @@ module core_selector
// Output (Read Data) Bus
//----------------------------------------------------------------
reg [31: 0] sys_read_data_reg;
- assign sys_read_data = sys_read_data_reg;
+ reg [07: 0] sys_debug;
reg sys_error_reg;
- assign sys_error = sys_error_reg;
+
+ assign sys_read_data = sys_read_data_reg;
+ assign sys_error = sys_error_reg;
+ assign debug = sys_debug;
always @*
- //
+ begin : output_select
+ sys_debug = 8'h00;
+ sys_read_data_reg = {32{1'b0}};
+ sys_error_reg = 1;
+ sys_debug = 8'h00;
+
case (addr_segment)
`ifdef USE_SEGMENT_GLOBALS
SEGMENT_ADDR_GLOBALS:
@@ -248,6 +256,7 @@ module core_selector
begin
sys_read_data_reg = segment_rngs_read_data;
sys_error_reg = segment_rngs_error;
+ sys_debug = segment_rngs_debug;
end
`endif
`ifdef USE_SEGMENT_CIPHERS
@@ -266,10 +275,9 @@ module core_selector
`endif
default:
begin
- sys_read_data_reg = {32{1'b0}};
- sys_error_reg = 1;
end
endcase
+ end // output_select
endmodule
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