[Cryptech-Commits] [core/math/modexp] 04/05: Collapsing cycles for loop counter. Updating testbench to match removed cycles.
git at cryptech.is
git at cryptech.is
Tue Jun 16 13:57:56 UTC 2015
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joachim at secworks.se pushed a commit to branch perfopt
in repository core/math/modexp.
commit aa58db8cf671c6abcbc8d918bac4345d2f22d809
Author: Joachim Strömbergson <joachim at secworks.se>
Date: Tue Jun 16 15:57:14 2015 +0200
Collapsing cycles for loop counter. Updating testbench to match removed cycles.
---
src/rtl/montprod.v | 76 ++++++++++++++++++++++++++++------------------------
src/tb/tb_montprod.v | 8 ++----
2 files changed, 43 insertions(+), 41 deletions(-)
diff --git a/src/rtl/montprod.v b/src/rtl/montprod.v
index 7102e6e..927356f 100644
--- a/src/rtl/montprod.v
+++ b/src/rtl/montprod.v
@@ -121,6 +121,8 @@ module montprod(
reg [12 : 0] loop_counter_reg;
reg [12 : 0] loop_counter_new;
reg loop_counter_we;
+ reg loop_counter_set;
+ reg loop_counter_dec;
reg [07 : 0] B_word_index; //loop counter as a word index
reg [04 : 0] B_bit_index; //loop counter as a bit index
@@ -155,6 +157,8 @@ module montprod(
wire shr_carry_out;
wire [31 : 0] shr_adiv2;
+ reg in_iter;
+
//----------------------------------------------------------------
// Concurrent connectivity for ports etc.
@@ -310,43 +314,39 @@ module montprod(
//----------------------------------------------------------------
- // loop_counter_logic
- // Logic for the loop counter and setting related B indices.
+ // Process for iterating the loop counter and setting related B indexes
//----------------------------------------------------------------
always @*
- begin : loop_counter_logic
-
- loop_counter_new = 13'h000;
- loop_counter_we = 1'b0;
+ begin : loop_counter_process
+ loop_counter_new = loop_counter_reg;
+ loop_counter_we = 1'b0;
+ length_m1 = length - 1'b1;
+ B_bit_index = B_bit_index_reg;
- length_m1 = length - 1'b1;
- B_word_index = loop_counter_reg[12:5];
- B_bit_index = B_bit_index_reg;
-
- case (montprod_ctrl_reg)
- CTRL_LOOP_INIT:
- begin
- loop_counter_new = {length, 5'b00000} - 1'b1;
- loop_counter_we = 1'b1;
- end
+ if (loop_counter_set)
+ begin
+ loop_counter_new = {length, 5'b00000} - 1'b1;
+ loop_counter_we = 1'b1;
+ end
- CTRL_LOOP_ITER:
- begin
- B_word_index = loop_counter_reg[12:5];
- B_bit_index = 5'h1f - loop_counter_reg[4:0];
- end
+ case (montprod_ctrl_reg)
+ CTRL_LOOP_ITER:
+ begin
+ B_word_index = loop_counter_reg[12:5];
+ B_bit_index = 5'h1f - loop_counter_reg[4:0];
+ end
- CTRL_L_STALLPIPE_D2:
- begin
- loop_counter_new = loop_counter_reg - 1'b1;
- loop_counter_we = 1'b1;
- end
+ CTRL_L_STALLPIPE_D2:
+ begin
+ loop_counter_new = loop_counter_reg - 1'b1;
+ loop_counter_we = 1'b1;
+ end
- default:
- begin
- end
- endcase
- end
+ default:
+ begin
+ end
+ endcase
+ end
//----------------------------------------------------------------
@@ -472,6 +472,10 @@ module montprod(
montprod_ctrl_new = CTRL_IDLE;
montprod_ctrl_we = 1'b0;
+ loop_counter_set = 1'b0;
+ loop_counter_dec = 1'b0;
+ in_iter = 1'b0;
+
reset_word_index_LSW = 1'b0;
reset_word_index_MSW = 1'b0;
@@ -497,14 +501,14 @@ module montprod(
begin
if (word_index_reg == 8'h0)
begin
- montprod_ctrl_new = CTRL_LOOP_INIT;
- montprod_ctrl_we = 1'b1;
+ montprod_ctrl_new = CTRL_LOOP_INIT;
+ montprod_ctrl_we = 1'b1;
end
end
-
CTRL_LOOP_INIT:
begin
+ loop_counter_set = 1'b1;
montprod_ctrl_new = CTRL_LOOP_ITER;
montprod_ctrl_we = 1'b1;
end
@@ -513,6 +517,7 @@ module montprod(
// Also abort loop if done.
CTRL_LOOP_ITER:
begin
+ in_iter = 1'b1;
reset_word_index_LSW = 1'b1;
montprod_ctrl_new = CTRL_LOOP_BQ;
montprod_ctrl_we = 1'b1;
@@ -570,7 +575,8 @@ module montprod(
CTRL_L_STALLPIPE_D2:
begin
- montprod_ctrl_new = CTRL_LOOP_ITER; //loop
+ loop_counter_dec = 1'b1;
+ montprod_ctrl_new = CTRL_LOOP_ITER;
montprod_ctrl_we = 1'b1;
reset_word_index_LSW = 1'b1;
diff --git a/src/tb/tb_montprod.v b/src/tb/tb_montprod.v
index 2cadd78..bf9333e 100644
--- a/src/tb/tb_montprod.v
+++ b/src/tb/tb_montprod.v
@@ -212,8 +212,8 @@ module tb_montprod();
begin
$display("S[ 0 ]: %x", dut.s_mem.mem[0] );
- if (dut.s_mem_we)
- $display("Write to S[0x%02x]: 0x%08x", dut.s_mem_wr_addr, dut.s_mem_new);
+ if (dut.s_mem_we_reg)
+ $display("Write to S[0x%02x]: 0x%08x", dut.s_mem_wr_addr_reg, dut.s_mem_new);
end
end
@@ -243,8 +243,6 @@ module tb_montprod();
$display("FSM: IDLE");
dut.CTRL_INIT_S:
$display("FSM: INIT_S");
- dut.CTRL_LOOP_INIT:
- $display("FSM: LOOP_INIT");
dut.CTRL_LOOP_ITER:
$display("FSM: LOOP_ITER");
dut.CTRL_LOOP_BQ:
@@ -259,8 +257,6 @@ module tb_montprod();
$display("FSM: LOOP_CALC_SDIV2");
dut.CTRL_EMIT_S:
$display("FSM: LOOP_EMIT_S");
- dut.CTRL_DONE:
- $display("FSM: DONE");
default:
$display("FSM: %x", dut.montprod_ctrl_new);
endcase
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