[Cryptech-Commits] [core/rng/trng] 01/01: Adding task for reading words from the fifo. Reading out more than 16 words. Refactored w512 task.

git at cryptech.is git at cryptech.is
Sat Jul 18 07:33:19 UTC 2015


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joachim at secworks.se pushed a commit to branch fifo_debug
in repository core/rng/trng.

commit ac7c4871aef365a9d6c5511ab8fcb0aed15f60c1
Author: Joachim Strömbergson <joachim at secworks.se>
Date:   Sat Jul 18 09:33:12 2015 +0200

    Adding task for reading words from the fifo. Reading out more than 16 words. Refactored w512 task.
---
 src/tb/tb_csprng_fifo.v | 121 ++++++++++++++++++++++++++++++------------------
 1 file changed, 75 insertions(+), 46 deletions(-)

diff --git a/src/tb/tb_csprng_fifo.v b/src/tb/tb_csprng_fifo.v
index 2c4543d..a1bf73c 100644
--- a/src/tb/tb_csprng_fifo.v
+++ b/src/tb/tb_csprng_fifo.v
@@ -282,8 +282,51 @@ module tb_csprng_fifo();
   //
   // Writes a 512 bit data word into the fifo.
   //----------------------------------------------------------------
-  task write_w512(input [511 : 0] w512);
+  task write_w512(input [7 : 0] b);
+    reg [511 : 0] w512;
+    reg [31 : 0]  w00;
+    reg [31 : 0]  w01;
+    reg [31 : 0]  w02;
+    reg [31 : 0]  w03;
+    reg [31 : 0]  w04;
+    reg [31 : 0]  w05;
+    reg [31 : 0]  w06;
+    reg [31 : 0]  w07;
+    reg [31 : 0]  w08;
+    reg [31 : 0]  w09;
+    reg [31 : 0]  w10;
+    reg [31 : 0]  w11;
+    reg [31 : 0]  w12;
+    reg [31 : 0]  w13;
+    reg [31 : 0]  w14;
+    reg [31 : 0]  w15;
     begin
+      w00 = {(b + 8'd15), (b + 8'd15), (b + 8'd15), (b + 8'd15)};
+      w01 = {(b + 8'd14), (b + 8'd14), (b + 8'd14), (b + 8'd14)};
+      w02 = {(b + 8'd13), (b + 8'd13), (b + 8'd13), (b + 8'd13)};
+      w03 = {(b + 8'd12), (b + 8'd12), (b + 8'd12), (b + 8'd12)};
+      w04 = {(b + 8'd11), (b + 8'd11), (b + 8'd11), (b + 8'd11)};
+      w05 = {(b + 8'd10), (b + 8'd10), (b + 8'd10), (b + 8'd10)};
+      w06 = {(b + 8'd09), (b + 8'd09), (b + 8'd09), (b + 8'd09)};
+      w07 = {(b + 8'd08), (b + 8'd08), (b + 8'd08), (b + 8'd08)};
+
+      w08 = {(b + 8'd07), (b + 8'd07), (b + 8'd07), (b + 8'd07)};
+      w09 = {(b + 8'd06), (b + 8'd06), (b + 8'd06), (b + 8'd06)};
+      w10 = {(b + 8'd05), (b + 8'd05), (b + 8'd05), (b + 8'd05)};
+      w11 = {(b + 8'd04), (b + 8'd04), (b + 8'd04), (b + 8'd04)};
+      w12 = {(b + 8'd03), (b + 8'd03), (b + 8'd03), (b + 8'd03)};
+      w13 = {(b + 8'd02), (b + 8'd02), (b + 8'd02), (b + 8'd02)};
+      w14 = {(b + 8'd01), (b + 8'd01), (b + 8'd01), (b + 8'd01)};
+      w15 = {(b + 8'd00), (b + 8'd00), (b + 8'd00), (b + 8'd00)};
+
+      w512 = {w00, w01, w02, w03, w04, w05, w06, w07,
+              w08, w09, w10, w11, w12, w13, w14, w15};
+
+      wait_more_data();
+
+      dump_dut_state();
+      dump_fifo();
+
       $display("writing to fifo: 0x%0128x", w512);
       tb_csprng_data       = w512;
       tb_csprng_data_valid = 1;
@@ -294,6 +337,22 @@ module tb_csprng_fifo();
 
 
   //----------------------------------------------------------------
+  // read_w32()
+  //
+  // read a 32 bit data word from the fifo.
+  //----------------------------------------------------------------
+  task read_w32();
+    begin
+      $display("*** Reading from the fifo: 0x%08x", tb_rnd_data);
+      tb_rnd_ack = 1;
+      #(2 * CLK_PERIOD);
+      tb_rnd_ack = 0;
+      dump_dut_state();
+    end
+  endtask // read_w32
+
+
+  //----------------------------------------------------------------
   // fifo_test()
   //
   // Writes a number of 512-bit words to the FIFO and then
@@ -303,23 +362,6 @@ module tb_csprng_fifo();
   task fifo_test();
     reg [7 : 0]   i;
     reg [7 : 0]   j;
-    reg [511 : 0] w512;
-    reg [31 : 0]  w00;
-    reg [31 : 0]  w01;
-    reg [31 : 0]  w02;
-    reg [31 : 0]  w03;
-    reg [31 : 0]  w04;
-    reg [31 : 0]  w05;
-    reg [31 : 0]  w06;
-    reg [31 : 0]  w07;
-    reg [31 : 0]  w08;
-    reg [31 : 0]  w09;
-    reg [31 : 0]  w10;
-    reg [31 : 0]  w11;
-    reg [31 : 0]  w12;
-    reg [31 : 0]  w13;
-    reg [31 : 0]  w14;
-    reg [31 : 0]  w15;
 
     begin
       $display("*** Test of FIFO by loading known data and then reading out.");
@@ -330,35 +372,9 @@ module tb_csprng_fifo();
       i = 8'd0;
 
       // Filling up the memory with data.
-      for (j = 0 ; j < 3 ; j = j + 1)
+      for (j = 0 ; j < 4 ; j = j + 1)
         begin
-          w00 = {(i + 8'd15), (i + 8'd15), (i + 8'd15), (i + 8'd15)};
-          w01 = {(i + 8'd14), (i + 8'd14), (i + 8'd14), (i + 8'd14)};
-          w02 = {(i + 8'd13), (i + 8'd13), (i + 8'd13), (i + 8'd13)};
-          w03 = {(i + 8'd12), (i + 8'd12), (i + 8'd12), (i + 8'd12)};
-          w04 = {(i + 8'd11), (i + 8'd11), (i + 8'd11), (i + 8'd11)};
-          w05 = {(i + 8'd10), (i + 8'd10), (i + 8'd10), (i + 8'd10)};
-          w06 = {(i + 8'd09), (i + 8'd09), (i + 8'd09), (i + 8'd09)};
-          w07 = {(i + 8'd08), (i + 8'd08), (i + 8'd08), (i + 8'd08)};
-
-          w08 = {(i + 8'd07), (i + 8'd07), (i + 8'd07), (i + 8'd07)};
-          w09 = {(i + 8'd06), (i + 8'd06), (i + 8'd06), (i + 8'd06)};
-          w10 = {(i + 8'd05), (i + 8'd05), (i + 8'd05), (i + 8'd05)};
-          w11 = {(i + 8'd04), (i + 8'd04), (i + 8'd04), (i + 8'd04)};
-          w12 = {(i + 8'd03), (i + 8'd03), (i + 8'd03), (i + 8'd03)};
-          w13 = {(i + 8'd02), (i + 8'd02), (i + 8'd02), (i + 8'd02)};
-          w14 = {(i + 8'd01), (i + 8'd01), (i + 8'd01), (i + 8'd01)};
-          w15 = {(i + 8'd00), (i + 8'd00), (i + 8'd00), (i + 8'd00)};
-
-          w512 = {w00, w01, w02, w03, w04, w05, w06, w07,
-                  w08, w09, w10, w11, w12, w13, w14, w15};
-
-          wait_more_data();
-
-          dump_dut_state();
-          dump_fifo();
-
-          write_w512(w512);
+          write_w512(i);
           #(2 * CLK_PERIOD);
           i = i + 16;
         end
@@ -366,6 +382,19 @@ module tb_csprng_fifo();
       dump_dut_state();
       dump_fifo();
 
+      // Read out a number of words from the fifo.
+      for (j = 0 ; j < 17 ; j = j + 1)
+        begin
+          read_w32();
+        end
+
+      dump_dut_state();
+      dump_fifo();
+
+      // Write another 512-bit word into the fifo.
+      i = 8'd4;
+
+
     end
   endtask // init_sim
 



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