[Cryptech-Commits] [core/platform/common] 01/01: experimental modexps6 (which requires changing the read timing on all other cores)
git at cryptech.is
git at cryptech.is
Fri Jul 17 14:37:49 UTC 2015
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paul at psgd.org pushed a commit to branch modexps6
in repository core/platform/common.
commit a8e0651bd3ae3a8e579547753cbb51dc0b87525c
Author: Paul Selkirk <paul at psgd.org>
Date: Fri Jul 17 10:11:23 2015 -0400
experimental modexps6 (which requires changing the read timing on all other cores)
---
core_selector/src/rtl/core_selector.v | 28 +++++++++++++++---
core_selector/src/rtl/math_selector.v | 55 ++++++++++++++++++-----------------
2 files changed, 53 insertions(+), 30 deletions(-)
diff --git a/core_selector/src/rtl/core_selector.v b/core_selector/src/rtl/core_selector.v
index 79c1fa4..34068a5 100644
--- a/core_selector/src/rtl/core_selector.v
+++ b/core_selector/src/rtl/core_selector.v
@@ -118,6 +118,11 @@ module core_selector
.sys_read_data(segment_globals_read_data),
.sys_error(segment_globals_error)
);
+
+ reg [31: 0] segment_globals_read_data_reg;
+ always @(posedge sys_clk)
+ segment_globals_read_data_reg <= segment_globals_read_data;
+
`endif
@@ -142,6 +147,11 @@ module core_selector
.sys_read_data(segment_hashes_read_data),
.sys_error(segment_hashes_error)
);
+
+ reg [31: 0] segment_hashes_read_data_reg;
+ always @(posedge sys_clk)
+ segment_hashes_read_data_reg <= segment_hashes_read_data;
+
`endif
@@ -170,6 +180,11 @@ module core_selector
.noise(noise), // only RNG segment uses these ports
.debug(segment_rngs_debug)
);
+
+ reg [31: 0] segment_rngs_read_data_reg;
+ always @(posedge sys_clk)
+ segment_rngs_read_data_reg <= segment_rngs_read_data;
+
`endif
@@ -193,6 +208,11 @@ module core_selector
.sys_read_data(segment_ciphers_read_data),
.sys_error(segment_ciphers_error)
);
+
+ reg [31: 0] segment_ciphers_read_data_reg;
+ always @(posedge sys_clk)
+ segment_ciphers_read_data_reg <= segment_ciphers_read_data;
+
`endif
@@ -240,21 +260,21 @@ module core_selector
`ifdef USE_SEGMENT_GLOBALS
SEGMENT_ADDR_GLOBALS:
begin
- sys_read_data_reg = segment_globals_read_data;
+ sys_read_data_reg = segment_globals_read_data_reg;
sys_error_reg = segment_globals_error;
end
`endif
`ifdef USE_SEGMENT_HASHES
SEGMENT_ADDR_HASHES:
begin
- sys_read_data_reg = segment_hashes_read_data;
+ sys_read_data_reg = segment_hashes_read_data_reg;
sys_error_reg = segment_hashes_error;
end
`endif
`ifdef USE_SEGMENT_RNGS
SEGMENT_ADDR_RNGS:
begin
- sys_read_data_reg = segment_rngs_read_data;
+ sys_read_data_reg = segment_rngs_read_data_reg;
sys_error_reg = segment_rngs_error;
sys_debug = segment_rngs_debug;
end
@@ -262,7 +282,7 @@ module core_selector
`ifdef USE_SEGMENT_CIPHERS
SEGMENT_ADDR_CIPHERS:
begin
- sys_read_data_reg = segment_ciphers_read_data;
+ sys_read_data_reg = segment_ciphers_read_data_reg;
sys_error_reg = segment_ciphers_error;
end
`endif
diff --git a/core_selector/src/rtl/math_selector.v b/core_selector/src/rtl/math_selector.v
index b47a433..833ffbf 100644
--- a/core_selector/src/rtl/math_selector.v
+++ b/core_selector/src/rtl/math_selector.v
@@ -55,49 +55,52 @@ module math_selector
//----------------------------------------------------------------
- // Address Decoder
+ // List of Available Cores
//----------------------------------------------------------------
- // upper 2 bits specify core being addressed
- wire [ 1: 0] core_select = sys_eim_addr[13: 12];
- // lower 12 bits specify addresses within the selected core.
- wire [11: 0] core_addr = sys_eim_addr[11: 0];
+ // Comment following lines to exclude cores from implementation.
+ `define USE_CORE_MODEXPS6
//----------------------------------------------------------------
- // List of Available Cores
+ // Address Decoder
//----------------------------------------------------------------
- // Comment following lines to exclude cores from implementation.
- `define USE_CORE_MODEXP
+`ifdef USE_CORE_MODEXPS6
+ // upper 4 bits specify core being addressed
+ wire [ 3: 0] addr_core_num = sys_eim_addr[13:10];
+ // lower 10 bits specify register offset in core
+ wire [ 9: 0] addr_core_reg = sys_eim_addr[ 9: 0];
+`endif
//----------------------------------------------------------------
// Core Address Table
//----------------------------------------------------------------
- localparam CORE_MODEXP = 2'd0;
+ `ifdef USE_CORE_MODEXPS6
+ localparam CORE_ADDR_MODEXPS6 = 4'd0;
+ `endif
//----------------------------------------------------------------
- // MODEXP
+ // ModExpS6
//----------------------------------------------------------------
- `ifdef USE_CORE_MODEXP
- wire enable_modexp = sys_ena && (core_select == CORE_MODEXP);
- wire [31: 0] read_data_modexp;
-
- modexp modexp_inst
+ `ifdef USE_CORE_MODEXPS6
+ wire [31: 0] read_data_modexps6;
+ wire enable_modexps6 = sys_ena && (addr_core_num == CORE_ADDR_MODEXPS6);
+ modexps6_wrapper modexps6_inst
(
.clk(sys_clk),
- .reset_n(~sys_rst),
+ .rst(sys_rst),
- .cs(enable_modexp & (sys_eim_rd | sys_eim_wr)),
+ .cs(enable_modexps6 & (sys_eim_rd | sys_eim_wr)),
.we(sys_eim_wr),
- .address(core_addr),
+ .address(addr_core_reg),
.write_data(sys_write_data),
- .read_data(read_data_modexp)
+ .read_data(read_data_modexps6)
);
`endif
-
-
+
+
//----------------------------------------------------------------
// Output (Read Data) Multiplexor
//----------------------------------------------------------------
@@ -106,11 +109,11 @@ module math_selector
always @*
//
- `ifdef USE_CORE_MODEXP
- if (core_select == CORE_MODEXP)
- begin
- sys_read_data_mux = read_data_modexp;
- end
+ `ifdef USE_CORE_MODEXPS6
+ if (addr_core_num == CORE_ADDR_MODEXPS6)
+ begin
+ sys_read_data_mux = read_data_modexps6;
+ end
else
`endif
//
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