[Cryptech-Commits] [test/novena_base] branch master updated (785767f -> a68ffdd)
git at cryptech.is
git at cryptech.is
Sat Jan 31 08:03:51 UTC 2015
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joachim at secworks.se pushed a change to branch master
in repository test/novena_base.
from 785767f Removed exe bit on source files.
new a68ffdd Adding all main hw source files and constraints.
The 1 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
rtl/src/ipcore/_xmsgs/cg.xmsgs | 27 +++
rtl/src/ipcore/_xmsgs/pn_parser.xmsgs | 15 ++
rtl/src/ipcore/clkmgr_dcm.asy | 25 ++
rtl/src/ipcore/clkmgr_dcm.gise | 31 +++
rtl/src/ipcore/clkmgr_dcm.ncf | 60 +++++
rtl/src/ipcore/clkmgr_dcm.sym | 24 ++
rtl/src/ipcore/clkmgr_dcm.ucf | 59 +++++
rtl/src/ipcore/clkmgr_dcm.v | 151 ++++++++++++
rtl/src/ipcore/clkmgr_dcm.veo | 79 ++++++
rtl/src/ipcore/clkmgr_dcm.xco | 269 +++++++++++++++++++++
rtl/src/ipcore/clkmgr_dcm.xdc | 67 +++++
rtl/src/ipcore/clkmgr_dcm.xise | 74 ++++++
rtl/src/ipcore/clkmgr_dcm/clk_wiz_v3_6_readme.txt | 184 ++++++++++++++
.../ipcore/clkmgr_dcm/doc/clk_wiz_v3_6_readme.txt | 184 ++++++++++++++
.../ipcore/clkmgr_dcm/doc/clk_wiz_v3_6_vinfo.html | 195 +++++++++++++++
rtl/src/ipcore/clkmgr_dcm/doc/pg065_clk_wiz.pdf | Bin 0 -> 42657 bytes
.../clkmgr_dcm/example_design/clkmgr_dcm_exdes.ucf | 60 +++++
.../clkmgr_dcm/example_design/clkmgr_dcm_exdes.v | 164 +++++++++++++
.../clkmgr_dcm/example_design/clkmgr_dcm_exdes.xdc | 69 ++++++
rtl/src/ipcore/clkmgr_dcm/implement/implement.bat | 90 +++++++
rtl/src/ipcore/clkmgr_dcm/implement/implement.sh | 91 +++++++
.../ipcore/clkmgr_dcm/implement/planAhead_ise.bat | 58 +++++
.../ipcore/clkmgr_dcm/implement/planAhead_ise.sh | 59 +++++
.../ipcore/clkmgr_dcm/implement/planAhead_ise.tcl | 78 ++++++
.../ipcore/clkmgr_dcm/implement/planAhead_rdn.bat | 58 +++++
.../ipcore/clkmgr_dcm/implement/planAhead_rdn.sh | 57 +++++
.../ipcore/clkmgr_dcm/implement/planAhead_rdn.tcl | 69 ++++++
rtl/src/ipcore/clkmgr_dcm/implement/xst.prj | 2 +
rtl/src/ipcore/clkmgr_dcm/implement/xst.scr | 9 +
.../ipcore/clkmgr_dcm/simulation/clkmgr_dcm_tb.v | 145 +++++++++++
.../clkmgr_dcm/simulation/functional/simcmds.tcl | 8 +
.../simulation/functional/simulate_isim.bat | 59 +++++
.../simulation/functional/simulate_isim.sh | 61 +++++
.../simulation/functional/simulate_mti.bat | 61 +++++
.../simulation/functional/simulate_mti.do | 65 +++++
.../simulation/functional/simulate_mti.sh | 61 +++++
.../simulation/functional/simulate_ncsim.sh | 62 +++++
.../simulation/functional/simulate_vcs.sh | 72 ++++++
.../simulation/functional/ucli_commands.key | 5 +
.../simulation/functional/vcs_session.tcl | 18 ++
.../clkmgr_dcm/simulation/functional/wave.do | 60 +++++
.../clkmgr_dcm/simulation/functional/wave.sv | 118 +++++++++
.../clkmgr_dcm/simulation/timing/clkmgr_dcm_tb.v | 149 ++++++++++++
.../clkmgr_dcm/simulation/timing/sdf_cmd_file | 2 +
.../clkmgr_dcm/simulation/timing/simcmds.tcl | 9 +
.../clkmgr_dcm/simulation/timing/simulate_isim.sh | 62 +++++
.../clkmgr_dcm/simulation/timing/simulate_mti.bat | 59 +++++
.../clkmgr_dcm/simulation/timing/simulate_mti.do | 65 +++++
.../clkmgr_dcm/simulation/timing/simulate_mti.sh | 61 +++++
.../clkmgr_dcm/simulation/timing/simulate_ncsim.sh | 64 +++++
.../clkmgr_dcm/simulation/timing/simulate_vcs.sh | 72 ++++++
.../clkmgr_dcm/simulation/timing/ucli_commands.key | 5 +
.../clkmgr_dcm/simulation/timing/vcs_session.tcl | 1 +
.../ipcore/clkmgr_dcm/simulation/timing/wave.do | 71 ++++++
rtl/src/ipcore/clkmgr_dcm_flist.txt | 55 +++++
rtl/src/ipcore/clkmgr_dcm_xmdf.tcl | 140 +++++++++++
rtl/src/ipcore/coregen.cgp | 9 +
rtl/src/ipcore/create_clkmgr_dcm.tcl | 37 +++
rtl/src/ipcore/edit_clkmgr_dcm.tcl | 37 +++
rtl/src/testbench/tb_demo_adder.v | 173 +++++++++++++
rtl/src/ucf/novena_baseline.ucf | 98 ++++++++
rtl/src/verilog/cdc_bus_pulse.v | 114 +++++++++
rtl/src/verilog/core_selector.v | 112 +++++++++
rtl/src/verilog/demo_adder.v | 66 +++++
rtl/src/verilog/eim_arbiter.v | 247 +++++++++++++++++++
rtl/src/verilog/eim_arbiter_cdc.v | 106 ++++++++
rtl/src/verilog/eim_da_phy.v | 47 ++++
rtl/src/verilog/eim_indicator.v | 36 +++
rtl/src/verilog/novena_baseline_top.v | 132 ++++++++++
rtl/src/verilog/novena_clkmgr.v | 100 ++++++++
70 files changed, 5232 insertions(+)
create mode 100644 rtl/src/ipcore/_xmsgs/cg.xmsgs
create mode 100644 rtl/src/ipcore/_xmsgs/pn_parser.xmsgs
create mode 100644 rtl/src/ipcore/clkmgr_dcm.asy
create mode 100644 rtl/src/ipcore/clkmgr_dcm.gise
create mode 100644 rtl/src/ipcore/clkmgr_dcm.ncf
create mode 100644 rtl/src/ipcore/clkmgr_dcm.sym
create mode 100644 rtl/src/ipcore/clkmgr_dcm.ucf
create mode 100644 rtl/src/ipcore/clkmgr_dcm.v
create mode 100644 rtl/src/ipcore/clkmgr_dcm.veo
create mode 100644 rtl/src/ipcore/clkmgr_dcm.xco
create mode 100644 rtl/src/ipcore/clkmgr_dcm.xdc
create mode 100644 rtl/src/ipcore/clkmgr_dcm.xise
create mode 100644 rtl/src/ipcore/clkmgr_dcm/clk_wiz_v3_6_readme.txt
create mode 100644 rtl/src/ipcore/clkmgr_dcm/doc/clk_wiz_v3_6_readme.txt
create mode 100644 rtl/src/ipcore/clkmgr_dcm/doc/clk_wiz_v3_6_vinfo.html
create mode 100644 rtl/src/ipcore/clkmgr_dcm/doc/pg065_clk_wiz.pdf
create mode 100644 rtl/src/ipcore/clkmgr_dcm/example_design/clkmgr_dcm_exdes.ucf
create mode 100644 rtl/src/ipcore/clkmgr_dcm/example_design/clkmgr_dcm_exdes.v
create mode 100644 rtl/src/ipcore/clkmgr_dcm/example_design/clkmgr_dcm_exdes.xdc
create mode 100644 rtl/src/ipcore/clkmgr_dcm/implement/implement.bat
create mode 100644 rtl/src/ipcore/clkmgr_dcm/implement/implement.sh
create mode 100644 rtl/src/ipcore/clkmgr_dcm/implement/planAhead_ise.bat
create mode 100644 rtl/src/ipcore/clkmgr_dcm/implement/planAhead_ise.sh
create mode 100644 rtl/src/ipcore/clkmgr_dcm/implement/planAhead_ise.tcl
create mode 100644 rtl/src/ipcore/clkmgr_dcm/implement/planAhead_rdn.bat
create mode 100644 rtl/src/ipcore/clkmgr_dcm/implement/planAhead_rdn.sh
create mode 100644 rtl/src/ipcore/clkmgr_dcm/implement/planAhead_rdn.tcl
create mode 100644 rtl/src/ipcore/clkmgr_dcm/implement/xst.prj
create mode 100644 rtl/src/ipcore/clkmgr_dcm/implement/xst.scr
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/clkmgr_dcm_tb.v
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/functional/simcmds.tcl
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/functional/simulate_isim.bat
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/functional/simulate_isim.sh
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/functional/simulate_mti.bat
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/functional/simulate_mti.do
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/functional/simulate_mti.sh
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/functional/simulate_ncsim.sh
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/functional/simulate_vcs.sh
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/functional/ucli_commands.key
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/functional/vcs_session.tcl
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/functional/wave.do
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/functional/wave.sv
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/timing/clkmgr_dcm_tb.v
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/timing/sdf_cmd_file
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/timing/simcmds.tcl
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/timing/simulate_isim.sh
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/timing/simulate_mti.bat
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/timing/simulate_mti.do
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/timing/simulate_mti.sh
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/timing/simulate_ncsim.sh
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/timing/simulate_vcs.sh
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/timing/ucli_commands.key
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/timing/vcs_session.tcl
create mode 100644 rtl/src/ipcore/clkmgr_dcm/simulation/timing/wave.do
create mode 100644 rtl/src/ipcore/clkmgr_dcm_flist.txt
create mode 100644 rtl/src/ipcore/clkmgr_dcm_xmdf.tcl
create mode 100644 rtl/src/ipcore/coregen.cgp
create mode 100644 rtl/src/ipcore/create_clkmgr_dcm.tcl
create mode 100644 rtl/src/ipcore/edit_clkmgr_dcm.tcl
create mode 100644 rtl/src/testbench/tb_demo_adder.v
create mode 100644 rtl/src/ucf/novena_baseline.ucf
create mode 100644 rtl/src/verilog/cdc_bus_pulse.v
create mode 100644 rtl/src/verilog/core_selector.v
create mode 100644 rtl/src/verilog/demo_adder.v
create mode 100644 rtl/src/verilog/eim_arbiter.v
create mode 100644 rtl/src/verilog/eim_arbiter_cdc.v
create mode 100644 rtl/src/verilog/eim_da_phy.v
create mode 100644 rtl/src/verilog/eim_indicator.v
create mode 100644 rtl/src/verilog/novena_baseline_top.v
create mode 100644 rtl/src/verilog/novena_clkmgr.v
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