[Cryptech-Commits] [user/js/test/novena_eim_base] 01/01: (1) Adding the new EIM dll. (2) Updating EIM module with ports for cores.

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joachim at secworks.se pushed a commit to branch master
in repository user/js/test/novena_eim_base.

commit de3e921e21525843443c836ab38f1a65d760f19e
Author: Joachim Strömbergson <joachim at secworks.se>
Date:   Thu Jan 22 20:58:15 2015 +0100

    (1) Adding the new EIM dll. (2) Updating EIM module with ports for cores.
---
 src/rtl/novena_fpga_eim.v | 28 +++++++++++++++++++++-------
 1 file changed, 21 insertions(+), 7 deletions(-)

diff --git a/src/rtl/novena_fpga_eim.v b/src/rtl/novena_fpga_eim.v
index de71469..265f942 100644
--- a/src/rtl/novena_fpga_eim.v
+++ b/src/rtl/novena_fpga_eim.v
@@ -44,33 +44,47 @@ module novena_fpga_eim(
                        output wire          bclk133,
                        output wire          bclk66,
 
+                       output wire          cs,
+                       output wire          we,
+                       output wire [1 : 0]  address,
                        input wire [15 : 0]  read_data,
+                       input wire           read_data_valid,
                        output wire [15 : 0] write_data
 	              );
 
 
   //----------------------------------------------------------------
-  // Internal constant and parameter definitions.
+  // Registers.
   //----------------------------------------------------------------
 
 
   //----------------------------------------------------------------
-  // Registers including update variables and write enable.
+  // Wires.
   //----------------------------------------------------------------
 
 
   //----------------------------------------------------------------
   // Concurrent connectivity for ports etc.
-  //
-  // Tie downs etc to be compatible with the rest of the
-  // Novena board.
   //----------------------------------------------------------------
-  assign bclk133    = 1'b0;
-  assign bclk66     = 1'b0;
+  assign cs         = 1'b0;
+  assign we         = 1'b0;
+  assign address    = 2'h0;
   assign write_data = 16'h00;
 
 
   //----------------------------------------------------------------
+  // Component instantiations.
+  //----------------------------------------------------------------
+  bclk_dll bclk_dll_inst(
+                         .clk133in(EIM_BCLK),
+                         .clk133(bclk133),
+                         .clk66(bclk66),
+                         .RESET(reset),
+                         .LOCKED()
+                        );
+
+
+  //----------------------------------------------------------------
   // EIM Burst clock including generation of I/O clocks etc.
   //----------------------------------------------------------------
 //  wire bclk_dll;