[Cryptech-Commits] [user/js/test/novena_eim_base] 01/01: Adding clock definition and pins for the EIM burst clock.

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joachim at secworks.se pushed a commit to branch master
in repository user/js/test/novena_eim_base.

commit 72d7c974f7af0bc7eda29c7090c271e734d46286
Author: Joachim Strömbergson <joachim at secworks.se>
Date:   Thu Jan 22 15:26:39 2015 +0100

    Adding clock definition and pins for the EIM burst clock.
---
 src/constraints/novena_fpga.ucf | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

diff --git a/src/constraints/novena_fpga.ucf b/src/constraints/novena_fpga.ucf
index ceed775..85e190b 100755
--- a/src/constraints/novena_fpga.ucf
+++ b/src/constraints/novena_fpga.ucf
@@ -34,11 +34,11 @@ CONFIG VCCAUX  = 3.3;
 CONFIG MCB_PERFORMANCE  = EXTENDED;
 
 # ### define setup/hold constraints for EIM
-# OFFSET = IN 4125 ps VALID 4750 ps BEFORE "bclk";
+OFFSET = IN 4125 ps VALID 4750 ps BEFORE "bclk";
 # # this was also supposed to be IN 4125 ps VALID 625 ps BEFORE "bclk", but
 # # the computation gives me -3.5ns slack on hold time, so...add 4750 ps to the hold again.
 # #5200 ps is the true limit
-# OFFSET = OUT 5100 ps AFTER "bclk";
+OFFSET = OUT 5100 ps AFTER "bclk";
 
 # NET "eim_d_t*" TIG;
 # INST "oddr2_eim0" IOB =FORCE;
@@ -76,8 +76,8 @@ TIMESPEC TS_clk = PERIOD "clk25_tnm" 25 MHz;
 # NET "clk50" TNM_NET = "clk50_tnm";
 # TIMESPEC TS_clk = PERIOD "clk50_tnm" 50 MHz;
 
-# NET "bclk" TNM_NET = "bclk_tnm";
-# TIMESPEC TS_bclk = PERIOD "bclk_tnm" 133 MHz;
+NET "bclk" TNM_NET = "bclk_tnm";
+TIMESPEC TS_bclk = PERIOD "bclk_tnm" 133 MHz;
 
 
 ############################################################################
@@ -99,8 +99,9 @@ NET "ECSPI3_MISO" LOC = A3;
 NET "ECSPI3_MISO" IOSTANDARD = LVCMOS33;
 
 
-# NET "EIM_BCLK" LOC = C9;
-# NET "EIM_BCLK" IOSTANDARD = LVCMOS33;
+NET "EIM_BCLK" LOC = C9;
+NET "EIM_BCLK" IOSTANDARD = LVCMOS33;
+
 # NET "EIM_CS[0]" LOC = B11;
 # NET "EIM_CS[0]" IOSTANDARD = LVCMOS33;
 # NET "EIM_CS[1]" LOC = A15;