[Cryptech-Commits] [user/js/test/novena_eim_base] 02/02: Commented out the EIM clock and register constraints.

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joachim at secworks.se pushed a commit to branch master
in repository user/js/test/novena_eim_base.

commit d4e55c206996d8965bf6af4ba2c2a4df58937084
Author: Joachim Strömbergson <joachim at secworks.se>
Date:   Wed Jan 21 15:08:20 2015 +0100

    Commented out the EIM clock and register constraints.
---
 src/constraints/novena_fpga.ucf | 65 +++++++++++++++++++++--------------------
 1 file changed, 33 insertions(+), 32 deletions(-)

diff --git a/src/constraints/novena_fpga.ucf b/src/constraints/novena_fpga.ucf
index 9c838b4..66eb5bd 100755
--- a/src/constraints/novena_fpga.ucf
+++ b/src/constraints/novena_fpga.ucf
@@ -33,44 +33,45 @@ CONFIG VCCAUX  = 3.3;
 # Valid values are 2.5 and 3.3
 CONFIG MCB_PERFORMANCE  = EXTENDED;
 
-### define setup/hold constraints for EIM
-OFFSET = IN 4125 ps VALID 4750 ps BEFORE "bclk";
-# this was also supposed to be IN 4125 ps VALID 625 ps BEFORE "bclk", but
-# the computation gives me -3.5ns slack on hold time, so...add 4750 ps to the hold again.
-#5200 ps is the true limit
-OFFSET = OUT 5100 ps AFTER "bclk";
-
-NET "eim_d_t*" TIG;
-INST "oddr2_eim0" IOB =FORCE;
-INST "oddr2_eim1" IOB =FORCE;
-INST "oddr2_eim2" IOB =FORCE;
-INST "oddr2_eim3" IOB =FORCE;
-INST "oddr2_eim4" IOB =FORCE;
-INST "oddr2_eim5" IOB =FORCE;
-INST "oddr2_eim6" IOB =FORCE;
-INST "oddr2_eim7" IOB =FORCE;
-INST "oddr2_eim8" IOB =FORCE;
-INST "oddr2_eim9" IOB =FORCE;
-INST "oddr2_eimA" IOB =FORCE;
-INST "oddr2_eimB" IOB =FORCE;
-INST "oddr2_eimC" IOB =FORCE;
-INST "oddr2_eimD" IOB =FORCE;
-INST "oddr2_eimE" IOB =FORCE;
-INST "oddr2_eimF" IOB =FORCE;
-
-NET "reg_wo_40102/state[*]" TIG;
-NET "reg_wo_40100/state[*]" TIG;
-NET "reg_ro_41010/state[*]" TIG;
+# ### define setup/hold constraints for EIM
+# OFFSET = IN 4125 ps VALID 4750 ps BEFORE "bclk";
+# # this was also supposed to be IN 4125 ps VALID 625 ps BEFORE "bclk", but
+# # the computation gives me -3.5ns slack on hold time, so...add 4750 ps to the hold again.
+# #5200 ps is the true limit
+# OFFSET = OUT 5100 ps AFTER "bclk";
+
+# NET "eim_d_t*" TIG;
+# INST "oddr2_eim0" IOB =FORCE;
+# INST "oddr2_eim1" IOB =FORCE;
+# INST "oddr2_eim2" IOB =FORCE;
+# INST "oddr2_eim3" IOB =FORCE;
+# INST "oddr2_eim4" IOB =FORCE;
+# INST "oddr2_eim5" IOB =FORCE;
+# INST "oddr2_eim6" IOB =FORCE;
+# INST "oddr2_eim7" IOB =FORCE;
+# INST "oddr2_eim8" IOB =FORCE;
+# INST "oddr2_eim9" IOB =FORCE;
+# INST "oddr2_eimA" IOB =FORCE;
+# INST "oddr2_eimB" IOB =FORCE;
+# INST "oddr2_eimC" IOB =FORCE;
+# INST "oddr2_eimD" IOB =FORCE;
+# INST "oddr2_eimE" IOB =FORCE;
+# INST "oddr2_eimF" IOB =FORCE;
+
+# NET "reg_wo_40102/state[*]" TIG;
+# NET "reg_wo_40100/state[*]" TIG;
+# NET "reg_ro_41010/state[*]" TIG;
 # don't sweat the R/B signal, we have tons of margin on it
 
 
 ############################################################################
-## Clock constraints.
+## Clock defines and constraints.
 ############################################################################
-NET "clk" TNM_NET = "clk_tnm";
-NET "bclk" TNM_NET = "bclk_tnm";
+NET "clk50" TNM_NET = "clk_tnm";
 TIMESPEC TS_clk = PERIOD "clk_tnm" 50 MHz;
-TIMESPEC TS_bclk = PERIOD "bclk_tnm" 133 MHz;
+
+# NET "bclk" TNM_NET = "bclk_tnm";
+# TIMESPEC TS_bclk = PERIOD "bclk_tnm" 133 MHz;
 
 
 ############################################################################