[Cryptech-Commits] [test/novena_base] 04/04: use standard int types
git at cryptech.is
git at cryptech.is
Tue Feb 3 16:15:12 UTC 2015
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paul at psgd.org pushed a commit to branch master
in repository test/novena_base.
commit 2aeb65c80c1b1db27e3038a2b7afb60288ad8770
Author: Paul Selkirk <paul at psgd.org>
Date: Tue Feb 3 11:05:40 2015 -0500
use standard int types
---
sw/test-adder/novena-eim.c | 153 +++++++++++++++++++++++----------------------
sw/test-adder/test-adder.c | 28 +++++----
2 files changed, 94 insertions(+), 87 deletions(-)
diff --git a/sw/test-adder/novena-eim.c b/sw/test-adder/novena-eim.c
index 3fe3566..2908f5d 100644
--- a/sw/test-adder/novena-eim.c
+++ b/sw/test-adder/novena-eim.c
@@ -42,14 +42,16 @@
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
+#include <stdint.h>
#include <sys/mman.h>
+
#include "novena-eim.h"
//------------------------------------------------------------------------------
// Variables
//------------------------------------------------------------------------------
-static long mem_page_size = 0;
+static size_t mem_page_size = 0;
static int mem_dev_fd = -1;
static void * mem_map_ptr = MAP_FAILED;
static off_t mem_base_addr = 0;
@@ -70,6 +72,8 @@ static void _eim_remap_mem (off_t);
int eim_setup(void)
//------------------------------------------------------------------------------
{
+ long size;
+
// register cleanup function
if (atexit(_eim_cleanup) != 0) {
printf("ERROR: atexit() failed.\n");
@@ -77,11 +81,12 @@ int eim_setup(void)
}
// determine memory page size to use in mmap()
- mem_page_size = sysconf(_SC_PAGESIZE);
- if (mem_page_size < 1) {
- printf("ERROR: sysconf(_SC_PAGESIZE) == %ld\n", mem_page_size);
+ size = sysconf(_SC_PAGESIZE);
+ if (size < 1) {
+ printf("ERROR: sysconf(_SC_PAGESIZE) == %ld\n", size);
return -1;
}
+ mem_page_size = (size_t)size;
// try to open memory device
mem_dev_fd = open(MEMORY_DEVICE, O_RDWR | O_SYNC);
@@ -158,52 +163,52 @@ static void _eim_setup_iomuxc(void)
reg_pad.reserved_31_17 = 0; // must be 0
// all the pins must be configured to use the same ALT0 mode
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_CS0_B, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_OE_B, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_RW, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_LBA_B, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD00, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD01, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD02, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD03, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD04, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD05, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD06, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD07, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD08, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD09, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD10, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD11, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD12, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD13, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD14, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD15, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_WAIT_B, (unsigned int *)®_mux);
- eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_BCLK, (unsigned int *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_CS0_B, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_OE_B, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_RW, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_LBA_B, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD00, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD01, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD02, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD03, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD04, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD05, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD06, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD07, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD08, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD09, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD10, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD11, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD12, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD13, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD14, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_AD15, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_WAIT_B, (uint32_t *)®_mux);
+ eim_write_32(IOMUXC_SW_MUX_CTL_PAD_EIM_BCLK, (uint32_t *)®_mux);
// we need to configure all the I/O pads too
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_CS0_B, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_OE_B, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_RW, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_LBA_B, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD00, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD01, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD02, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD03, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD04, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD05, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD06, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD07, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD08, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD09, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD10, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD11, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD12, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD13, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD14, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD15, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_WAIT_B, (unsigned int *)®_pad);
- eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_BCLK, (unsigned int *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_CS0_B, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_OE_B, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_RW, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_LBA_B, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD00, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD01, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD02, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD03, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD04, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD05, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD06, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD07, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD08, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD09, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD10, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD11, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD12, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD13, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD14, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_AD15, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_WAIT_B, (uint32_t *)®_pad);
+ eim_write_32(IOMUXC_SW_PAD_CTL_PAD_EIM_BCLK, (uint32_t *)®_pad);
}
@@ -215,7 +220,7 @@ static void _eim_setup_ccm(void)
struct CCM_CCGR6 ccm_ccgr6;
// read register
- eim_read_32(CCM_CCGR6, (unsigned int *)&ccm_ccgr6);
+ eim_read_32(CCM_CCGR6, (uint32_t *)&ccm_ccgr6);
// modify register
ccm_ccgr6.cg0_usboh3 = CCM_CGR_ON_EXCEPT_STOP;
@@ -238,7 +243,7 @@ static void _eim_setup_ccm(void)
ccm_ccgr6.cg15_reserved = 0;
// write register
- eim_write_32(CCM_CCGR6, (unsigned int *)&ccm_ccgr6);
+ eim_write_32(CCM_CCGR6, (uint32_t *)&ccm_ccgr6);
}
@@ -259,16 +264,16 @@ static void _eim_setup_eim(void)
//struct EIM_EAR ear;
// read all the registers
- eim_read_32(EIM_CS0GCR1, (unsigned int *)&gcr1);
- eim_read_32(EIM_CS0GCR2, (unsigned int *)&gcr2);
- eim_read_32(EIM_CS0RCR1, (unsigned int *)&rcr1);
- eim_read_32(EIM_CS0RCR2, (unsigned int *)&rcr2);
- eim_read_32(EIM_CS0WCR1, (unsigned int *)&wcr1);
- eim_read_32(EIM_CS0WCR2, (unsigned int *)&wcr2);
+ eim_read_32(EIM_CS0GCR1, (uint32_t *)&gcr1);
+ eim_read_32(EIM_CS0GCR2, (uint32_t *)&gcr2);
+ eim_read_32(EIM_CS0RCR1, (uint32_t *)&rcr1);
+ eim_read_32(EIM_CS0RCR2, (uint32_t *)&rcr2);
+ eim_read_32(EIM_CS0WCR1, (uint32_t *)&wcr1);
+ eim_read_32(EIM_CS0WCR2, (uint32_t *)&wcr2);
- eim_read_32(EIM_WCR, (unsigned int *)&wcr);
- eim_read_32(EIM_WIAR, (unsigned int *)&wiar);
- //eim_read_32(EIM_EAR, (unsigned int *)&ear);
+ eim_read_32(EIM_WCR, (uint32_t *)&wcr);
+ eim_read_32(EIM_WIAR, (uint32_t *)&wiar);
+ //eim_read_32(EIM_EAR, (uint32_t *)&ear);
// manipulate registers as needed
gcr1.csen = 1; // chip select is enabled |
@@ -360,39 +365,39 @@ static void _eim_setup_eim(void)
//ear.error_addr = x; // read-only |
// write modified registers
- eim_write_32(EIM_CS0GCR1, (unsigned int *)&gcr1);
- eim_write_32(EIM_CS0GCR2, (unsigned int *)&gcr2);
- eim_write_32(EIM_CS0RCR1, (unsigned int *)&rcr1);
- eim_write_32(EIM_CS0RCR2, (unsigned int *)&rcr2);
- eim_write_32(EIM_CS0WCR1, (unsigned int *)&wcr1);
- eim_write_32(EIM_CS0WCR2, (unsigned int *)&wcr2);
- eim_write_32(EIM_WCR, (unsigned int *)&wcr);
- eim_write_32(EIM_WIAR, (unsigned int *)&wiar);
- //eim_write_32(EIM_EAR, (unsigned int *)&ear);
+ eim_write_32(EIM_CS0GCR1, (uint32_t *)&gcr1);
+ eim_write_32(EIM_CS0GCR2, (uint32_t *)&gcr2);
+ eim_write_32(EIM_CS0RCR1, (uint32_t *)&rcr1);
+ eim_write_32(EIM_CS0RCR2, (uint32_t *)&rcr2);
+ eim_write_32(EIM_CS0WCR1, (uint32_t *)&wcr1);
+ eim_write_32(EIM_CS0WCR2, (uint32_t *)&wcr2);
+ eim_write_32(EIM_WCR, (uint32_t *)&wcr);
+ eim_write_32(EIM_WIAR, (uint32_t *)&wiar);
+ //eim_write_32(EIM_EAR, (uint32_t *)&ear);
}
//------------------------------------------------------------------------------
-void eim_write_32(off_t offset, unsigned int *pvalue)
+void eim_write_32(off_t offset, uint32_t *pvalue)
//------------------------------------------------------------------------------
{
// calculate memory offset
- unsigned int *ptr = (unsigned int *)_eim_calc_offset(offset);
+ uint32_t *ptr = (uint32_t *)_eim_calc_offset(offset);
// write data to memory
- memcpy(ptr, pvalue, sizeof(unsigned int));
+ memcpy(ptr, pvalue, sizeof(uint32_t));
}
//------------------------------------------------------------------------------
-void eim_read_32(off_t offset, unsigned int *pvalue)
+void eim_read_32(off_t offset, uint32_t *pvalue)
//------------------------------------------------------------------------------
{
// calculate memory offset
- unsigned int *ptr = (unsigned int *)_eim_calc_offset(offset);
+ uint32_t *ptr = (uint32_t *)_eim_calc_offset(offset);
// read data from memory
- memcpy(pvalue, ptr, sizeof(unsigned int));
+ memcpy(pvalue, ptr, sizeof(uint32_t));
}
diff --git a/sw/test-adder/test-adder.c b/sw/test-adder/test-adder.c
index 88d4353..96b81f6 100644
--- a/sw/test-adder/test-adder.c
+++ b/sw/test-adder/test-adder.c
@@ -40,6 +40,8 @@
//------------------------------------------------------------------------------
#include <stdio.h>
#include <stdlib.h>
+#include <stdint.h>
+
#include "novena-eim.h"
@@ -56,9 +58,9 @@
//------------------------------------------------------------------------------
// Prototypes
//------------------------------------------------------------------------------
-unsigned int demo_adder_test_round (unsigned int, unsigned int);
-unsigned int lfsr_next_x (unsigned int);
-unsigned int lfsr_next_y (unsigned int);
+uint32_t demo_adder_test_round (uint32_t, uint32_t);
+uint32_t lfsr_next_x (uint32_t);
+uint32_t lfsr_next_y (uint32_t);
//------------------------------------------------------------------------------
@@ -73,7 +75,7 @@ int main(void)
//------------------------------------------------------------------------------
{
int i;
- unsigned int x = 0x12341234, y = 0xABCDABCD, zyx;
+ uint32_t x = 0x12341234, y = 0xABCDABCD, zyx;
// try to setup eim (return value should be 1)
printf("Configuring EIM .. ");
@@ -88,7 +90,7 @@ int main(void)
printf("Testing started.\n");
for (i=0; i<NUM_TEST_ROUNDS; i++) {
// run another round
- unsigned int z = demo_adder_test_round(x, y);
+ uint32_t z = demo_adder_test_round(x, y);
// calculate correct answer
zyx = x + y;
@@ -118,12 +120,12 @@ int main(void)
//------------------------------------------------------------------------------
-unsigned int demo_adder_test_round(unsigned int x, unsigned int y)
+uint32_t demo_adder_test_round(uint32_t x, uint32_t y)
//------------------------------------------------------------------------------
{
- unsigned int ctl;
- unsigned int sts;
- unsigned int z;
+ uint32_t ctl;
+ uint32_t sts;
+ uint32_t z;
// write x
eim_write_32(DEMO_ADDER_REG_X, &x);
@@ -164,7 +166,7 @@ unsigned int demo_adder_test_round(unsigned int x, unsigned int y)
//------------------------------------------------------------------------------
-unsigned int lfsr_next_x(unsigned int value)
+uint32_t lfsr_next_x(uint32_t value)
//------------------------------------------------------------------------------
{
//
@@ -172,7 +174,7 @@ unsigned int lfsr_next_x(unsigned int value)
// 0 1 3 4 5 7 8 9 11 13 15 18 22 24 28 30
//
- unsigned int carry = 0;
+ uint32_t carry = 0;
carry ^= (value >> 0);
carry ^= (value >> 1);
@@ -201,7 +203,7 @@ unsigned int lfsr_next_x(unsigned int value)
//------------------------------------------------------------------------------
-unsigned int lfsr_next_y(unsigned int value)
+uint32_t lfsr_next_y(uint32_t value)
//------------------------------------------------------------------------------
{
//
@@ -209,7 +211,7 @@ unsigned int lfsr_next_y(unsigned int value)
// 0 15 16 17 18 19 20 21 22 23 24 25 26 27 28 31
//
- unsigned int carry = 0;
+ uint32_t carry = 0;
carry ^= (value >> 0);
carry ^= (value >> 15);
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