[Cryptech-Commits] [hardware] 04/11: copied in 15 sheets of FPGA design from pavel

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fredrik at thulin.net pushed a commit to branch master
in repository hardware.

commit 5f92c3dd9a22cfa5708c92b6d9e631fba2794f02
Author: Fredrik Thulin <fredrik at thulin.net>
Date:   Tue Dec 1 09:57:27 2015 +0100

    copied in 15 sheets of FPGA design from pavel
---
 eagle/alpha/rev02/rev02.sch | 31942 +++++++++++++++++++++++++++++++++++-------
 1 file changed, 26769 insertions(+), 5173 deletions(-)

diff --git a/eagle/alpha/rev02/rev02.sch b/eagle/alpha/rev02/rev02.sch
index f99866e..3df1a95 100644
--- a/eagle/alpha/rev02/rev02.sch
+++ b/eagle/alpha/rev02/rev02.sch
@@ -1,6 +1,6 @@
 <?xml version="1.0" encoding="utf-8"?>
 <!DOCTYPE eagle SYSTEM "eagle.dtd">
-<eagle version="7.3.0">
+<eagle version="7.5.0">
 <drawing>
 <settings>
 <setting alwaysvectorfont="no"/>
@@ -1577,8 +1577,7 @@ for trimmer refence see : <u>www.electrospec-inc.com/cross_references/trim
 </BODY></HTML></description>
 <packages>
 <package name="R0603">
-<description><b>RESISTOR</b><p>
-chip</description>
+<description><b>RESISTOR</b></description>
 <wire x1="-0.432" y1="-0.356" x2="0.432" y2="-0.356" width="0.1524" layer="51"/>
 <wire x1="0.432" y1="0.356" x2="-0.432" y2="0.356" width="0.1524" layer="51"/>
 <wire x1="-1.473" y1="0.983" x2="1.473" y2="0.983" width="0.0508" layer="39"/>
@@ -1587,8 +1586,8 @@ chip</description>
 <wire x1="-1.473" y1="-0.983" x2="-1.473" y2="0.983" width="0.0508" layer="39"/>
 <smd name="1" x="-0.85" y="0" dx="1" dy="1.1" layer="1"/>
 <smd name="2" x="0.85" y="0" dx="1" dy="1.1" layer="1"/>
-<text x="-0.889" y="0.889" size="1.27" layer="25">>NAME</text>
-<text x="-0.889" y="-2.032" size="1.27" layer="27">>VALUE</text>
+<text x="-0.635" y="0.635" size="1.27" layer="25">>NAME</text>
+<text x="-0.635" y="-1.905" size="1.27" layer="27">>VALUE</text>
 <rectangle x1="0.4318" y1="-0.4318" x2="0.8382" y2="0.4318" layer="51"/>
 <rectangle x1="-0.8382" y1="-0.4318" x2="-0.4318" y2="0.4318" layer="51"/>
 <rectangle x1="-0.1999" y1="-0.4001" x2="0.1999" y2="0.4001" layer="35"/>
@@ -2351,8 +2350,7 @@ type RDH, grid 15 mm</description>
 <hole x="0" y="0" drill="1.3"/>
 </package>
 <package name="R0402">
-<description><b>RESISTOR</b><p>
-chip</description>
+<description><b>RESISTOR</b></description>
 <wire x1="-0.245" y1="0.224" x2="0.245" y2="0.224" width="0.1524" layer="51"/>
 <wire x1="0.245" y1="-0.224" x2="-0.245" y2="-0.224" width="0.1524" layer="51"/>
 <wire x1="-1.473" y1="0.483" x2="1.473" y2="0.483" width="0.0508" layer="39"/>
@@ -2361,66 +2359,46 @@ chip</description>
 <wire x1="-1.473" y1="-0.483" x2="-1.473" y2="0.483" width="0.0508" layer="39"/>
 <smd name="1" x="-0.65" y="0" dx="0.7" dy="0.9" layer="1"/>
 <smd name="2" x="0.65" y="0" dx="0.7" dy="0.9" layer="1"/>
-<text x="-0.635" y="0.762" size="1.27" layer="25">>NAME</text>
-<text x="-0.635" y="-2.032" size="1.27" layer="27">>VALUE</text>
+<text x="-0.635" y="0.635" size="1.27" layer="25">>NAME</text>
+<text x="-0.635" y="-1.905" size="1.27" layer="27">>VALUE</text>
 <rectangle x1="-0.554" y1="-0.3048" x2="-0.254" y2="0.2951" layer="51"/>
 <rectangle x1="0.2588" y1="-0.3048" x2="0.5588" y2="0.2951" layer="51"/>
 <rectangle x1="-0.1999" y1="-0.4001" x2="0.1999" y2="0.4001" layer="35"/>
 </package>
 <package name="R0805">
-<description><b>RESISTOR</b><p>
-chip</description>
+<description><b>RESISTOR</b><p></description>
 <wire x1="-0.41" y1="0.635" x2="0.41" y2="0.635" width="0.1524" layer="51"/>
 <wire x1="-0.41" y1="-0.635" x2="0.41" y2="-0.635" width="0.1524" layer="51"/>
 <wire x1="-1.973" y1="0.983" x2="1.973" y2="0.983" width="0.0508" layer="39"/>
 <wire x1="1.973" y1="0.983" x2="1.973" y2="-0.983" width="0.0508" layer="39"/>
 <wire x1="1.973" y1="-0.983" x2="-1.973" y2="-0.983" width="0.0508" layer="39"/>
 <wire x1="-1.973" y1="-0.983" x2="-1.973" y2="0.983" width="0.0508" layer="39"/>
-<smd name="1" x="-0.85" y="0" dx="1.3" dy="1.5" layer="1"/>
-<smd name="2" x="0.85" y="0" dx="1.3" dy="1.5" layer="1"/>
-<text x="-0.762" y="1.016" size="1.27" layer="25">>NAME</text>
-<text x="-0.762" y="-2.286" size="1.27" layer="27">>VALUE</text>
+<smd name="1" x="-0.95" y="0" dx="1.3" dy="1.5" layer="1"/>
+<smd name="2" x="0.95" y="0" dx="1.3" dy="1.5" layer="1"/>
+<text x="-0.635" y="1.27" size="1.27" layer="25">>NAME</text>
+<text x="-0.635" y="-2.54" size="1.27" layer="27">>VALUE</text>
 <rectangle x1="0.4064" y1="-0.6985" x2="1.0564" y2="0.7015" layer="51"/>
 <rectangle x1="-1.0668" y1="-0.6985" x2="-0.4168" y2="0.7015" layer="51"/>
 <rectangle x1="-0.1999" y1="-0.5001" x2="0.1999" y2="0.5001" layer="35"/>
 </package>
 <package name="R0805W">
-<description><b>RESISTOR</b><p>
-chip, wave soldering</description>
+<description><b>RESISTOR</b> wave soldering<p></description>
 <wire x1="-0.41" y1="0.635" x2="0.41" y2="0.635" width="0.1524" layer="51"/>
 <wire x1="-0.41" y1="-0.635" x2="0.41" y2="-0.635" width="0.1524" layer="51"/>
 <wire x1="-1.973" y1="0.983" x2="1.973" y2="0.983" width="0.0508" layer="39"/>
 <wire x1="1.973" y1="0.983" x2="1.973" y2="-0.983" width="0.0508" layer="39"/>
 <wire x1="1.973" y1="-0.983" x2="-1.973" y2="-0.983" width="0.0508" layer="39"/>
 <wire x1="-1.973" y1="-0.983" x2="-1.973" y2="0.983" width="0.0508" layer="39"/>
-<smd name="1" x="-0.94" y="0" dx="1.5" dy="1" layer="1"/>
-<smd name="2" x="0.94" y="0" dx="1.5" dy="1" layer="1"/>
-<text x="-0.635" y="1.016" size="1.27" layer="25">>NAME</text>
-<text x="-0.635" y="-2.159" size="1.27" layer="27">>VALUE</text>
+<smd name="1" x="-1.0525" y="0" dx="1.5" dy="1" layer="1"/>
+<smd name="2" x="1.0525" y="0" dx="1.5" dy="1" layer="1"/>
+<text x="-0.635" y="1.27" size="1.27" layer="25">>NAME</text>
+<text x="-0.635" y="-2.54" size="1.27" layer="27">>VALUE</text>
 <rectangle x1="0.4064" y1="-0.6985" x2="1.0564" y2="0.7015" layer="51"/>
 <rectangle x1="-1.0668" y1="-0.6985" x2="-0.4168" y2="0.7015" layer="51"/>
 <rectangle x1="-0.1999" y1="-0.5001" x2="0.1999" y2="0.5001" layer="35"/>
 </package>
-<package name="R1005">
-<description><b>RESISTOR</b><p>
-chip</description>
-<wire x1="-0.245" y1="0.224" x2="0.245" y2="0.224" width="0.1524" layer="51"/>
-<wire x1="0.245" y1="-0.224" x2="-0.245" y2="-0.224" width="0.1524" layer="51"/>
-<wire x1="-1.473" y1="0.483" x2="1.473" y2="0.483" width="0.0508" layer="39"/>
-<wire x1="1.473" y1="0.483" x2="1.473" y2="-0.483" width="0.0508" layer="39"/>
-<wire x1="1.473" y1="-0.483" x2="-1.473" y2="-0.483" width="0.0508" layer="39"/>
-<wire x1="-1.473" y1="-0.483" x2="-1.473" y2="0.483" width="0.0508" layer="39"/>
-<smd name="1" x="-0.65" y="0" dx="0.7" dy="0.9" layer="1"/>
-<smd name="2" x="0.65" y="0" dx="0.7" dy="0.9" layer="1"/>
-<text x="-0.635" y="0.762" size="1.27" layer="25">>NAME</text>
-<text x="-0.635" y="-2.032" size="1.27" layer="27">>VALUE</text>
-<rectangle x1="-0.554" y1="-0.3048" x2="-0.254" y2="0.2951" layer="51"/>
-<rectangle x1="0.2588" y1="-0.3048" x2="0.5588" y2="0.2951" layer="51"/>
-<rectangle x1="-0.1999" y1="-0.3" x2="0.1999" y2="0.3" layer="35"/>
-</package>
 <package name="R1206">
-<description><b>RESISTOR</b><p>
-chip</description>
+<description><b>RESISTOR</b></description>
 <wire x1="0.9525" y1="-0.8128" x2="-0.9652" y2="-0.8128" width="0.1524" layer="51"/>
 <wire x1="0.9525" y1="0.8128" x2="-0.9652" y2="0.8128" width="0.1524" layer="51"/>
 <wire x1="-2.473" y1="0.983" x2="2.473" y2="0.983" width="0.0508" layer="39"/>
@@ -2429,32 +2407,31 @@ chip</description>
 <wire x1="-2.473" y1="-0.983" x2="-2.473" y2="0.983" width="0.0508" layer="39"/>
 <smd name="2" x="1.422" y="0" dx="1.6" dy="1.803" layer="1"/>
 <smd name="1" x="-1.422" y="0" dx="1.6" dy="1.803" layer="1"/>
-<text x="-1.397" y="1.143" size="1.27" layer="25">>NAME</text>
-<text x="-1.397" y="-2.413" size="1.27" layer="27">>VALUE</text>
+<text x="-1.27" y="1.27" size="1.27" layer="25">>NAME</text>
+<text x="-1.27" y="-2.54" size="1.27" layer="27">>VALUE</text>
 <rectangle x1="-1.6891" y1="-0.8763" x2="-0.9525" y2="0.8763" layer="51"/>
 <rectangle x1="0.9525" y1="-0.8763" x2="1.6891" y2="0.8763" layer="51"/>
 <rectangle x1="-0.3" y1="-0.7" x2="0.3" y2="0.7" layer="35"/>
 </package>
 <package name="R1206W">
 <description><b>RESISTOR</b><p>
-chip, wave soldering</description>
-<wire x1="-0.913" y1="0.8" x2="0.888" y2="0.8" width="0.1524" layer="21"/>
-<wire x1="-0.913" y1="-0.8" x2="0.888" y2="-0.8" width="0.1524" layer="21"/>
+wave soldering</description>
+<wire x1="-0.913" y1="0.8" x2="0.888" y2="0.8" width="0.1524" layer="51"/>
+<wire x1="-0.913" y1="-0.8" x2="0.888" y2="-0.8" width="0.1524" layer="51"/>
 <wire x1="-2.473" y1="0.983" x2="2.473" y2="0.983" width="0.0508" layer="39"/>
 <wire x1="2.473" y1="0.983" x2="2.473" y2="-0.983" width="0.0508" layer="39"/>
 <wire x1="2.473" y1="-0.983" x2="-2.473" y2="-0.983" width="0.0508" layer="39"/>
 <wire x1="-2.473" y1="-0.983" x2="-2.473" y2="0.983" width="0.0508" layer="39"/>
 <smd name="1" x="-1.499" y="0" dx="1.8" dy="1.2" layer="1"/>
 <smd name="2" x="1.499" y="0" dx="1.8" dy="1.2" layer="1"/>
-<text x="-1.651" y="1.143" size="1.27" layer="25">>NAME</text>
-<text x="-1.651" y="-2.413" size="1.27" layer="27">>VALUE</text>
+<text x="-1.905" y="1.27" size="1.27" layer="25">>NAME</text>
+<text x="-1.905" y="-2.54" size="1.27" layer="27">>VALUE</text>
 <rectangle x1="-1.651" y1="-0.8763" x2="-0.9009" y2="0.8738" layer="51"/>
 <rectangle x1="0.889" y1="-0.8763" x2="1.6391" y2="0.8738" layer="51"/>
 <rectangle x1="-0.3" y1="-0.7" x2="0.3" y2="0.7" layer="35"/>
 </package>
 <package name="R1210">
-<description><b>RESISTOR</b><p>
-chip</description>
+<description><b>RESISTOR</b></description>
 <wire x1="-0.913" y1="1.219" x2="0.939" y2="1.219" width="0.1524" layer="51"/>
 <wire x1="-0.913" y1="-1.219" x2="0.939" y2="-1.219" width="0.1524" layer="51"/>
 <wire x1="-2.473" y1="1.483" x2="2.473" y2="1.483" width="0.0508" layer="39"/>
@@ -2463,66 +2440,62 @@ chip</description>
 <wire x1="-2.473" y1="-1.483" x2="-2.473" y2="1.483" width="0.0508" layer="39"/>
 <smd name="1" x="-1.4" y="0" dx="1.6" dy="2.7" layer="1"/>
 <smd name="2" x="1.4" y="0" dx="1.6" dy="2.7" layer="1"/>
-<text x="-1.27" y="1.651" size="1.27" layer="25">>NAME</text>
-<text x="-1.27" y="-2.921" size="1.27" layer="27">>VALUE</text>
+<text x="-2.54" y="1.905" size="1.27" layer="25">>NAME</text>
+<text x="-2.54" y="-3.175" size="1.27" layer="27">>VALUE</text>
 <rectangle x1="-1.651" y1="-1.3081" x2="-0.9009" y2="1.2918" layer="51"/>
 <rectangle x1="0.9144" y1="-1.3081" x2="1.6645" y2="1.2918" layer="51"/>
 <rectangle x1="-0.3" y1="-0.8999" x2="0.3" y2="0.8999" layer="35"/>
 </package>
 <package name="R1210W">
 <description><b>RESISTOR</b><p>
-chip, wave soldering</description>
-<wire x1="-0.913" y1="1.219" x2="0.939" y2="1.219" width="0.1524" layer="21"/>
-<wire x1="-0.913" y1="-1.219" x2="0.939" y2="-1.219" width="0.1524" layer="21"/>
+wave soldering</description>
+<wire x1="-0.913" y1="1.219" x2="0.939" y2="1.219" width="0.1524" layer="51"/>
+<wire x1="-0.913" y1="-1.219" x2="0.939" y2="-1.219" width="0.1524" layer="51"/>
 <wire x1="-2.473" y1="1.483" x2="2.473" y2="1.483" width="0.0508" layer="39"/>
 <wire x1="2.473" y1="1.483" x2="2.473" y2="-1.483" width="0.0508" layer="39"/>
 <wire x1="2.473" y1="-1.483" x2="-2.473" y2="-1.483" width="0.0508" layer="39"/>
 <wire x1="-2.473" y1="-1.483" x2="-2.473" y2="1.483" width="0.0508" layer="39"/>
 <smd name="1" x="-1.499" y="0" dx="1.8" dy="1.8" layer="1"/>
 <smd name="2" x="1.499" y="0" dx="1.8" dy="1.8" layer="1"/>
-<text x="-1.651" y="1.524" size="1.27" layer="25">>NAME</text>
-<text x="-1.651" y="-2.794" size="1.27" layer="27">>VALUE</text>
+<text x="-2.54" y="1.905" size="1.27" layer="25">>NAME</text>
+<text x="-2.54" y="-3.175" size="1.27" layer="27">>VALUE</text>
 <rectangle x1="-1.651" y1="-1.3081" x2="-0.9009" y2="1.2918" layer="51"/>
 <rectangle x1="0.9144" y1="-1.3081" x2="1.6645" y2="1.2918" layer="51"/>
 <rectangle x1="-0.3" y1="-0.8001" x2="0.3" y2="0.8001" layer="35"/>
 </package>
 <package name="R2010">
-<description><b>RESISTOR</b><p>
-chip</description>
+<description><b>RESISTOR</b></description>
 <wire x1="-1.662" y1="1.245" x2="1.662" y2="1.245" width="0.1524" layer="51"/>
 <wire x1="-1.637" y1="-1.245" x2="1.687" y2="-1.245" width="0.1524" layer="51"/>
 <wire x1="-3.473" y1="1.483" x2="3.473" y2="1.483" width="0.0508" layer="39"/>
 <wire x1="3.473" y1="1.483" x2="3.473" y2="-1.483" width="0.0508" layer="39"/>
 <wire x1="3.473" y1="-1.483" x2="-3.473" y2="-1.483" width="0.0508" layer="39"/>
 <wire x1="-3.473" y1="-1.483" x2="-3.473" y2="1.483" width="0.0508" layer="39"/>
-<wire x1="-1.027" y1="1.245" x2="1.027" y2="1.245" width="0.1524" layer="21"/>
-<wire x1="-1.002" y1="-1.245" x2="1.016" y2="-1.245" width="0.1524" layer="21"/>
 <smd name="1" x="-2.2" y="0" dx="1.8" dy="2.7" layer="1"/>
 <smd name="2" x="2.2" y="0" dx="1.8" dy="2.7" layer="1"/>
-<text x="-2.159" y="1.651" size="1.27" layer="25">>NAME</text>
-<text x="-2.159" y="-2.921" size="1.27" layer="27">>VALUE</text>
+<text x="-3.175" y="1.905" size="1.27" layer="25">>NAME</text>
+<text x="-3.175" y="-3.175" size="1.27" layer="27">>VALUE</text>
 <rectangle x1="-2.4892" y1="-1.3208" x2="-1.6393" y2="1.3292" layer="51"/>
 <rectangle x1="1.651" y1="-1.3208" x2="2.5009" y2="1.3292" layer="51"/>
 </package>
 <package name="R2010W">
 <description><b>RESISTOR</b><p>
-chip, wave soldering</description>
-<wire x1="-1.662" y1="1.245" x2="1.662" y2="1.245" width="0.1524" layer="21"/>
-<wire x1="-1.637" y1="-1.245" x2="1.687" y2="-1.245" width="0.1524" layer="21"/>
+wave soldering</description>
+<wire x1="-1.662" y1="1.245" x2="1.662" y2="1.245" width="0.1524" layer="51"/>
+<wire x1="-1.637" y1="-1.245" x2="1.687" y2="-1.245" width="0.1524" layer="51"/>
 <wire x1="-3.473" y1="1.483" x2="3.473" y2="1.483" width="0.0508" layer="39"/>
 <wire x1="3.473" y1="1.483" x2="3.473" y2="-1.483" width="0.0508" layer="39"/>
 <wire x1="3.473" y1="-1.483" x2="-3.473" y2="-1.483" width="0.0508" layer="39"/>
 <wire x1="-3.473" y1="-1.483" x2="-3.473" y2="1.483" width="0.0508" layer="39"/>
 <smd name="1" x="-2.311" y="0" dx="2" dy="1.8" layer="1"/>
 <smd name="2" x="2.311" y="0" dx="2" dy="1.8" layer="1"/>
-<text x="-2.286" y="1.524" size="1.27" layer="25">>NAME</text>
-<text x="-2.286" y="-2.921" size="1.27" layer="27">>VALUE</text>
+<text x="-2.54" y="1.905" size="1.27" layer="25">>NAME</text>
+<text x="-2.54" y="-3.175" size="1.27" layer="27">>VALUE</text>
 <rectangle x1="-2.4892" y1="-1.3208" x2="-1.6393" y2="1.3292" layer="51"/>
 <rectangle x1="1.651" y1="-1.3208" x2="2.5009" y2="1.3292" layer="51"/>
 </package>
 <package name="R2012">
-<description><b>RESISTOR</b><p>
-chip</description>
+<description><b>RESISTOR</b></description>
 <wire x1="-0.41" y1="0.635" x2="0.41" y2="0.635" width="0.1524" layer="51"/>
 <wire x1="-0.41" y1="-0.635" x2="0.41" y2="-0.635" width="0.1524" layer="51"/>
 <wire x1="-1.973" y1="0.983" x2="1.973" y2="0.983" width="0.0508" layer="39"/>
@@ -2531,15 +2504,15 @@ chip</description>
 <wire x1="-1.973" y1="-0.983" x2="-1.973" y2="0.983" width="0.0508" layer="39"/>
 <smd name="1" x="-0.85" y="0" dx="1.3" dy="1.5" layer="1"/>
 <smd name="2" x="0.85" y="0" dx="1.3" dy="1.5" layer="1"/>
-<text x="-0.762" y="1.016" size="1.27" layer="25">>NAME</text>
-<text x="-0.762" y="-2.286" size="1.27" layer="27">>VALUE</text>
+<text x="-0.635" y="1.27" size="1.27" layer="25">>NAME</text>
+<text x="-0.635" y="-2.54" size="1.27" layer="27">>VALUE</text>
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 </package>
 <package name="R2012W">
 <description><b>RESISTOR</b><p>
-chip, wave soldering</description>
+wave soldering</description>
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 <wire x1="-0.41" y1="-0.635" x2="0.41" y2="-0.635" width="0.1524" layer="51"/>
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@@ -2548,51 +2521,47 @@ chip, wave soldering</description>
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-<text x="-0.635" y="-2.286" size="1.27" layer="27">>VALUE</text>
+<text x="-0.635" y="1.27" size="1.27" layer="25">>NAME</text>
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 </package>
 <package name="R2512">
-<description><b>RESISTOR</b><p>
-chip</description>
+<description><b>RESISTOR</b></description>
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 <package name="R2512W">
 <description><b>RESISTOR</b><p>
-chip, wave soldering</description>
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-<wire x1="-2.362" y1="-1.473" x2="2.387" y2="-1.473" width="0.1524" layer="21"/>
+wave soldering</description>
+<wire x1="-2.362" y1="1.473" x2="2.387" y2="1.473" width="0.1524" layer="51"/>
+<wire x1="-2.362" y1="-1.473" x2="2.387" y2="-1.473" width="0.1524" layer="51"/>
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-<text x="-2.794" y="-3.048" size="1.27" layer="27">>VALUE</text>
+<text x="-1.905" y="1.905" size="1.27" layer="25">>NAME</text>
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 </package>
 <package name="R3216">
-<description><b>RESISTOR</b><p>
-chip</description>
+<description><b>RESISTOR</b></description>
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 <wire x1="-0.913" y1="-0.8" x2="0.888" y2="-0.8" width="0.1524" layer="51"/>
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@@ -2601,32 +2570,31 @@ chip</description>
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 <smd name="1" x="-1.4" y="0" dx="1.6" dy="1.8" layer="1"/>
 <smd name="2" x="1.4" y="0" dx="1.6" dy="1.8" layer="1"/>
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-<text x="-1.397" y="-2.413" size="1.27" layer="27">>VALUE</text>
+<text x="-1.905" y="1.27" size="1.27" layer="25">>NAME</text>
+<text x="-1.905" y="-2.54" size="1.27" layer="27">>VALUE</text>
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 <rectangle x1="-0.3" y1="-0.7" x2="0.3" y2="0.7" layer="35"/>
 </package>
 <package name="R3216W">
 <description><b>RESISTOR</b><p>
-chip, wave soldering</description>
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-<wire x1="-0.913" y1="-0.8" x2="0.888" y2="-0.8" width="0.1524" layer="21"/>
+wave soldering</description>
+<wire x1="-0.913" y1="0.8" x2="0.888" y2="0.8" width="0.1524" layer="51"/>
+<wire x1="-0.913" y1="-0.8" x2="0.888" y2="-0.8" width="0.1524" layer="51"/>
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 <smd name="2" x="1.499" y="0" dx="1.8" dy="1.2" layer="1"/>
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-<text x="-1.524" y="-2.413" size="1.27" layer="27">>VALUE</text>
+<text x="-1.905" y="1.27" size="1.27" layer="25">>NAME</text>
+<text x="-1.905" y="-2.54" size="1.27" layer="27">>VALUE</text>
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 </package>
 <package name="R3225">
-<description><b>RESISTOR</b><p>
-chip</description>
+<description><b>RESISTOR</b></description>
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 <wire x1="-0.913" y1="-1.219" x2="0.939" y2="-1.219" width="0.1524" layer="51"/>
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@@ -2635,97 +2603,92 @@ chip</description>
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 <smd name="1" x="-1.4" y="0" dx="1.6" dy="2.7" layer="1"/>
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-<text x="-1.397" y="-2.921" size="1.27" layer="27">>VALUE</text>
+<text x="-2.54" y="1.905" size="1.27" layer="25">>NAME</text>
+<text x="-2.54" y="-3.175" size="1.27" layer="27">>VALUE</text>
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 <rectangle x1="-0.3" y1="-1" x2="0.3" y2="1" layer="35"/>
 </package>
 <package name="R3225W">
 <description><b>RESISTOR</b><p>
-chip, wave soldering</description>
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-<wire x1="-0.913" y1="-1.219" x2="0.939" y2="-1.219" width="0.1524" layer="21"/>
+wave soldering</description>
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+<wire x1="-0.913" y1="-1.219" x2="0.939" y2="-1.219" width="0.1524" layer="51"/>
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-<text x="-1.397" y="-2.921" size="1.27" layer="27">>VALUE</text>
+<text x="-1.905" y="1.905" size="1.27" layer="25">>NAME</text>
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 </package>
 <package name="R5025">
-<description><b>RESISTOR</b><p>
-chip</description>
+<description><b>RESISTOR</b></description>
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 </package>
 <package name="R5025W">
 <description><b>RESISTOR</b><p>
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-<wire x1="-1.637" y1="-1.245" x2="1.687" y2="-1.245" width="0.1524" layer="21"/>
+wave soldering</description>
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+<text x="-3.175" y="1.905" size="1.27" layer="25">>NAME</text>
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 </package>
 <package name="R6332">
 <description><b>RESISTOR</b><p>
-chip</description>
+Source: http://download.siliconexpert.com/pdfs/2005/02/24/Semi_Ap/2/VSH/Resistor/dcrcwfre.pdf</description>
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+<smd name="2" x="3.1" y="0" dx="1" dy="3.2" layer="1"/>
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 <package name="R6332W">
-<description><b>RESISTOR</b><p>
-chip, wave soldering</description>
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-<wire x1="-2.362" y1="-1.473" x2="2.387" y2="-1.473" width="0.1524" layer="21"/>
+<description><b>RESISTOR</b> wave soldering<p>
+Source: http://download.siliconexpert.com/pdfs/2005/02/24/Semi_Ap/2/VSH/Resistor/dcrcwfre.pdf</description>
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-<text x="-2.921" y="-3.048" size="1.27" layer="27">>VALUE</text>
+<smd name="1" x="-3.196" y="0" dx="1.2" dy="3.2" layer="1"/>
+<smd name="2" x="3.196" y="0" dx="1.2" dy="3.2" layer="1"/>
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@@ -2741,8 +2704,8 @@ MELF 0.10 W</description>
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 <rectangle x1="-0.1999" y1="-0.5999" x2="0.1999" y2="0.5999" layer="35"/>
@@ -2756,12 +2719,10 @@ MELF 0.12 W</description>
 <wire x1="2.973" y1="0.983" x2="2.973" y2="-0.983" width="0.0508" layer="39"/>
 <wire x1="1.3208" y1="0.762" x2="-1.3208" y2="0.762" width="0.1524" layer="51"/>
 <wire x1="1.3208" y1="-0.762" x2="-1.3208" y2="-0.762" width="0.1524" layer="51"/>
-<wire x1="0.6858" y1="0.762" x2="-0.6858" y2="0.762" width="0.1524" layer="21"/>
-<wire x1="0.6858" y1="-0.762" x2="-0.6858" y2="-0.762" width="0.1524" layer="21"/>
 <smd name="1" x="-1.7" y="0" dx="1.4" dy="1.8" layer="1"/>
 <smd name="2" x="1.7" y="0" dx="1.4" dy="1.8" layer="1"/>
-<text x="-1.651" y="1.143" size="1.27" layer="25">>NAME</text>
-<text x="-1.651" y="-2.413" size="1.27" layer="27">>VALUE</text>
+<text x="-1.27" y="1.27" size="1.27" layer="25">>NAME</text>
+<text x="-1.27" y="-2.54" size="1.27" layer="27">>VALUE</text>
 <rectangle x1="-1.8542" y1="-0.8382" x2="-1.2954" y2="0.8382" layer="51"/>
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 <rectangle x1="-0.3" y1="-0.7" x2="0.3" y2="0.7" layer="35"/>
@@ -2777,8 +2738,8 @@ MELF 0.10 W</description>
 <wire x1="0.7112" y1="-0.635" x2="-0.7112" y2="-0.635" width="0.1524" layer="51"/>
 <smd name="1" x="-0.95" y="0" dx="1.3" dy="1.6" layer="1"/>
 <smd name="2" x="0.95" y="0" dx="1.3" dy="1.6" layer="1"/>
-<text x="-1.016" y="1.016" size="1.27" layer="25">>NAME</text>
-<text x="-1.016" y="-2.286" size="1.27" layer="27">>VALUE</text>
+<text x="-1.27" y="1.27" size="1.27" layer="25">>NAME</text>
+<text x="-1.27" y="-2.54" size="1.27" layer="27">>VALUE</text>
 <rectangle x1="-1.0414" y1="-0.7112" x2="-0.6858" y2="0.7112" layer="51"/>
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 <rectangle x1="-0.1999" y1="-0.5999" x2="0.1999" y2="0.5999" layer="35"/>
@@ -2792,12 +2753,10 @@ MELF 0.25 W</description>
 <wire x1="4.473" y1="1.483" x2="4.473" y2="-1.483" width="0.0508" layer="39"/>
 <wire x1="2.413" y1="1.1684" x2="-2.4384" y2="1.1684" width="0.1524" layer="51"/>
 <wire x1="2.413" y1="-1.1684" x2="-2.413" y2="-1.1684" width="0.1524" layer="51"/>
-<wire x1="1.651" y1="1.1684" x2="-1.6764" y2="1.1684" width="0.1524" layer="21"/>
-<wire x1="1.651" y1="-1.1684" x2="-1.651" y2="-1.1684" width="0.1524" layer="21"/>
 <smd name="1" x="-2.85" y="0" dx="1.5" dy="2.6" layer="1"/>
 <smd name="2" x="2.85" y="0" dx="1.5" dy="2.6" layer="1"/>
-<text x="-2.794" y="1.651" size="1.27" layer="25">>NAME</text>
-<text x="-2.794" y="-2.794" size="1.27" layer="27">>VALUE</text>
+<text x="-1.905" y="1.905" size="1.27" layer="25">>NAME</text>
+<text x="-2.54" y="-2.54" size="1.27" layer="27">>VALUE</text>
 <rectangle x1="-3.048" y1="-1.2446" x2="-2.3876" y2="1.2446" layer="51"/>
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 <rectangle x1="-0.5001" y1="-1" x2="0.5001" y2="1" layer="35"/>
@@ -2811,12 +2770,10 @@ MELF 0.12 W</description>
 <wire x1="2.973" y1="0.983" x2="2.973" y2="-0.983" width="0.0508" layer="39"/>
 <wire x1="1.3208" y1="0.762" x2="-1.3208" y2="0.762" width="0.1524" layer="51"/>
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-<wire x1="0.6858" y1="0.762" x2="-0.6858" y2="0.762" width="0.1524" layer="21"/>
-<wire x1="0.6858" y1="-0.762" x2="-0.6858" y2="-0.762" width="0.1524" layer="21"/>
 <smd name="1" x="-1.7" y="0" dx="1.4" dy="1.8" layer="1"/>
 <smd name="2" x="1.7" y="0" dx="1.4" dy="1.8" layer="1"/>
-<text x="-1.651" y="1.143" size="1.27" layer="25">>NAME</text>
-<text x="-1.651" y="-2.413" size="1.27" layer="27">>VALUE</text>
+<text x="-1.27" y="1.27" size="1.27" layer="25">>NAME</text>
+<text x="-1.27" y="-2.54" size="1.27" layer="27">>VALUE</text>
 <rectangle x1="-1.8542" y1="-0.8382" x2="-1.2954" y2="0.8382" layer="51"/>
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 <rectangle x1="-0.4001" y1="-0.7" x2="0.4001" y2="0.7" layer="35"/>
@@ -2830,12 +2787,10 @@ MELF 0.25 W</description>
 <wire x1="4.473" y1="1.483" x2="4.473" y2="-1.483" width="0.0508" layer="39"/>
 <wire x1="2.413" y1="1.1684" x2="-2.4384" y2="1.1684" width="0.1524" layer="51"/>
 <wire x1="2.413" y1="-1.1684" x2="-2.413" y2="-1.1684" width="0.1524" layer="51"/>
-<wire x1="1.651" y1="1.1684" x2="-1.6764" y2="1.1684" width="0.1524" layer="21"/>
-<wire x1="1.651" y1="-1.1684" x2="-1.651" y2="-1.1684" width="0.1524" layer="21"/>
 <smd name="1" x="-2.85" y="0" dx="1.5" dy="2.6" layer="1"/>
 <smd name="2" x="2.85" y="0" dx="1.5" dy="2.6" layer="1"/>
-<text x="-2.794" y="1.651" size="1.27" layer="25">>NAME</text>
-<text x="-2.794" y="-2.794" size="1.27" layer="27">>VALUE</text>
+<text x="-1.905" y="1.905" size="1.27" layer="25">>NAME</text>
+<text x="-2.54" y="-2.54" size="1.27" layer="27">>VALUE</text>
 <rectangle x1="-3.048" y1="-1.2446" x2="-2.3876" y2="1.2446" layer="51"/>
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 <rectangle x1="-0.5001" y1="-1" x2="0.5001" y2="1" layer="35"/>
@@ -2847,6 +2802,8 @@ source Beyschlag</description>
 <wire x1="1.7" y1="-0.6" x2="1.7" y2="0.6" width="0.2032" layer="51"/>
 <wire x1="1.7" y1="0.6" x2="-1.7" y2="0.6" width="0.2032" layer="51"/>
 <wire x1="-1.7" y1="0.6" x2="-1.7" y2="-0.6" width="0.2032" layer="51"/>
+<wire x1="0.938" y1="0.6" x2="-0.938" y2="0.6" width="0.2032" layer="21"/>
+<wire x1="-0.938" y1="-0.6" x2="0.938" y2="-0.6" width="0.2032" layer="21"/>
 <smd name="1" x="-1.5" y="0" dx="0.8" dy="1.6" layer="1"/>
 <smd name="2" x="1.5" y="0" dx="0.8" dy="1.6" layer="1"/>
 <text x="-1.27" y="0.9525" size="1.27" layer="25">>NAME</text>
@@ -2859,6 +2816,8 @@ source Beyschlag</description>
 <wire x1="1.7" y1="-0.6" x2="1.7" y2="0.6" width="0.2032" layer="51"/>
 <wire x1="1.7" y1="0.6" x2="-1.7" y2="0.6" width="0.2032" layer="51"/>
 <wire x1="-1.7" y1="0.6" x2="-1.7" y2="-0.6" width="0.2032" layer="51"/>
+<wire x1="0.684" y1="0.6" x2="-0.684" y2="0.6" width="0.2032" layer="21"/>
+<wire x1="-0.684" y1="-0.6" x2="0.684" y2="-0.6" width="0.2032" layer="21"/>
 <smd name="1" x="-1.5" y="0" dx="1.2" dy="1.6" layer="1"/>
 <smd name="2" x="1.5" y="0" dx="1.2" dy="1.6" layer="1"/>
 <text x="-1.27" y="0.9525" size="1.27" layer="25">>NAME</text>
@@ -2871,6 +2830,8 @@ source Beyschlag</description>
 <wire x1="2.8" y1="-1" x2="2.8" y2="1" width="0.2032" layer="51"/>
 <wire x1="2.8" y1="1" x2="-2.8" y2="1" width="0.2032" layer="51"/>
 <wire x1="-2.8" y1="1" x2="-2.8" y2="-1" width="0.2032" layer="51"/>
+<wire x1="1.2125" y1="1" x2="-1.2125" y2="1" width="0.2032" layer="21"/>
+<wire x1="-1.2125" y1="-1" x2="1.2125" y2="-1" width="0.2032" layer="21"/>
 <smd name="1" x="-2.25" y="0" dx="1.6" dy="2.5" layer="1"/>
 <smd name="2" x="2.25" y="0" dx="1.6" dy="2.5" layer="1"/>
 <text x="-2.2225" y="1.5875" size="1.27" layer="25">>NAME</text>
@@ -2883,638 +2844,8937 @@ source Beyschlag</description>
 <wire x1="2.8" y1="-1" x2="2.8" y2="1" width="0.2032" layer="51"/>
 <wire x1="2.8" y1="1" x2="-2.8" y2="1" width="0.2032" layer="51"/>
 <wire x1="-2.8" y1="1" x2="-2.8" y2="-1" width="0.2032" layer="51"/>
+<wire x1="1.149" y1="1" x2="-1.149" y2="1" width="0.2032" layer="21"/>
+<wire x1="-1.149" y1="-1" x2="1.149" y2="-1" width="0.2032" layer="21"/>
 <smd name="1" x="-2.6" y="0" dx="2.4" dy="2.5" layer="1"/>
 <smd name="2" x="2.6" y="0" dx="2.4" dy="2.5" layer="1"/>
 <text x="-2.54" y="1.5875" size="1.27" layer="25">>NAME</text>
 <text x="-2.54" y="-2.54" size="1.27" layer="27">>VALUE</text>
 </package>
-</packages>
-<symbols>
-<symbol name="R-EU">
-<wire x1="-2.54" y1="-0.889" x2="2.54" y2="-0.889" width="0.254" layer="94"/>
-<wire x1="2.54" y1="0.889" x2="-2.54" y2="0.889" width="0.254" layer="94"/>
-<wire x1="2.54" y1="-0.889" x2="2.54" y2="0.889" width="0.254" layer="94"/>
-<wire x1="-2.54" y1="-0.889" x2="-2.54" y2="0.889" width="0.254" layer="94"/>
-<text x="-3.81" y="1.4986" size="1.778" layer="95">>NAME</text>
-<text x="-3.81" y="-3.302" size="1.778" layer="96">>VALUE</text>
-<pin name="2" x="5.08" y="0" visible="off" length="short" direction="pas" swaplevel="1" rot="R180"/>
-<pin name="1" x="-5.08" y="0" visible="off" length="short" direction="pas" swaplevel="1"/>
-</symbol>
-</symbols>
-<devicesets>
-<deviceset name="R-EU_" prefix="R" uservalue="yes">
-<description><B>RESISTOR</B>, European symbol</description>
-<gates>
-<gate name="G$1" symbol="R-EU" x="0" y="0"/>
-</gates>
-<devices>
-<device name="R0402" package="R0402">
-<connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-<device name="R0603" package="R0603">
-<connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-<device name="R0805" package="R0805">
-<connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-<device name="R0805W" package="R0805W">
-<connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-<device name="R1005" package="R1005">
-<connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-<device name="R1206" package="R1206">
-<connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-<device name="R1206W" package="R1206W">
-<connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-<device name="R1210" package="R1210">
-<connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-<device name="R1210W" package="R1210W">
-<connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-<device name="R2010" package="R2010">
-<connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-<device name="R2010W" package="R2010W">
-<connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-<device name="R2012" package="R2012">
-<connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-<device name="R2012W" package="R2012W">
-<connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-<device name="R2512" package="R2512">
-<connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-<device name="R2512W" package="R2512W">
-<connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
-<device name="R3216" package="R3216">
-<connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
-</connects>
-<technologies>
-<technology name=""/>
-</technologies>
-</device>
+<package name="R0201">
+<description><b>RESISTOR</b> chip<p>
+Source: http://www.vishay.com/docs/20008/dcrcw.pdf</description>
+<smd name="1" x="-0.255" y="0" dx="0.28" dy="0.43" layer="1"/>
+<smd name="2" x="0.255" y="0" dx="0.28" dy="0.43" layer="1"/>
+<text x="-0.635" y="0.635" size="1.27" layer="25">>NAME</text>
+<text x="-0.635" y="-1.905" size="1.27" layer="27">>VALUE</text>
+<rectangle x1="-0.3" y1="-0.15" x2="-0.15" y2="0.15" layer="51"/>
+<rectangle x1="0.15" y1="-0.15" x2="0.3" y2="0.15" layer="51"/>
+<rectangle x1="-0.15" y1="-0.15" x2="0.15" y2="0.15" layer="21"/>
+</package>
+<package name="VTA52">
+<description><b>Bulk Metal® Foil Technology</b>, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements<p>
+MIL SIZE RBR52<br>
+Source: VISHAY .. vta56.pdf</description>
+<wire x1="-15.24" y1="0" x2="-13.97" y2="0" width="0.6096" layer="51"/>
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+<wire x1="13.97" y1="0" x2="15.24" y2="0" width="0.6096" layer="51"/>
+<pad name="1" x="-15.24" y="0" drill="1.1" shape="octagon"/>
+<pad name="2" x="15.24" y="0" drill="1.1" shape="octagon"/>
+<text x="-3.81" y="5.08" size="1.27" layer="25" ratio="10">>NAME</text>
+<text x="-3.175" y="-0.635" size="1.27" layer="27" ratio="10">>VALUE</text>
+<rectangle x1="-13.97" y1="-0.3048" x2="-12.5675" y2="0.3048" layer="21"/>
+<rectangle x1="12.5675" y1="-0.3048" x2="13.97" y2="0.3048" layer="21"/>
+</package>
+<package name="VTA53">
+<description><b>Bulk Metal® Foil Technology</b>, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements<p>
+MIL SIZE RBR53<br>
+Source: VISHAY .. vta56.pdf</description>
+<wire x1="-12.065" y1="0" x2="-10.795" y2="0" width="0.6096" layer="51"/>
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+<wire x1="-9.8975" y1="4.7" x2="-9.8975" y2="0" width="0.1524" layer="21"/>
+<wire x1="-9.8975" y1="0" x2="-9.8975" y2="-4.675" width="0.1524" layer="21"/>
+<wire x1="-9.8975" y1="-4.675" x2="9.8975" y2="-4.675" width="0.1524" layer="21"/>
+<wire x1="9.8975" y1="-4.675" x2="9.8975" y2="0" width="0.1524" layer="21"/>
+<wire x1="10.795" y1="0" x2="12.065" y2="0" width="0.6096" layer="51"/>
+<pad name="1" x="-12.065" y="0" drill="1.1" shape="octagon"/>
+<pad name="2" x="12.065" y="0" drill="1.1" shape="octagon"/>
+<text x="-3.81" y="5.08" size="1.27" layer="25" ratio="10">>NAME</text>
+<text x="-3.175" y="-0.635" size="1.27" layer="27" ratio="10">>VALUE</text>
+<rectangle x1="-10.795" y1="-0.3048" x2="-9.8425" y2="0.3048" layer="21"/>
+<rectangle x1="9.8425" y1="-0.3048" x2="10.795" y2="0.3048" layer="21"/>
+</package>
+<package name="VTA54">
+<description><b>Bulk Metal® Foil Technology</b>, Tubular Axial Lead Resistors, Meets or Exceeds MIL-R-39005 Requirements<p>
+MIL SIZE RBR54<br>
+Source: VISHAY .. vta56.pdf</description>
+<wire x1="-12.065" y1="0" x2="-10.795" y2="0" width="0.6096" layer="51"/>
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+grid 27.5 mm, outline 11.3 x 31.6 mm</description>
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+<package name="C275-173X316">
+<description><b>CAPACITOR</b><p>
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+<package name="C1210K">
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+<rectangle x1="1.1" y1="-1.25" x2="1.6" y2="1.25" layer="51"/>
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+<package name="C1812K">
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+Metric Code Size 4532</description>
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+<rectangle x1="1.65" y1="-1.6" x2="2.25" y2="1.6" layer="51"/>
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+<package name="C1825K">
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+<rectangle x1="1.1" y1="-3.2" x2="1.6" y2="3.2" layer="51"/>
+</package>
+<package name="C2220K">
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+</package>
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+<description><b> </b><p>
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+</package>
+<package name="C0201">
+<description>Source: http://www.avxcorp.com/docs/catalogs/cx5r.pdf</description>
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+</package>
+<package name="C1808">
+<description><b>CAPACITOR</b><p>
+Source: AVX .. aphvc.pdf</description>
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+<rectangle x1="1.225" y1="-1.015" x2="2.275" y2="1.015" layer="51"/>
+</package>
+<package name="C3640">
+<description><b>CAPACITOR</b><p>
+Source: AVX .. aphvc.pdf</description>
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+<rectangle x1="3.05" y1="-5.1" x2="4.5688" y2="5.1" layer="51"/>
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+<description><b>CAPACITOR</b></description>
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+<device name="MELF0102R" package="MINI_MELF-0102R">
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+<connect gate="G$1" pin="2" pad="2"/>
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+<connect gate="G$1" pin="2" pad="2"/>
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+<connect gate="G$1" pin="2" pad="2"/>
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+<connect gate="G$1" pin="2" pad="2"/>
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+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
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+<connect gate="G$1" pin="2" pad="2"/>
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+<device name="0922V" package="0922V">
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+<description><B>CAPACITOR</B>, European symbol</description>
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+<device name="325-137X374" package="C325-137X374">
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+<device name="325-162X374" package="C325-162X374">
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+<device name="325-182X374" package="C325-182X374">
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+<device name="375-192X418" package="C375-192X418">
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+<device name="050-035X075" package="C050-035X075">
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+<device name="075-063X106" package="C075-063X106">
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+<device name="E25-10AXIAL" package="E25-10">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E25-9AXIAL" package="E25-9">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E3.5-8" package="E3,5-8">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E30-10AXIAL" package="E30-10">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E30-12AXIAL" package="E30-12">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E30-16AXIAL" package="E30-16">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E35-12AXIAL" package="E35-12">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E35-14AXIAL" package="E35-14">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E35-16AXIAL" package="E35-16">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E35-18AXIAL" package="E35-18">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E45-16AXIAL" package="E45-16">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E45-18AXIAL" package="E45-18">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E45-21AXIAL" package="E45-21">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E45-22AXIAL" package="E45-22">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E45-25AXIAL" package="E45-25">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E5-10.5" package="E5-10,5">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="R3225" package="R3225">
+<device name="E5-13" package="E5-13">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="R3225W" package="R3225W">
+<device name="E5-4" package="E5-4">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="R5025" package="R5025">
+<device name="E5-5" package="E5-5">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="R5025W" package="R5025W">
+<device name="E5-6" package="E5-6">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="R6332" package="R6332">
+<device name="E5-8.5" package="E5-8,5">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="R6332W" package="R6332W">
+<device name="E50-25AXIAL" package="E50-25">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="M0805" package="M0805">
+<device name="E50-30AXIAL" package="E50-30">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="M1206" package="M1206">
+<device name="E55-25AXIAL" package="E55-25">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="M1406" package="M1406">
+<device name="E55-30AXIAL" package="E55-30">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="M2012" package="M2012">
+<device name="E5-9VAXIAL" package="E5R">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="M2309" package="M2309">
+<device name="E7.5-16" package="E7,5-16">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="M3216" package="M3216">
+<device name="E7.5-18" package="E7,5-18">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="M3516" package="M3516">
+<device name="E10-20" package="EB20D">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="M5923" package="M5923">
+<device name="E10-22.5" package="EB22,5D">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0204/5" package="0204/5">
+<device name="E10-25" package="EB25D">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0204/7" package="0204/7">
+<device name="E10-30" package="EB30D">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0204/2V" package="0204V">
+<device name="E10-35" package="EB35D">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0207/10" package="0207/10">
+<device name="085CS-1R" package="085CS_1R">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0207/12" package="0207/12">
+<device name="085CS-1W" package="085CS_1W">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0207/15" package="0207/15">
+<device name="085CS-1AR" package="085CS_1AR">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0207/2V" package="0207/2V">
+<device name="085CS-1AW" package="085CS_1AW">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0207/5V" package="0207/5V">
+<device name="139CLL-2R" package="139CLL-2R">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0207/7" package="0207/7">
+<device name="139CLL-2W" package="139CLL-2W">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0309/10" package="0309/10">
+<device name="139CLL-3R" package="139CLL-3R">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0309/12" package="0309/12">
+<device name="139CLL-3W" package="139CLL-3W">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0309/V" package="0309V">
+<device name="140CLH-0810" package="140CLH-0810">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0411/12" package="0411/12">
+<device name="140CLH-1010" package="140CLH-1010">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0411/15" package="0411/15">
+<device name="140CLH-1014" package="140CLH-1014">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0411/3V" package="0411V">
+<device name="150CLZ-0810" package="150CLZ-0810">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0414/15" package="0414/15">
+<device name="150CLZ-1010" package="150CLZ-1010">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0414/5V" package="0414V">
+<device name="150CLZ-1014" package="150CLZ-1014">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0617/17" package="0617/17">
+<device name="153CLV-0405" package="153CLV-0405">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0617/22" package="0617/22">
+<device name="153CLV-0505" package="153CLV-0505">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0617/5V" package="0617V">
+<device name="153CLV-0605" package="153CLV-0605">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0922/22" package="0922/22">
+<device name="153CLV-0807" package="153CLV-0807">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0613/5V" package="P0613V">
+<device name="153CLV-0810" package="153CLV-0810">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0613/15" package="P0613/15">
+<device name="153CLV-1010" package="153CLV-1010">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0817/22" package="P0817/22">
+<device name="153CLV-1012" package="153CLV-1012">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0817/7V" package="P0817V">
+<device name="153CLV-1014" package="153CLV-1014">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="V234/12" package="V234/12">
+<device name="175TMP-0808" package="175TMP-0808">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="V235/17" package="V235/17">
+<device name="175TMP-0810" package="175TMP-0810">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="V526-0" package="V526-0">
+<device name="A/3216-18R" package="A/3216-18R">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="MELF0102R" package="MINI_MELF-0102R">
+<device name="A/3216-18W" package="A/3216-18W">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="MELF0102W" package="MINI_MELF-0102W">
+<device name="T/3528-12R" package="T/3528-12R">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="MELF0204R" package="MINI_MELF-0204R">
+<device name="B/3528-21W" package="B/3528-21W">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="MELF0204W" package="MINI_MELF-0204W">
+<device name="C/6032-28R" package="C/6032-28R">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="MELF0207R" package="MINI_MELF-0207R">
+<device name="C/6032-28W" package="C/6032-28W">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="MELF0207W" package="MINI_MELF-0207W">
+<device name="D/7343-31R" package="D/7343-31R">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="D/7343-31W" package="D/7343-31W">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E/7260-38R" package="E/7260-38R">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E/7260-38W" package="E/7260-38W">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="R/2012-12R" package="R/2012-12R">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="R/2012-12W" package="R/2012-12W">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="A" package="PANASONIC_A">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B" package="PANASONIC_B">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="C" package="PANASONIC_C">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="D" package="PANASONIC_D">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E" package="PANASONIC_E">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="F" package="PANASONIC_F">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="G" package="PANASONIC_G">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="TT2D5L" package="TT2D5L">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E2,5-6E" package="E2,5-6E">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SMCA" package="SMC_A">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SMCZ" package="SMC_Z">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SMCP" package="SMC_P">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SMCB" package="SMC_B">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="0922V" package="0922V">
+<device name="SMCC" package="SMC_C">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="RDH/15" package="RDH/15">
+<device name="SMCD" package="SMC_D">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
 </technologies>
 </device>
-<device name="MELF0102AX" package="MINI_MELF-0102AX">
+<device name="SMCE" package="SMC_E">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
 <technology name=""/>
@@ -5884,6 +14144,29 @@ Source: http://www.vishay.com/docs/10129/hpc0201a.pdf</description>
 <text x="1.27" y="11.43" size="2.54" layer="94">Document Number:</text>
 <text x="17.78" y="19.05" size="2.54" layer="94">>DRAWING_NAME</text>
 </symbol>
+<symbol name="A4L-LOC">
+<wire x1="256.54" y1="3.81" x2="256.54" y2="8.89" width="0.1016" layer="94"/>
+<wire x1="256.54" y1="8.89" x2="256.54" y2="13.97" width="0.1016" layer="94"/>
+<wire x1="256.54" y1="13.97" x2="256.54" y2="19.05" width="0.1016" layer="94"/>
+<wire x1="256.54" y1="19.05" x2="256.54" y2="24.13" width="0.1016" layer="94"/>
+<wire x1="161.29" y1="3.81" x2="161.29" y2="24.13" width="0.1016" layer="94"/>
+<wire x1="161.29" y1="24.13" x2="215.265" y2="24.13" width="0.1016" layer="94"/>
+<wire x1="215.265" y1="24.13" x2="256.54" y2="24.13" width="0.1016" layer="94"/>
+<wire x1="246.38" y1="3.81" x2="246.38" y2="8.89" width="0.1016" layer="94"/>
+<wire x1="246.38" y1="8.89" x2="256.54" y2="8.89" width="0.1016" layer="94"/>
+<wire x1="246.38" y1="8.89" x2="215.265" y2="8.89" width="0.1016" layer="94"/>
+<wire x1="215.265" y1="8.89" x2="215.265" y2="3.81" width="0.1016" layer="94"/>
+<wire x1="215.265" y1="8.89" x2="215.265" y2="13.97" width="0.1016" layer="94"/>
+<wire x1="215.265" y1="13.97" x2="256.54" y2="13.97" width="0.1016" layer="94"/>
+<wire x1="215.265" y1="13.97" x2="215.265" y2="19.05" width="0.1016" layer="94"/>
+<wire x1="215.265" y1="19.05" x2="256.54" y2="19.05" width="0.1016" layer="94"/>
+<wire x1="215.265" y1="19.05" x2="215.265" y2="24.13" width="0.1016" layer="94"/>
+<text x="217.17" y="15.24" size="2.54" layer="94">>DRAWING_NAME</text>
+<text x="217.17" y="10.16" size="2.286" layer="94">>LAST_DATE_TIME</text>
+<text x="230.505" y="5.08" size="2.54" layer="94">>SHEET</text>
+<text x="216.916" y="4.953" size="2.54" layer="94">Sheet:</text>
+<frame x1="0" y1="0" x2="260.35" y2="179.07" columns="6" rows="4" layer="94"/>
+</symbol>
 </symbols>
 <devicesets>
 <deviceset name="A3L-LOC" prefix="FRAME" uservalue="yes">
@@ -5914,6 +14197,20 @@ DIN A3, landscape with location and doc. field</description>
 </device>
 </devices>
 </deviceset>
+<deviceset name="A4L-LOC" prefix="FRAME" uservalue="yes">
+<description><b>FRAME</b><p>
+DIN A4, landscape with location and doc. field</description>
+<gates>
+<gate name="G$1" symbol="A4L-LOC" x="0" y="0"/>
+</gates>
+<devices>
+<device name="">
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
 </devicesets>
 </library>
 <library name="SparkFun-Aesthetics">
@@ -22706,2229 +31003,9796 @@ Various fiducial points for machine vision alignment.</description>
 <attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
 <attribute name="TOLERANCE" value="±20 %" constant="no"/>
 <attribute name="VALUE" value="470UF" constant="no"/>
-<attribute name="VOLTAGERATING" value="25V" constant="no"/>
+<attribute name="VOLTAGERATING" value="25V" constant="no"/>
+</technology>
+<technology name="FP1H221AP">
+<attribute name="MPN" value="EEE-FP1H221AP" constant="no"/>
+<attribute name="OC_FARNELL" value="1714770  " constant="no"/>
+<attribute name="OC_NEWARK" value="15R0899" constant="no"/>
+<attribute name="PACKAGE" value="CASE-G" constant="no"/>
+<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
+<attribute name="TOLERANCE" value="±20 %" constant="no"/>
+<attribute name="VALUE" value="220UF" constant="no"/>
+<attribute name="VOLTAGERATING" value="50V" constant="no"/>
+</technology>
+<technology name="FP1V331AP">
+<attribute name="MPN" value="EEE-FP1V331AP" constant="no"/>
+<attribute name="OC_FARNELL" value="1539515  " constant="no"/>
+<attribute name="OC_NEWARK" value="94M7045" constant="no"/>
+<attribute name="PACKAGE" value="CASE-G" constant="no"/>
+<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
+<attribute name="TOLERANCE" value="±20 %" constant="no"/>
+<attribute name="VALUE" value="330UF" constant="no"/>
+<attribute name="VOLTAGERATING" value="35V" constant="no"/>
+</technology>
+<technology name="FPA122UAP">
+<attribute name="MPN" value="EEE-FPA122UAP" constant="no"/>
+<attribute name="OC_FARNELL" value="1539518  " constant="no"/>
+<attribute name="OC_NEWARK" value="94M6986" constant="no"/>
+<attribute name="PACKAGE" value="CASE-G" constant="no"/>
+<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
+<attribute name="TOLERANCE" value="±20 %" constant="no"/>
+<attribute name="VALUE" value="1200UF" constant="no"/>
+<attribute name="VOLTAGERATING" value="10V" constant="no"/>
+</technology>
+<technology name="FPC821UAP">
+<attribute name="MPN" value="EEE-FPC821UAP" constant="no"/>
+<attribute name="OC_FARNELL" value="1539519  " constant="no"/>
+<attribute name="OC_NEWARK" value="94M6994" constant="no"/>
+<attribute name="PACKAGE" value="CASE-G" constant="no"/>
+<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
+<attribute name="TOLERANCE" value="±20 %" constant="no"/>
+<attribute name="VALUE" value="820UF" constant="no"/>
+<attribute name="VOLTAGERATING" value="16V" constant="no"/>
+</technology>
+<technology name="FPE561UAP">
+<attribute name="MPN" value="EEE-FPE561UAP" constant="no"/>
+<attribute name="OC_FARNELL" value="1539520  " constant="no"/>
+<attribute name="OC_NEWARK" value="94M6997" constant="no"/>
+<attribute name="PACKAGE" value="CASE-G" constant="no"/>
+<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
+<attribute name="TOLERANCE" value="±20 %" constant="no"/>
+<attribute name="VALUE" value="560UF" constant="no"/>
+<attribute name="VOLTAGERATING" value="25V" constant="no"/>
+</technology>
+<technology name="FPJ182UAP">
+<attribute name="MPN" value="EEE-FPJ182UAP" constant="no"/>
+<attribute name="OC_FARNELL" value="1539517  " constant="no"/>
+<attribute name="OC_NEWARK" value="94M6999" constant="no"/>
+<attribute name="PACKAGE" value="CASE-G" constant="no"/>
+<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
+<attribute name="TOLERANCE" value="±20 %" constant="no"/>
+<attribute name="VALUE" value="1800UF" constant="no"/>
+<attribute name="VOLTAGERATING" value="6.3V" constant="no"/>
+</technology>
+<technology name="FPV391UAP">
+<attribute name="MPN" value="EEE-FPV391UAP" constant="no"/>
+<attribute name="OC_FARNELL" value="1539521  " constant="no"/>
+<attribute name="OC_NEWARK" value="94M7004" constant="no"/>
+<attribute name="PACKAGE" value="CASE-G" constant="no"/>
+<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
+<attribute name="TOLERANCE" value="±20 %" constant="no"/>
+<attribute name="VALUE" value="390UF" constant="no"/>
+<attribute name="VOLTAGERATING" value="35V" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-CASE-H13" package="CAPAE1350X1400N">
+<connects>
+<connect gate="A" pin="1" pad="1"/>
+<connect gate="A" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name="FK0J332AQ">
+<attribute name="MPN" value="EEE-FK0J332AQ" constant="no"/>
+<attribute name="OC_FARNELL" value="2284648  " constant="no"/>
+<attribute name="OC_NEWARK" value="53W3661" constant="no"/>
+<attribute name="PACKAGE" value="CASE-H13" constant="no"/>
+<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
+<attribute name="TOLERANCE" value="±20 %" constant="no"/>
+<attribute name="VALUE" value="3300UF" constant="no"/>
+<attribute name="VOLTAGERATING" value="6.3V" constant="no"/>
+</technology>
+<technology name="FK1C152AQ">
+<attribute name="MPN" value="EEE-FK1C152AQ" constant="no"/>
+<attribute name="OC_FARNELL" value="2284655  " constant="no"/>
+<attribute name="OC_NEWARK" value="53W3668" constant="no"/>
+<attribute name="PACKAGE" value="CASE-H13" constant="no"/>
+<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
+<attribute name="TOLERANCE" value="±20 %" constant="no"/>
+<attribute name="VALUE" value="1500UF" constant="no"/>
+<attribute name="VOLTAGERATING" value="16V" constant="no"/>
+</technology>
+<technology name="FK1E102AQ">
+<attribute name="MPN" value="EEE-FK1E102AQ" constant="no"/>
+<attribute name="OC_FARNELL" value="2284658  " constant="no"/>
+<attribute name="OC_NEWARK" value="53W3671" constant="no"/>
+<attribute name="PACKAGE" value="CASE-H13" constant="no"/>
+<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
+<attribute name="TOLERANCE" value="±20 %" constant="no"/>
+<attribute name="VALUE" value="1000UF" constant="no"/>
+<attribute name="VOLTAGERATING" value="25V" constant="no"/>
+</technology>
+<technology name="FK1H331AQ">
+<attribute name="MPN" value="EEE-FK1H331AQ" constant="no"/>
+<attribute name="OC_FARNELL" value="2284667  " constant="no"/>
+<attribute name="OC_NEWARK" value="53W3679" constant="no"/>
+<attribute name="PACKAGE" value="CASE-H13" constant="no"/>
+<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
+<attribute name="TOLERANCE" value="±20 %" constant="no"/>
+<attribute name="VALUE" value="330UF" constant="no"/>
+<attribute name="VOLTAGERATING" value="50V" constant="no"/>
+</technology>
+<technology name="FK1J221AQ">
+<attribute name="MPN" value="EEE-FK1J221AQ" constant="no"/>
+<attribute name="OC_FARNELL" value="2284669  " constant="no"/>
+<attribute name="OC_NEWARK" value="53W3681" constant="no"/>
+<attribute name="PACKAGE" value="CASE-H13" constant="no"/>
+<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
+<attribute name="TOLERANCE" value="±20 %" constant="no"/>
+<attribute name="VALUE" value="220UF" constant="no"/>
+<attribute name="VOLTAGERATING" value="63V" constant="no"/>
+</technology>
+<technology name="FK1K101AQ">
+<attribute name="MPN" value="EEE-FK1K101AQ" constant="no"/>
+<attribute name="OC_FARNELL" value="2284672  " constant="no"/>
+<attribute name="OC_NEWARK" value="53W3684" constant="no"/>
+<attribute name="PACKAGE" value="CASE-H13" constant="no"/>
+<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
+<attribute name="TOLERANCE" value="±20 %" constant="no"/>
+<attribute name="VALUE" value="100UF" constant="no"/>
+<attribute name="VOLTAGERATING" value="80V" constant="no"/>
+</technology>
+<technology name="FK1K151AQ">
+<attribute name="MPN" value="EEE-FK1K151AQ" constant="no"/>
+<attribute name="OC_FARNELL" value="2284673  " constant="no"/>
+<attribute name="OC_NEWARK" value="53W3685" constant="no"/>
+<attribute name="PACKAGE" value="CASE-H13" constant="no"/>
+<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
+<attribute name="TOLERANCE" value="±20 %" constant="no"/>
+<attribute name="VALUE" value="150UF" constant="no"/>
+<attribute name="VOLTAGERATING" value="80V" constant="no"/>
+</technology>
+<technology name="FK1V471AQ">
+<attribute name="MPN" value="EEE-FK1V471AQ" constant="no"/>
+<attribute name="OC_FARNELL" value="1850134  " constant="no"/>
+<attribute name="OC_NEWARK" value="23T0872" constant="no"/>
+<attribute name="PACKAGE" value="CASE-H13" constant="no"/>
+<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
+<attribute name="TOLERANCE" value="±20 %" constant="no"/>
+<attribute name="VALUE" value=" 470UF" constant="no"/>
+<attribute name="VOLTAGERATING" value="35V" constant="no"/>
+</technology>
+<technology name="FK1V681AQ">
+<attribute name="MPN" value="EEE-FK1V681AQ" constant="no"/>
+<attribute name="OC_FARNELL" value="1850135  " constant="no"/>
+<attribute name="OC_NEWARK" value="23T0874" constant="no"/>
+<attribute name="PACKAGE" value="CASE-H13" constant="no"/>
+<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
+<attribute name="TOLERANCE" value="±20 %" constant="no"/>
+<attribute name="VALUE" value="680UF" constant="no"/>
+<attribute name="VOLTAGERATING" value="35V" constant="no"/>
+</technology>
+<technology name="FK2A470AQ">
+<attribute name="MPN" value="EEE-FK2A470AQ" constant="no"/>
+<attribute name="OC_FARNELL" value="2284681  " constant="no"/>
+<attribute name="OC_NEWARK" value="53W3693" constant="no"/>
+<attribute name="PACKAGE" value="CASE-H13" constant="no"/>
+<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
+<attribute name="TOLERANCE" value="±20 %" constant="no"/>
+<attribute name="VALUE" value="47UF" constant="no"/>
+<attribute name="VOLTAGERATING" value="100V" constant="no"/>
+</technology>
+<technology name="FK2A680AQ">
+<attribute name="MPN" value="EEE-FK2A680AQ" constant="no"/>
+<attribute name="OC_FARNELL" value="2284682  " constant="no"/>
+<attribute name="OC_NEWARK" value="53W3694" constant="no"/>
+<attribute name="PACKAGE" value="CASE-H13" constant="no"/>
+<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
+<attribute name="TOLERANCE" value="±20 %" constant="no"/>
+<attribute name="VALUE" value="68UF" constant="no"/>
+<attribute name="VOLTAGERATING" value="100V" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="-CASE-J16" package="CAPAE1700X1700N">
+<connects>
+<connect gate="A" pin="1" pad="1"/>
+<connect gate="A" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name="FK1C332AM">
+<attribute name="MPN" value="EEE-FK1C332AM" constant="no"/>
+<attribute name="OC_FARNELL" value="1850133  " constant="no"/>
+<attribute name="OC_NEWARK" value="23T0847" constant="no"/>
+<attribute name="PACKAGE" value="CASE-J16" constant="no"/>
+<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
+<attribute name="TOLERANCE" value="±20 %" constant="no"/>
+<attribute name="VALUE" value=" 3300UF" constant="no"/>
+<attribute name="VOLTAGERATING" value="16V" constant="no"/>
+</technology>
+<technology name="FK1E222AM">
+<attribute name="MPN" value="EEE-FK1E222AM" constant="no"/>
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+<symbol name="ATTINY828R-AU">
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+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="ATTINY828R-AU" prefix="U">
+<description>IC, MCU, 8KB, FLASH, 20MHZ, TQFP-32</description>
+<gates>
+<gate name="A" symbol="ATTINY828R-AU" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="QFP80P900X900X120-32N">
+<connects>
+<connect gate="A" pin="(PC!INT5/ADC5)_PA5" pad="14"/>
+<connect gate="A" pin="(PCINT0/ADC0)_PA0" pad="9"/>
+<connect gate="A" pin="(PCINT1/ADC1/AIN0)_PA1" pad="10"/>
+<connect gate="A" pin="(PCINT18/ADC18/TOCC2/RXD/INT1)_PC2" pad="1"/>
+<connect gate="A" pin="(PCINT19/ADC19/TOCC3/TXD)_PC3" pad="2"/>
+<connect gate="A" pin="(PCINT2/ADC2/AIN1)_PA2" pad="11"/>
+<connect gate="A" pin="(PCINT20/ADC20/TOCC4)_PC4" pad="3"/>
+<connect gate="A" pin="(PCINT21/ADC21/TOCC5/ICP1/T0)_PC5" pad="6"/>
+<connect gate="A" pin="(PCINT22/ADC22/CLKI/TOCC6)_PC6" pad="7"/>
+<connect gate="A" pin="(PCINT23/ADC23/TOCC7/T1)_PC7" pad="8"/>
+<connect gate="A" pin="(PCINT3/ADC3)_PA3" pad="12"/>
+<connect gate="A" pin="(PCINT4/ADC4)_PA4" pad="13"/>
+<connect gate="A" pin="(PCINT6/ADC6)_PA6" pad="15"/>
+<connect gate="A" pin="(PCINT7/ADC7)_PA7" pad="16"/>
+<connect gate="A" pin="AVCC" pad="18"/>
+<connect gate="A" pin="GND" pad="21"/>
+<connect gate="A" pin="GND_2" pad="5"/>
+<connect gate="A" pin="PB0_(PCINT8/ADC8)" pad="17"/>
+<connect gate="A" pin="PB1_(PCINT9/ADC9)" pad="19"/>
+<connect gate="A" pin="PB2_(PCINT10/ADC10)" pad="20"/>
+<connect gate="A" pin="PB3_(PCINT11/ADC11)" pad="22"/>
+<connect gate="A" pin="PB4_(PCINT12/ADC12)" pad="23"/>
+<connect gate="A" pin="PB5_(PCINT13/ADC13)" pad="24"/>
+<connect gate="A" pin="PB6_(PCINT14/ADC14)" pad="25"/>
+<connect gate="A" pin="PB7_(PCINT15/ADC15)" pad="26"/>
+<connect gate="A" pin="PC0_(PCINT16/ADC16/TOCC0/SS/XCK)" pad="31"/>
+<connect gate="A" pin="PC1_(PCINT17/ADC17/TOCC1/INT0/CLKO)" pad="32"/>
+<connect gate="A" pin="PD0_(PCINT24/ADC24/SDA/MOSI)" pad="27"/>
+<connect gate="A" pin="PD1_(PCINT25/ADC25/MISO)" pad="28"/>
+<connect gate="A" pin="PD2_(!PCINT26/ADC26/RESET/DW)" pad="29"/>
+<connect gate="A" pin="PD3_(PCINT27/ADC27/SCL/SCK)" pad="30"/>
+<connect gate="A" pin="VCC" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MPN" value="ATTINY828R-AU" constant="no"/>
+<attribute name="OC_FARNELL" value="2249850" constant="no"/>
+<attribute name="OC_NEWARK" value="Unknown" constant="no"/>
+<attribute name="PACKAGE" value="TQFP-32" constant="no"/>
+<attribute name="SUPPLIER" value="ATMEL" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="ON_Semiconductor-MC14551BDG">
+<packages>
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+<connect gate="A" pin="Z0" pad="11"/>
+<connect gate="A" pin="Z1" pad="12"/>
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+<attribute name="SUPPLIER" value="ON SEMICONDUCTOR" constant="no"/>
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 </device>
-<device name="-CASE-J16" package="CAPAE1700X1700N">
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="Microchip-23K640-I_SN">
+<description><b> Developed By element14 </b><p> 
+
+For feedback and Technical support please contact reach from below:
+<br> Tech Support e-mail  : <a href="mailto:CAD_Tech at element14.com">CAD_Tech at element14.com</a>
+<br>Community website: <a href=http://www.element14.com/community/community/knode/cadsoft_eagle/eagle_cad_libraries>
+EAGLE CAD Libraries on element14</a></description>
+<packages>
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+</package>
+</packages>
+<symbols>
+<symbol name="23K640-I/SN">
+<pin name="VCC" x="-17.78" y="10.16" length="middle" direction="pwr"/>
+<pin name="!CS" x="-17.78" y="5.08" length="middle" direction="in"/>
+<pin name="SO" x="17.78" y="10.16" length="middle" direction="out" rot="R180"/>
+<pin name="NC" x="-17.78" y="-7.62" length="middle" direction="nc"/>
+<pin name="SCK" x="-17.78" y="0" length="middle" direction="in"/>
+<pin name="!HOLD" x="-17.78" y="-2.54" length="middle" direction="in"/>
+<pin name="SI" x="-17.78" y="2.54" length="middle" direction="in"/>
+<pin name="VSS" x="-17.78" y="-12.7" length="middle" direction="pwr"/>
+<wire x1="-12.7" y1="15.24" x2="-12.7" y2="-20.32" width="0.4064" layer="94"/>
+<wire x1="-12.7" y1="-20.32" x2="12.7" y2="-20.32" width="0.4064" layer="94"/>
+<wire x1="12.7" y1="-20.32" x2="12.7" y2="15.24" width="0.4064" layer="94"/>
+<wire x1="12.7" y1="15.24" x2="-12.7" y2="15.24" width="0.4064" layer="94"/>
+<text x="-5.3086" y="16.891" size="2.0828" layer="95" ratio="10" rot="SR0">>NAME</text>
+<text x="-7.239" y="-23.2918" size="2.0828" layer="96" ratio="10" rot="SR0">>VALUE</text>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="23K640-I/SN" prefix="U">
+<description>64K SPI Bus Low-Power Serial SRAM,SOIC-8</description>
+<gates>
+<gate name="A" symbol="23K640-I/SN" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="SOIC127P600X175-8N">
 <connects>
-<connect gate="A" pin="1" pad="1"/>
-<connect gate="A" pin="2" pad="2"/>
+<connect gate="A" pin="!CS" pad="1"/>
+<connect gate="A" pin="!HOLD" pad="7"/>
+<connect gate="A" pin="NC" pad="3"/>
+<connect gate="A" pin="SCK" pad="6"/>
+<connect gate="A" pin="SI" pad="5"/>
+<connect gate="A" pin="SO" pad="2"/>
+<connect gate="A" pin="VCC" pad="8"/>
+<connect gate="A" pin="VSS" pad="4"/>
 </connects>
 <technologies>
-<technology name="FK1C332AM">
-<attribute name="MPN" value="EEE-FK1C332AM" constant="no"/>
-<attribute name="OC_FARNELL" value="1850133  " constant="no"/>
-<attribute name="OC_NEWARK" value="23T0847" constant="no"/>
-<attribute name="PACKAGE" value="CASE-J16" constant="no"/>
-<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
-<attribute name="TOLERANCE" value="±20 %" constant="no"/>
-<attribute name="VALUE" value=" 3300UF" constant="no"/>
-<attribute name="VOLTAGERATING" value="16V" constant="no"/>
-</technology>
-<technology name="FK1E222AM">
-<attribute name="MPN" value="EEE-FK1E222AM" constant="no"/>
-<attribute name="OC_FARNELL" value="2284661  " constant="no"/>
-<attribute name="OC_NEWARK" value="53W3674" constant="no"/>
-<attribute name="PACKAGE" value="CASE-J16" constant="no"/>
-<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
-<attribute name="TOLERANCE" value="±20 %" constant="no"/>
-<attribute name="VALUE" value="2200UF" constant="no"/>
-<attribute name="VOLTAGERATING" value=" 25V" constant="no"/>
-</technology>
-<technology name="FK1H102AM">
-<attribute name="MPN" value="EEE-FK1H102AM" constant="no"/>
-<attribute name="OC_FARNELL" value="1850136  " constant="no"/>
-<attribute name="OC_NEWARK" value="23T0858" constant="no"/>
-<attribute name="PACKAGE" value="CASE-J16" constant="no"/>
-<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
-<attribute name="TOLERANCE" value="±20 %" constant="no"/>
-<attribute name="VALUE" value="1000UF" constant="no"/>
-<attribute name="VOLTAGERATING" value=" 50V" constant="no"/>
-</technology>
-<technology name="FK1H471AM">
-<attribute name="MPN" value="EEE-FK1H471AM" constant="no"/>
-<attribute name="OC_FARNELL" value="2284668  " constant="no"/>
-<attribute name="OC_NEWARK" value="53W3680" constant="no"/>
-<attribute name="PACKAGE" value="CASE-J16" constant="no"/>
-<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
-<attribute name="TOLERANCE" value="±20 %" constant="no"/>
-<attribute name="VALUE" value="470UF" constant="no"/>
-<attribute name="VOLTAGERATING" value="50V" constant="no"/>
-</technology>
-<technology name="FK1J471AM">
-<attribute name="MPN" value="EEE-FK1J471AM" constant="no"/>
-<attribute name="OC_FARNELL" value="2284670  " constant="no"/>
-<attribute name="OC_NEWARK" value="53W3682" constant="no"/>
-<attribute name="PACKAGE" value="CASE-J16" constant="no"/>
-<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
-<attribute name="TOLERANCE" value="±20 %" constant="no"/>
-<attribute name="VALUE" value="470UF" constant="no"/>
-<attribute name="VOLTAGERATING" value="63V" constant="no"/>
-</technology>
-<technology name="FK1V152AM">
-<attribute name="MPN" value="EEE-FK1V152AM" constant="no"/>
-<attribute name="OC_FARNELL" value="2284676  " constant="no"/>
-<attribute name="OC_NEWARK" value="53W3688" constant="no"/>
-<attribute name="PACKAGE" value="CASE-J16" constant="no"/>
-<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
-<attribute name="TOLERANCE" value="±20 %" constant="no"/>
-<attribute name="VALUE" value="1500UF" constant="no"/>
-<attribute name="VOLTAGERATING" value="35V" constant="no"/>
-</technology>
-<technology name="FK2A101AM">
-<attribute name="MPN" value="EEE-FK2A101AM" constant="no"/>
-<attribute name="OC_FARNELL" value="2284678  " constant="no"/>
-<attribute name="OC_NEWARK" value="53W3690" constant="no"/>
-<attribute name="PACKAGE" value="CASE-J16" constant="no"/>
-<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
-<attribute name="TOLERANCE" value="±20 %" constant="no"/>
-<attribute name="VALUE" value="100UF" constant="no"/>
-<attribute name="VOLTAGERATING" value="100V" constant="no"/>
+<technology name="">
+<attribute name="MPN" value="23K640-I/SN " constant="no"/>
+<attribute name="OC_FARNELL" value="1695549 " constant="no"/>
+<attribute name="OC_NEWARK" value="71P4706 " constant="no"/>
+<attribute name="PACKAGE" value="SOIC-8" constant="no"/>
+<attribute name="SUPPLIER" value="MICROCHIP" constant="no"/>
 </technology>
 </technologies>
 </device>
-<device name="-CASE-K16" package="CAPAE1900X1700N">
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="jumper">
+<description><b>Jumpers</b><p>
+<author>Created by librarian at cadsoft.de</author></description>
+<packages>
+<package name="JP1">
+<description><b>JUMPER</b></description>
+<wire x1="-1.016" y1="0" x2="-1.27" y2="0.254" width="0.1524" layer="21"/>
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+<pad name="1" x="0" y="-1.27" drill="0.9144" shape="long"/>
+<pad name="2" x="0" y="1.27" drill="0.9144" shape="long"/>
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+</package>
+</packages>
+<symbols>
+<symbol name="J1">
+<wire x1="0" y1="2.54" x2="0" y2="3.81" width="0.4064" layer="94"/>
+<wire x1="0" y1="3.81" x2="0" y2="5.08" width="0.1524" layer="94"/>
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+<text x="-2.54" y="-5.08" size="1.778" layer="95" rot="R90">>NAME</text>
+<text x="4.445" y="-5.08" size="1.778" layer="96" rot="R90">>VALUE</text>
+<pin name="1" x="0" y="-7.62" visible="pad" length="short" direction="pas" rot="R90"/>
+<pin name="2" x="0" y="7.62" visible="pad" length="short" direction="pas" rot="R270"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="JP1Q" prefix="JP" uservalue="yes">
+<description><b>JUMPER</b></description>
+<gates>
+<gate name="A" symbol="J1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="JP1">
 <connects>
 <connect gate="A" pin="1" pad="1"/>
 <connect gate="A" pin="2" pad="2"/>
 </connects>
 <technologies>
-<technology name="FK1E332AM">
-<attribute name="MPN" value="EEE-FK1E332AM" constant="no"/>
-<attribute name="OC_FARNELL" value="2284664  " constant="no"/>
-<attribute name="OC_NEWARK" value="53W3676" constant="no"/>
-<attribute name="PACKAGE" value="CASE-K16" constant="no"/>
-<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
-<attribute name="TOLERANCE" value="±20 %" constant="no"/>
-<attribute name="VALUE" value="3300UF" constant="no"/>
-<attribute name="VOLTAGERATING" value="25V" constant="no"/>
-</technology>
-<technology name="FK2A221AM">
-<attribute name="MPN" value="EEE-FK2A221AM" constant="no"/>
-<attribute name="OC_FARNELL" value="2284679  " constant="no"/>
-<attribute name="OC_NEWARK" value="53W3691" constant="no"/>
-<attribute name="PACKAGE" value="CASE-K16" constant="no"/>
-<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
-<attribute name="TOLERANCE" value="±20 %" constant="no"/>
-<attribute name="VALUE" value="220UF" constant="no"/>
-<attribute name="VOLTAGERATING" value="100V" constant="no"/>
-</technology>
-<technology name="FK2A331AM">
-<attribute name="MPN" value="EEE-FK2A331AM" constant="no"/>
-<attribute name="OC_FARNELL" value="2284680  " constant="no"/>
-<attribute name="OC_NEWARK" value="53W3692" constant="no"/>
-<attribute name="PACKAGE" value="CASE-K16" constant="no"/>
-<attribute name="SUPPLIER" value="PANASONIC" constant="no"/>
-<attribute name="TOLERANCE" value="±20 %" constant="no"/>
-<attribute name="VALUE" value="330UF" constant="no"/>
-<attribute name="VOLTAGERATING" value="100V" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="" package="CAPAE530X610N_BIG_PADS">
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="MCP79412">
+<packages>
+<package name="SOIC127P600X175-8N">
+<smd name="1" x="-2.3622" y="1.905" dx="2.1844" dy="0.5588" layer="1"/>
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+<smd name="8" x="2.3622" y="1.905" dx="2.1844" dy="0.5588" layer="1"/>
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+<symbols>
+<symbol name="MCP79412-I/SN">
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+<pin name="VBAT" x="-15.24" y="2.54" length="middle" direction="pwr"/>
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+</symbols>
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+<deviceset name="MCP79412-I/SN" prefix="U">
+<description>RTCC, I2C, 1K EE, 64B SRAM, 8SOIC</description>
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+</gates>
+<devices>
+<device name="" package="SOIC127P600X175-8N">
 <connects>
-<connect gate="A" pin="1" pad="1"/>
-<connect gate="A" pin="2" pad="2"/>
+<connect gate="A" pin="MFP" pad="7"/>
+<connect gate="A" pin="SCL" pad="6"/>
+<connect gate="A" pin="SDA" pad="5"/>
+<connect gate="A" pin="VBAT" pad="3"/>
+<connect gate="A" pin="VCC" pad="8"/>
+<connect gate="A" pin="VSS" pad="4"/>
+<connect gate="A" pin="X1" pad="1"/>
+<connect gate="A" pin="X2" pad="2"/>
 </connects>
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-<attribute name="SUPPLIER" value="" constant="no"/>
-<attribute name="TOLERANCE" value="" constant="no"/>
-<attribute name="VALUE" value="" constant="no"/>
-<attribute name="VOLTAGERATING" value="" constant="no"/>
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-<attribute name="VALUE" value="10uF" constant="no"/>
-<attribute name="VOLTAGERATING" value="35V" constant="no"/>
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-</device>
-</devices>
-</deviceset>
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-For feedback and Technical support please contact reach from below:
-<br> Tech Support e-mail  : <a href="mailto:CAD_Tech at element14.com">CAD_Tech at element14.com</a>
-<br>Community website: <a href=http://www.element14.com/community/community/knode/cadsoft_eagle/eagle_cad_libraries>
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-<text x="-5.715" y="2.794" size="1.27" layer="25" ratio="10">>NAME</text>
-<text x="-5.715" y="-4.191" size="1.27" layer="27" ratio="10">>VALUE</text>
-<rectangle x1="-6.604" y1="-3.048" x2="6.604" y2="3.048" layer="43"/>
+<gates>
+<gate name="G$1" symbol="Q" x="0" y="0"/>
+</gates>
+<devices>
+<device name="HC49S" package="HC49/S">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="1667008" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="HC49GW" package="HC49GW">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="HC49TL-H" package="HC49TL-H">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="HC49U-H" package="HC49U-H">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="1666973" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="HC49U-LM" package="HC49U-LM">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="1666956" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="HC49U-V" package="HC49U-V">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="1666969" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="HC49U70" package="HC49U70">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="HC49UP" package="HC49UP">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="HC13U-H" package="HC13U-H">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="HC18U-H" package="HC18U-H">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="HC18U-V" package="HC18U-V">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="HC33U-H" package="HC33U-H">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="HC33U-V" package="HC33U-V">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="SM49" package="SM49">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="TC26H" package="TC26H">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="TC26V" package="TC26V">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="TC38H" package="TC38H">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="2"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="68SMX" package="86SMX">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="6344860" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="MM20SS" package="MM20SS">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="MM39SL" package="MM39SL">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="CTS406" package="CTS406">
+<connects>
+<connect gate="G$1" pin="1" pad="1"/>
+<connect gate="G$1" pin="2" pad="3"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="ASF*" prefix="Q">
+<description><b>CRYSTAL CLOCK OSCILLATORS</b><p>
+5.0 Vdc or 3.3 Vdc - LOW PROFILE ULTRA MINIATURE CERAMIC SURFACE MOUNT<br>
+Source: http://www.abracon.com/Oscillators/asf1-L-L1.pdf</description>
+<gates>
+<gate name="G$1" symbol="QG1" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="ASF">
+<connects>
+<connect gate="G$1" pin="FO" pad="3"/>
+<connect gate="G$1" pin="GND" pad="2"/>
+<connect gate="G$1" pin="OE" pad="1"/>
+<connect gate="G$1" pin="VCC" pad="4"/>
+</connects>
+<technologies>
+<technology name="1">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="" constant="no"/>
+<attribute name="OC_FARNELL" value="unknown" constant="no"/>
+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
+</technology>
+<technology name="L">
+<attribute name="MF" value="" constant="no"/>
+<attribute name="MPN" value="ASFLM1-50.000MHZ-C-T" constant="no"/>
+<attribute name="OC_FARNELL" value="1838931" constant="no"/>
+<attribute name="OC_NEWARK" value="99M0411" constant="no"/>
+</technology>
+<technology name="L1">
+<attribute name="MF" value="Abracon Corporation" constant="no"/>
+<attribute name="MPN" value="ASFL1-125.000MHZ-EC-T" constant="no"/>
+<attribute name="OC_FARNELL" value="1838931" constant="no"/>
+<attribute name="OC_NEWARK" value="19M1882" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="Xilinx_XC7A200TFBG484">
+<packages>
+<package name="FF484">
+<description><b>FF484 FBG484</b></description>
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+<pin name="GND at 17" x="5.08" y="10.16" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 18" x="5.08" y="7.62" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 19" x="5.08" y="5.08" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 20" x="5.08" y="2.54" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 21" x="5.08" y="0" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 22" x="5.08" y="-2.54" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 23" x="5.08" y="-5.08" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 24" x="5.08" y="-7.62" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 25" x="5.08" y="-10.16" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 26" x="5.08" y="-12.7" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 27" x="5.08" y="-15.24" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 28" x="5.08" y="-17.78" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 29" x="5.08" y="-20.32" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 30" x="5.08" y="-22.86" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 31" x="5.08" y="-25.4" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 32" x="5.08" y="-27.94" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 33" x="5.08" y="-30.48" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 34" x="5.08" y="-33.02" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 35" x="5.08" y="-35.56" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 36" x="5.08" y="-38.1" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 37" x="5.08" y="-40.64" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 38" x="5.08" y="-43.18" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 39" x="5.08" y="-45.72" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 40" x="5.08" y="-48.26" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 41" x="5.08" y="-50.8" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 42" x="5.08" y="-53.34" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 43" x="5.08" y="-55.88" length="middle" direction="pwr" rot="R180"/>
+</symbol>
+<symbol name="XC7A200TFBG484_GNDB">
+<wire x1="-10.16" y1="55.88" x2="0" y2="55.88" width="0.254" layer="94"/>
+<wire x1="0" y1="55.88" x2="0" y2="-55.88" width="0.254" layer="94"/>
+<wire x1="0" y1="-55.88" x2="-10.16" y2="-55.88" width="0.254" layer="94"/>
+<text x="0" y="56.642" size="1.778" layer="95" rot="MR0">>NAME</text>
+<text x="0" y="-58.42" size="1.778" layer="96" rot="MR0">>VALUE</text>
+<pin name="GND at 44" x="5.08" y="53.34" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 45" x="5.08" y="50.8" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 46" x="5.08" y="48.26" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 47" x="5.08" y="45.72" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 48" x="5.08" y="43.18" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 49" x="5.08" y="40.64" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 50" x="5.08" y="38.1" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 51" x="5.08" y="35.56" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 52" x="5.08" y="33.02" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 53" x="5.08" y="30.48" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 54" x="5.08" y="27.94" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 55" x="5.08" y="25.4" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 56" x="5.08" y="22.86" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 57" x="5.08" y="20.32" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 58" x="5.08" y="17.78" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 59" x="5.08" y="15.24" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 60" x="5.08" y="12.7" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 61" x="5.08" y="10.16" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 62" x="5.08" y="7.62" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 63" x="5.08" y="5.08" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 64" x="5.08" y="2.54" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 65" x="5.08" y="0" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 66" x="5.08" y="-2.54" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 67" x="5.08" y="-5.08" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 68" x="5.08" y="-7.62" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 69" x="5.08" y="-10.16" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 70" x="5.08" y="-12.7" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 71" x="5.08" y="-15.24" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 72" x="5.08" y="-17.78" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 73" x="5.08" y="-20.32" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 74" x="5.08" y="-22.86" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 75" x="5.08" y="-25.4" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 76" x="5.08" y="-27.94" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 77" x="5.08" y="-30.48" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 78" x="5.08" y="-33.02" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 79" x="5.08" y="-35.56" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 80" x="5.08" y="-38.1" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 81" x="5.08" y="-40.64" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 82" x="5.08" y="-43.18" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 83" x="5.08" y="-45.72" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 84" x="5.08" y="-48.26" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 85" x="5.08" y="-50.8" length="middle" direction="pwr" rot="R180"/>
+<pin name="GND at 86" x="5.08" y="-53.34" length="middle" direction="pwr" rot="R180"/>
+</symbol>
+<symbol name="XC7A200TFBG484_MGTAVCC">
+<wire x1="-10.16" y1="7.62" x2="0" y2="7.62" width="0.254" layer="94"/>
+<wire x1="0" y1="7.62" x2="0" y2="-7.62" width="0.254" layer="94"/>
+<wire x1="0" y1="-7.62" x2="-10.16" y2="-7.62" width="0.254" layer="94"/>
+<text x="0" y="8.382" size="1.778" layer="95" rot="MR0">>NAME</text>
+<text x="0" y="-10.16" size="1.778" layer="96" rot="MR0">>VALUE</text>
+<pin name="MGTAVCC at 0" x="5.08" y="5.08" length="middle" direction="in" rot="R180"/>
+<pin name="MGTAVCC at 1" x="5.08" y="2.54" length="middle" direction="in" rot="R180"/>
+<pin name="MGTAVCC at 2" x="5.08" y="0" length="middle" direction="in" rot="R180"/>
+<pin name="MGTAVCC at 3" x="5.08" y="-2.54" length="middle" direction="in" rot="R180"/>
+<pin name="MGTAVCC at 4" x="5.08" y="-5.08" length="middle" direction="in" rot="R180"/>
+</symbol>
+<symbol name="XC7A200TFBG484_MGTAVTT">
+<wire x1="-10.16" y1="7.62" x2="0" y2="7.62" width="0.254" layer="94"/>
+<wire x1="0" y1="7.62" x2="0" y2="-10.16" width="0.254" layer="94"/>
+<wire x1="0" y1="-10.16" x2="-10.16" y2="-10.16" width="0.254" layer="94"/>
+<text x="0" y="8.382" size="1.778" layer="95" rot="MR0">>NAME</text>
+<text x="0" y="-12.7" size="1.778" layer="96" rot="MR0">>VALUE</text>
+<pin name="MGTAVTT at 0" x="5.08" y="5.08" length="middle" direction="in" rot="R180"/>
+<pin name="MGTAVTT at 1" x="5.08" y="2.54" length="middle" direction="in" rot="R180"/>
+<pin name="MGTAVTT at 2" x="5.08" y="0" length="middle" direction="in" rot="R180"/>
+<pin name="MGTAVTT at 3" x="5.08" y="-2.54" length="middle" direction="in" rot="R180"/>
+<pin name="MGTAVTT at 4" x="5.08" y="-5.08" length="middle" direction="in" rot="R180"/>
+<pin name="MGTAVTT at 5" x="5.08" y="-7.62" length="middle" direction="in" rot="R180"/>
+</symbol>
+<symbol name="XC7A200TFBG484_TDIODE">
+<wire x1="-10.16" y1="2.54" x2="0" y2="2.54" width="0.254" layer="94"/>
+<wire x1="0" y1="2.54" x2="0" y2="-5.08" width="0.254" layer="94"/>
+<wire x1="0" y1="-5.08" x2="-10.16" y2="-5.08" width="0.254" layer="94"/>
+<text x="0" y="3.302" size="1.778" layer="95" rot="MR0">>NAME</text>
+<text x="0" y="-7.62" size="1.778" layer="96" rot="MR0">>VALUE</text>
+<pin name="DXP_0" x="5.08" y="0" length="middle" rot="R180"/>
+<pin name="DXN_0" x="5.08" y="-2.54" length="middle" rot="R180"/>
+</symbol>
+<symbol name="XC7A200TFBG484_VCCAUX">
+<wire x1="-10.16" y1="7.62" x2="0" y2="7.62" width="0.254" layer="94"/>
+<wire x1="0" y1="7.62" x2="0" y2="-7.62" width="0.254" layer="94"/>
+<wire x1="0" y1="-7.62" x2="-10.16" y2="-7.62" width="0.254" layer="94"/>
+<text x="0" y="8.382" size="1.778" layer="95" rot="MR0">>NAME</text>
+<text x="0" y="-10.16" size="1.778" layer="96" rot="MR0">>VALUE</text>
+<pin name="VCCAUX at 0" x="5.08" y="5.08" length="middle" direction="in" rot="R180"/>
+<pin name="VCCAUX at 1" x="5.08" y="2.54" length="middle" direction="in" rot="R180"/>
+<pin name="VCCAUX at 2" x="5.08" y="0" length="middle" direction="in" rot="R180"/>
+<pin name="VCCAUX at 3" x="5.08" y="-2.54" length="middle" direction="in" rot="R180"/>
+<pin name="VCCAUX at 4" x="5.08" y="-5.08" length="middle" direction="in" rot="R180"/>
+</symbol>
+<symbol name="XC7A200TFBG484_VCCBRAM">
+<wire x1="-10.16" y1="5.08" x2="0" y2="5.08" width="0.254" layer="94"/>
+<wire x1="0" y1="5.08" x2="0" y2="-5.08" width="0.254" layer="94"/>
+<wire x1="0" y1="-5.08" x2="-10.16" y2="-5.08" width="0.254" layer="94"/>
+<text x="0" y="5.842" size="1.778" layer="95" rot="MR0">>NAME</text>
+<text x="0" y="-7.62" size="1.778" layer="96" rot="MR0">>VALUE</text>
+<pin name="VCCBRAM at 0" x="5.08" y="2.54" length="middle" direction="in" rot="R180"/>
+<pin name="VCCBRAM at 1" x="5.08" y="0" length="middle" direction="in" rot="R180"/>
+<pin name="VCCBRAM at 2" x="5.08" y="-2.54" length="middle" direction="in" rot="R180"/>
+</symbol>
+<symbol name="XC7A200TFBG484_VCCINT">
+<wire x1="-10.16" y1="17.78" x2="0" y2="17.78" width="0.254" layer="94"/>
+<wire x1="0" y1="17.78" x2="0" y2="-20.32" width="0.254" layer="94"/>
+<wire x1="0" y1="-20.32" x2="-10.16" y2="-20.32" width="0.254" layer="94"/>
+<text x="0" y="18.542" size="1.778" layer="95" rot="MR0">>NAME</text>
+<text x="0" y="-22.86" size="1.778" layer="96" rot="MR0">>VALUE</text>
+<pin name="VCCINT at 0" x="5.08" y="15.24" length="middle" direction="in" rot="R180"/>
+<pin name="VCCINT at 1" x="5.08" y="12.7" length="middle" direction="in" rot="R180"/>
+<pin name="VCCINT at 2" x="5.08" y="10.16" length="middle" direction="in" rot="R180"/>
+<pin name="VCCINT at 3" x="5.08" y="7.62" length="middle" direction="in" rot="R180"/>
+<pin name="VCCINT at 4" x="5.08" y="5.08" length="middle" direction="in" rot="R180"/>
+<pin name="VCCINT at 5" x="5.08" y="2.54" length="middle" direction="in" rot="R180"/>
+<pin name="VCCINT at 6" x="5.08" y="0" length="middle" direction="in" rot="R180"/>
+<pin name="VCCINT at 7" x="5.08" y="-2.54" length="middle" direction="in" rot="R180"/>
+<pin name="VCCINT at 8" x="5.08" y="-5.08" length="middle" direction="in" rot="R180"/>
+<pin name="VCCINT at 9" x="5.08" y="-7.62" length="middle" direction="in" rot="R180"/>
+<pin name="VCCINT at 10" x="5.08" y="-10.16" length="middle" direction="in" rot="R180"/>
+<pin name="VCCINT at 11" x="5.08" y="-12.7" length="middle" direction="in" rot="R180"/>
+<pin name="VCCINT at 12" x="5.08" y="-15.24" length="middle" direction="in" rot="R180"/>
+<pin name="VCCINT at 13" x="5.08" y="-17.78" length="middle" direction="in" rot="R180"/>
+</symbol>
+<symbol name="XC7A200TFBG484_XADC">
+<wire x1="-10.16" y1="7.62" x2="0" y2="7.62" width="0.254" layer="94"/>
+<wire x1="0" y1="7.62" x2="0" y2="-10.16" width="0.254" layer="94"/>
+<wire x1="0" y1="-10.16" x2="-10.16" y2="-10.16" width="0.254" layer="94"/>
+<text x="0" y="8.382" size="1.778" layer="95" rot="MR0">>NAME</text>
+<text x="0" y="-12.7" size="1.778" layer="96" rot="MR0">>VALUE</text>
+<pin name="VCCADC_0" x="5.08" y="5.08" length="middle" direction="in" rot="R180"/>
+<pin name="VP_0" x="5.08" y="2.54" length="middle" rot="R180"/>
+<pin name="VN_0" x="5.08" y="0" length="middle" rot="R180"/>
+<pin name="VREFP_0" x="5.08" y="-2.54" length="middle" rot="R180"/>
+<pin name="VREFN_0" x="5.08" y="-5.08" length="middle" rot="R180"/>
+<pin name="GNDADC_0" x="5.08" y="-7.62" length="middle" rot="R180"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="XC7A200TFBG484" prefix="U">
+<description>Xilinx FPGA: XC7A200TFBG484</description>
+<gates>
+<gate name="B0" symbol="XC7A200TFBG484_0" x="0" y="0"/>
+<gate name="B13" symbol="XC7A200TFBG484_13" x="45.72" y="0"/>
+<gate name="B14" symbol="XC7A200TFBG484_14" x="91.44" y="0"/>
+<gate name="B15" symbol="XC7A200TFBG484_15" x="137.16" y="0"/>
+<gate name="B16" symbol="XC7A200TFBG484_16" x="182.88" y="0"/>
+<gate name="B34" symbol="XC7A200TFBG484_34" x="228.6" y="0"/>
+<gate name="B35" symbol="XC7A200TFBG484_35" x="274.32" y="0"/>
+<gate name="B216" symbol="XC7A200TFBG484_216" x="320.04" y="0"/>
+<gate name="BGNDA" symbol="XC7A200TFBG484_GNDA" x="365.76" y="0"/>
+<gate name="BGNDB" symbol="XC7A200TFBG484_GNDB" x="411.48" y="0"/>
+<gate name="BMGTAVCC" symbol="XC7A200TFBG484_MGTAVCC" x="457.2" y="0"/>
+<gate name="BMGTAVTT" symbol="XC7A200TFBG484_MGTAVTT" x="502.92" y="0"/>
+<gate name="BTDIODE" symbol="XC7A200TFBG484_TDIODE" x="548.64" y="0"/>
+<gate name="BVCCAUX" symbol="XC7A200TFBG484_VCCAUX" x="594.36" y="0"/>
+<gate name="BVCCBRAM" symbol="XC7A200TFBG484_VCCBRAM" x="640.08" y="0"/>
+<gate name="BVCCINT" symbol="XC7A200TFBG484_VCCINT" x="685.8" y="0"/>
+<gate name="BXADC" symbol="XC7A200TFBG484_XADC" x="731.52" y="0"/>
+</gates>
+<devices>
+<device name="" package="FF484">
+<connects>
+<connect gate="B0" pin="CCLK_0" pad="L12"/>
+<connect gate="B0" pin="CFGBVS_0" pad="U8"/>
+<connect gate="B0" pin="DONE_0" pad="G11"/>
+<connect gate="B0" pin="INIT_B_0" pad="U12"/>
+<connect gate="B0" pin="M0_0" pad="U11"/>
+<connect gate="B0" pin="M1_0" pad="U10"/>
+<connect gate="B0" pin="M2_0" pad="U9"/>
+<connect gate="B0" pin="PROGRAM_B_0" pad="N12"/>
+<connect gate="B0" pin="TCK_0" pad="V12"/>
+<connect gate="B0" pin="TDI_0" pad="R13"/>
+<connect gate="B0" pin="TDO_0" pad="U13"/>
+<connect gate="B0" pin="TMS_0" pad="T13"/>
+<connect gate="B0" pin="VCCBATT_0" pad="E12"/>
+<connect gate="B0" pin="VCCO_0 at 0" pad="F12"/>
+<connect gate="B0" pin="VCCO_0 at 1" pad="T12"/>
+<connect gate="B13" pin="IO_0_13" pad="Y17"/>
+<connect gate="B13" pin="IO_L10N_T1_13" pad="W10"/>
+<connect gate="B13" pin="IO_L10P_T1_13" pad="V10"/>
+<connect gate="B13" pin="IO_L11N_T1_SRCC_13" pad="Y12"/>
+<connect gate="B13" pin="IO_L11P_T1_SRCC_13" pad="Y11"/>
+<connect gate="B13" pin="IO_L12N_T1_MRCC_13" pad="W12"/>
+<connect gate="B13" pin="IO_L12P_T1_MRCC_13" pad="W11"/>
+<connect gate="B13" pin="IO_L13N_T2_MRCC_13" pad="V14"/>
+<connect gate="B13" pin="IO_L13P_T2_MRCC_13" pad="V13"/>
+<connect gate="B13" pin="IO_L14N_T2_SRCC_13" pad="V15"/>
+<connect gate="B13" pin="IO_L14P_T2_SRCC_13" pad="U15"/>
+<connect gate="B13" pin="IO_L15N_T2_DQS_13" pad="T15"/>
+<connect gate="B13" pin="IO_L15P_T2_DQS_13" pad="T14"/>
+<connect gate="B13" pin="IO_L16N_T2_13" pad="W16"/>
+<connect gate="B13" pin="IO_L16P_T2_13" pad="W15"/>
+<connect gate="B13" pin="IO_L17N_T2_13" pad="U16"/>
+<connect gate="B13" pin="IO_L17P_T2_13" pad="T16"/>
+<connect gate="B13" pin="IO_L1N_T0_13" pad="AA16"/>
+<connect gate="B13" pin="IO_L1P_T0_13" pad="Y16"/>
+<connect gate="B13" pin="IO_L2N_T0_13" pad="AB17"/>
+<connect gate="B13" pin="IO_L2P_T0_13" pad="AB16"/>
+<connect gate="B13" pin="IO_L3N_T0_DQS_13" pad="AB13"/>
+<connect gate="B13" pin="IO_L3P_T0_DQS_13" pad="AA13"/>
+<connect gate="B13" pin="IO_L4N_T0_13" pad="AB15"/>
+<connect gate="B13" pin="IO_L4P_T0_13" pad="AA15"/>
+<connect gate="B13" pin="IO_L5N_T0_13" pad="AA14"/>
+<connect gate="B13" pin="IO_L5P_T0_13" pad="Y13"/>
+<connect gate="B13" pin="IO_L6N_T0_VREF_13" pad="Y14"/>
+<connect gate="B13" pin="IO_L6P_T0_13" pad="W14"/>
+<connect gate="B13" pin="IO_L7N_T1_13" pad="AB12"/>
+<connect gate="B13" pin="IO_L7P_T1_13" pad="AB11"/>
+<connect gate="B13" pin="IO_L8N_T1_13" pad="AB10"/>
+<connect gate="B13" pin="IO_L8P_T1_13" pad="AA9"/>
+<connect gate="B13" pin="IO_L9N_T1_DQS_13" pad="AA11"/>
+<connect gate="B13" pin="IO_L9P_T1_DQS_13" pad="AA10"/>
+<connect gate="B13" pin="VCCO_13 at 0" pad="V16"/>
+<connect gate="B13" pin="VCCO_13 at 1" pad="W13"/>
+<connect gate="B13" pin="VCCO_13 at 2" pad="Y10"/>
+<connect gate="B13" pin="VCCO_13 at 3" pad="AA17"/>
+<connect gate="B13" pin="VCCO_13 at 4" pad="AB14"/>
+<connect gate="B14" pin="IO_0_14" pad="P20"/>
+<connect gate="B14" pin="IO_25_14" pad="N15"/>
+<connect gate="B14" pin="IO_L10N_T1_D15_14" pad="AB22"/>
+<connect gate="B14" pin="IO_L10P_T1_D14_14" pad="AB21"/>
+<connect gate="B14" pin="IO_L11N_T1_SRCC_14" pad="V20"/>
+<connect gate="B14" pin="IO_L11P_T1_SRCC_14" pad="U20"/>
+<connect gate="B14" pin="IO_L12N_T1_MRCC_14" pad="W20"/>
+<connect gate="B14" pin="IO_L12P_T1_MRCC_14" pad="W19"/>
+<connect gate="B14" pin="IO_L13N_T2_MRCC_14" pad="Y19"/>
+<connect gate="B14" pin="IO_L13P_T2_MRCC_14" pad="Y18"/>
+<connect gate="B14" pin="IO_L14N_T2_SRCC_14" pad="V19"/>
+<connect gate="B14" pin="IO_L14P_T2_SRCC_14" pad="V18"/>
+<connect gate="B14" pin="IO_L15N_T2_DQS_DOUT_CSO_B_14" pad="AB20"/>
+<connect gate="B14" pin="IO_L15P_T2_DQS_RDWR_B_14" pad="AA19"/>
+<connect gate="B14" pin="IO_L16N_T2_A15_D31_14" pad="W17"/>
+<connect gate="B14" pin="IO_L16P_T2_CSI_B_14" pad="V17"/>
+<connect gate="B14" pin="IO_L17N_T2_A13_D29_14" pad="AB18"/>
+<connect gate="B14" pin="IO_L17P_T2_A14_D30_14" pad="AA18"/>
+<connect gate="B14" pin="IO_L18N_T2_A11_D27_14" pad="U18"/>
+<connect gate="B14" pin="IO_L18P_T2_A12_D28_14" pad="U17"/>
+<connect gate="B14" pin="IO_L19N_T3_A09_D25_VREF_14" pad="R14"/>
+<connect gate="B14" pin="IO_L19P_T3_A10_D26_14" pad="P14"/>
+<connect gate="B14" pin="IO_L1N_T0_D01_DIN_14" pad="R22"/>
+<connect gate="B14" pin="IO_L1P_T0_D00_MOSI_14" pad="P22"/>
+<connect gate="B14" pin="IO_L20N_T3_A07_D23_14" pad="T18"/>
+<connect gate="B14" pin="IO_L20P_T3_A08_D24_14" pad="R18"/>
+<connect gate="B14" pin="IO_L21N_T3_DQS_A06_D22_14" pad="P17"/>
+<connect gate="B14" pin="IO_L21P_T3_DQS_14" pad="N17"/>
+<connect gate="B14" pin="IO_L22N_T3_A04_D20_14" pad="R16"/>
+<connect gate="B14" pin="IO_L22P_T3_A05_D21_14" pad="P15"/>
+<connect gate="B14" pin="IO_L23N_T3_A02_D18_14" pad="N14"/>
+<connect gate="B14" pin="IO_L23P_T3_A03_D19_14" pad="N13"/>
+<connect gate="B14" pin="IO_L24N_T3_A00_D16_14" pad="R17"/>
+<connect gate="B14" pin="IO_L24P_T3_A01_D17_14" pad="P16"/>
+<connect gate="B14" pin="IO_L2N_T0_D03_14" pad="R21"/>
+<connect gate="B14" pin="IO_L2P_T0_D02_14" pad="P21"/>
+<connect gate="B14" pin="IO_L3N_T0_DQS_EMCCLK_14" pad="V22"/>
+<connect gate="B14" pin="IO_L3P_T0_DQS_PUDC_B_14" pad="U22"/>
+<connect gate="B14" pin="IO_L4N_T0_D05_14" pad="U21"/>
+<connect gate="B14" pin="IO_L4P_T0_D04_14" pad="T21"/>
+<connect gate="B14" pin="IO_L5N_T0_D07_14" pad="R19"/>
+<connect gate="B14" pin="IO_L5P_T0_D06_14" pad="P19"/>
+<connect gate="B14" pin="IO_L6N_T0_D08_VREF_14" pad="T20"/>
+<connect gate="B14" pin="IO_L6P_T0_FCS_B_14" pad="T19"/>
+<connect gate="B14" pin="IO_L7N_T1_D10_14" pad="W22"/>
+<connect gate="B14" pin="IO_L7P_T1_D09_14" pad="W21"/>
+<connect gate="B14" pin="IO_L8N_T1_D12_14" pad="AA21"/>
+<connect gate="B14" pin="IO_L8P_T1_D11_14" pad="AA20"/>
+<connect gate="B14" pin="IO_L9N_T1_DQS_D13_14" pad="Y22"/>
+<connect gate="B14" pin="IO_L9P_T1_DQS_14" pad="Y21"/>
+<connect gate="B14" pin="VCCO_14 at 0" pad="M14"/>
+<connect gate="B14" pin="VCCO_14 at 1" pad="P18"/>
+<connect gate="B14" pin="VCCO_14 at 2" pad="R15"/>
+<connect gate="B14" pin="VCCO_14 at 3" pad="T22"/>
+<connect gate="B14" pin="VCCO_14 at 4" pad="U19"/>
+<connect gate="B14" pin="VCCO_14 at 5" pad="Y20"/>
+<connect gate="B15" pin="IO_0_15" pad="J16"/>
+<connect gate="B15" pin="IO_25_15" pad="M17"/>
+<connect gate="B15" pin="IO_L10N_T1_AD11N_15" pad="L21"/>
+<connect gate="B15" pin="IO_L10P_T1_AD11P_15" pad="M21"/>
+<connect gate="B15" pin="IO_L11N_T1_SRCC_15" pad="J21"/>
+<connect gate="B15" pin="IO_L11P_T1_SRCC_15" pad="J20"/>
+<connect gate="B15" pin="IO_L12N_T1_MRCC_15" pad="H19"/>
+<connect gate="B15" pin="IO_L12P_T1_MRCC_15" pad="J19"/>
+<connect gate="B15" pin="IO_L13N_T2_MRCC_15" pad="K19"/>
+<connect gate="B15" pin="IO_L13P_T2_MRCC_15" pad="K18"/>
+<connect gate="B15" pin="IO_L14N_T2_SRCC_15" pad="L20"/>
+<connect gate="B15" pin="IO_L14P_T2_SRCC_15" pad="L19"/>
+<connect gate="B15" pin="IO_L15N_T2_DQS_ADV_B_15" pad="M22"/>
+<connect gate="B15" pin="IO_L15P_T2_DQS_15" pad="N22"/>
+<connect gate="B15" pin="IO_L16N_T2_A27_15" pad="L18"/>
+<connect gate="B15" pin="IO_L16P_T2_A28_15" pad="M18"/>
+<connect gate="B15" pin="IO_L17N_T2_A25_15" pad="N19"/>
+<connect gate="B15" pin="IO_L17P_T2_A26_15" pad="N18"/>
+<connect gate="B15" pin="IO_L18N_T2_A23_15" pad="M20"/>
+<connect gate="B15" pin="IO_L18P_T2_A24_15" pad="N20"/>
+<connect gate="B15" pin="IO_L19N_T3_A21_VREF_15" pad="K14"/>
+<connect gate="B15" pin="IO_L19P_T3_A22_15" pad="K13"/>
+<connect gate="B15" pin="IO_L1N_T0_AD0N_15" pad="G13"/>
+<connect gate="B15" pin="IO_L1P_T0_AD0P_15" pad="H13"/>
+<connect gate="B15" pin="IO_L20N_T3_A19_15" pad="L13"/>
+<connect gate="B15" pin="IO_L20P_T3_A20_15" pad="M13"/>
+<connect gate="B15" pin="IO_L21N_T3_DQS_A18_15" pad="J17"/>
+<connect gate="B15" pin="IO_L21P_T3_DQS_15" pad="K17"/>
+<connect gate="B15" pin="IO_L22N_T3_A16_15" pad="L15"/>
+<connect gate="B15" pin="IO_L22P_T3_A17_15" pad="L14"/>
+<connect gate="B15" pin="IO_L23N_T3_FWE_B_15" pad="K16"/>
+<connect gate="B15" pin="IO_L23P_T3_FOE_B_15" pad="L16"/>
+<connect gate="B15" pin="IO_L24N_T3_RS0_15" pad="M16"/>
+<connect gate="B15" pin="IO_L24P_T3_RS1_15" pad="M15"/>
+<connect gate="B15" pin="IO_L2N_T0_AD8N_15" pad="G16"/>
+<connect gate="B15" pin="IO_L2P_T0_AD8P_15" pad="G15"/>
+<connect gate="B15" pin="IO_L3N_T0_DQS_AD1N_15" pad="H14"/>
+<connect gate="B15" pin="IO_L3P_T0_DQS_AD1P_15" pad="J14"/>
+<connect gate="B15" pin="IO_L4N_T0_15" pad="G18"/>
+<connect gate="B15" pin="IO_L4P_T0_15" pad="G17"/>
+<connect gate="B15" pin="IO_L5N_T0_AD9N_15" pad="H15"/>
+<connect gate="B15" pin="IO_L5P_T0_AD9P_15" pad="J15"/>
+<connect gate="B15" pin="IO_L6N_T0_VREF_15" pad="H18"/>
+<connect gate="B15" pin="IO_L6P_T0_15" pad="H17"/>
+<connect gate="B15" pin="IO_L7N_T1_AD2N_15" pad="H22"/>
+<connect gate="B15" pin="IO_L7P_T1_AD2P_15" pad="J22"/>
+<connect gate="B15" pin="IO_L8N_T1_AD10N_15" pad="G20"/>
+<connect gate="B15" pin="IO_L8P_T1_AD10P_15" pad="H20"/>
+<connect gate="B15" pin="IO_L9N_T1_DQS_AD3N_15" pad="K22"/>
+<connect gate="B15" pin="IO_L9P_T1_DQS_AD3P_15" pad="K21"/>
+<connect gate="B15" pin="VCCO_15 at 0" pad="G19"/>
+<connect gate="B15" pin="VCCO_15 at 1" pad="H16"/>
+<connect gate="B15" pin="VCCO_15 at 2" pad="J13"/>
+<connect gate="B15" pin="VCCO_15 at 3" pad="K20"/>
+<connect gate="B15" pin="VCCO_15 at 4" pad="L17"/>
+<connect gate="B15" pin="VCCO_15 at 5" pad="N21"/>
+<connect gate="B16" pin="IO_0_16" pad="F15"/>
+<connect gate="B16" pin="IO_25_16" pad="F21"/>
+<connect gate="B16" pin="IO_L10N_T1_16" pad="A14"/>
+<connect gate="B16" pin="IO_L10P_T1_16" pad="A13"/>
+<connect gate="B16" pin="IO_L11N_T1_SRCC_16" pad="B18"/>
+<connect gate="B16" pin="IO_L11P_T1_SRCC_16" pad="B17"/>
+<connect gate="B16" pin="IO_L12N_T1_MRCC_16" pad="C17"/>
+<connect gate="B16" pin="IO_L12P_T1_MRCC_16" pad="D17"/>
+<connect gate="B16" pin="IO_L13N_T2_MRCC_16" pad="C19"/>
+<connect gate="B16" pin="IO_L13P_T2_MRCC_16" pad="C18"/>
+<connect gate="B16" pin="IO_L14N_T2_SRCC_16" pad="D19"/>
+<connect gate="B16" pin="IO_L14P_T2_SRCC_16" pad="E19"/>
+<connect gate="B16" pin="IO_L15N_T2_DQS_16" pad="E18"/>
+<connect gate="B16" pin="IO_L15P_T2_DQS_16" pad="F18"/>
+<connect gate="B16" pin="IO_L16N_T2_16" pad="A20"/>
+<connect gate="B16" pin="IO_L16P_T2_16" pad="B20"/>
+<connect gate="B16" pin="IO_L17N_T2_16" pad="A19"/>
+<connect gate="B16" pin="IO_L17P_T2_16" pad="A18"/>
+<connect gate="B16" pin="IO_L18N_T2_16" pad="F20"/>
+<connect gate="B16" pin="IO_L18P_T2_16" pad="F19"/>
+<connect gate="B16" pin="IO_L19N_T3_VREF_16" pad="C20"/>
+<connect gate="B16" pin="IO_L19P_T3_16" pad="D20"/>
+<connect gate="B16" pin="IO_L1N_T0_16" pad="F14"/>
+<connect gate="B16" pin="IO_L1P_T0_16" pad="F13"/>
+<connect gate="B16" pin="IO_L20N_T3_16" pad="B22"/>
+<connect gate="B16" pin="IO_L20P_T3_16" pad="C22"/>
+<connect gate="B16" pin="IO_L21N_T3_DQS_16" pad="A21"/>
+<connect gate="B16" pin="IO_L21P_T3_DQS_16" pad="B21"/>
+<connect gate="B16" pin="IO_L22N_T3_16" pad="D22"/>
+<connect gate="B16" pin="IO_L22P_T3_16" pad="E22"/>
+<connect gate="B16" pin="IO_L23N_T3_16" pad="D21"/>
+<connect gate="B16" pin="IO_L23P_T3_16" pad="E21"/>
+<connect gate="B16" pin="IO_L24N_T3_16" pad="G22"/>
+<connect gate="B16" pin="IO_L24P_T3_16" pad="G21"/>
+<connect gate="B16" pin="IO_L2N_T0_16" pad="E17"/>
+<connect gate="B16" pin="IO_L2P_T0_16" pad="F16"/>
+<connect gate="B16" pin="IO_L3N_T0_DQS_16" pad="C15"/>
+<connect gate="B16" pin="IO_L3P_T0_DQS_16" pad="C14"/>
+<connect gate="B16" pin="IO_L4N_T0_16" pad="E14"/>
+<connect gate="B16" pin="IO_L4P_T0_16" pad="E13"/>
+<connect gate="B16" pin="IO_L5N_T0_16" pad="D16"/>
+<connect gate="B16" pin="IO_L5P_T0_16" pad="E16"/>
+<connect gate="B16" pin="IO_L6N_T0_VREF_16" pad="D15"/>
+<connect gate="B16" pin="IO_L6P_T0_16" pad="D14"/>
+<connect gate="B16" pin="IO_L7N_T1_16" pad="B16"/>
+<connect gate="B16" pin="IO_L7P_T1_16" pad="B15"/>
+<connect gate="B16" pin="IO_L8N_T1_16" pad="B13"/>
+<connect gate="B16" pin="IO_L8P_T1_16" pad="C13"/>
+<connect gate="B16" pin="IO_L9N_T1_DQS_16" pad="A16"/>
+<connect gate="B16" pin="IO_L9P_T1_DQS_16" pad="A15"/>
+<connect gate="B16" pin="VCCO_16 at 0" pad="A17"/>
+<connect gate="B16" pin="VCCO_16 at 1" pad="B14"/>
+<connect gate="B16" pin="VCCO_16 at 2" pad="C21"/>
+<connect gate="B16" pin="VCCO_16 at 3" pad="D18"/>
+<connect gate="B16" pin="VCCO_16 at 4" pad="E15"/>
+<connect gate="B16" pin="VCCO_16 at 5" pad="F22"/>
+<connect gate="B216" pin="MGTPRXN0_216" pad="C11"/>
+<connect gate="B216" pin="MGTPRXN1_216" pad="A10"/>
+<connect gate="B216" pin="MGTPRXN2_216" pad="C9"/>
+<connect gate="B216" pin="MGTPRXN3_216" pad="A8"/>
+<connect gate="B216" pin="MGTPRXP0_216" pad="D11"/>
+<connect gate="B216" pin="MGTPRXP1_216" pad="B10"/>
+<connect gate="B216" pin="MGTPRXP2_216" pad="D9"/>
+<connect gate="B216" pin="MGTPRXP3_216" pad="B8"/>
+<connect gate="B216" pin="MGTPTXN0_216" pad="C7"/>
+<connect gate="B216" pin="MGTPTXN1_216" pad="A6"/>
+<connect gate="B216" pin="MGTPTXN2_216" pad="C5"/>
+<connect gate="B216" pin="MGTPTXN3_216" pad="A4"/>
+<connect gate="B216" pin="MGTPTXP0_216" pad="D7"/>
+<connect gate="B216" pin="MGTPTXP1_216" pad="B6"/>
+<connect gate="B216" pin="MGTPTXP2_216" pad="D5"/>
+<connect gate="B216" pin="MGTPTXP3_216" pad="B4"/>
+<connect gate="B216" pin="MGTREFCLK0N_216" pad="E10"/>
+<connect gate="B216" pin="MGTREFCLK0P_216" pad="F10"/>
+<connect gate="B216" pin="MGTREFCLK1N_216" pad="E6"/>
+<connect gate="B216" pin="MGTREFCLK1P_216" pad="F6"/>
+<connect gate="B216" pin="MGTRREF_216" pad="F8"/>
+<connect gate="B34" pin="IO_0_34" pad="T3"/>
+<connect gate="B34" pin="IO_25_34" pad="U7"/>
+<connect gate="B34" pin="IO_L10N_T1_34" pad="AB5"/>
+<connect gate="B34" pin="IO_L10P_T1_34" pad="AA5"/>
+<connect gate="B34" pin="IO_L11N_T1_SRCC_34" pad="AA4"/>
+<connect gate="B34" pin="IO_L11P_T1_SRCC_34" pad="Y4"/>
+<connect gate="B34" pin="IO_L12N_T1_MRCC_34" pad="W4"/>
+<connect gate="B34" pin="IO_L12P_T1_MRCC_34" pad="V4"/>
+<connect gate="B34" pin="IO_L13N_T2_MRCC_34" pad="T4"/>
+<connect gate="B34" pin="IO_L13P_T2_MRCC_34" pad="R4"/>
+<connect gate="B34" pin="IO_L14N_T2_SRCC_34" pad="U5"/>
+<connect gate="B34" pin="IO_L14P_T2_SRCC_34" pad="T5"/>
+<connect gate="B34" pin="IO_L15N_T2_DQS_34" pad="W5"/>
+<connect gate="B34" pin="IO_L15P_T2_DQS_34" pad="W6"/>
+<connect gate="B34" pin="IO_L16N_T2_34" pad="V5"/>
+<connect gate="B34" pin="IO_L16P_T2_34" pad="U6"/>
+<connect gate="B34" pin="IO_L17N_T2_34" pad="T6"/>
+<connect gate="B34" pin="IO_L17P_T2_34" pad="R6"/>
+<connect gate="B34" pin="IO_L18N_T2_34" pad="AA6"/>
+<connect gate="B34" pin="IO_L18P_T2_34" pad="Y6"/>
+<connect gate="B34" pin="IO_L19N_T3_VREF_34" pad="W7"/>
+<connect gate="B34" pin="IO_L19P_T3_34" pad="V7"/>
+<connect gate="B34" pin="IO_L1N_T0_34" pad="U1"/>
+<connect gate="B34" pin="IO_L1P_T0_34" pad="T1"/>
+<connect gate="B34" pin="IO_L20N_T3_34" pad="AB6"/>
+<connect gate="B34" pin="IO_L20P_T3_34" pad="AB7"/>
+<connect gate="B34" pin="IO_L21N_T3_DQS_34" pad="V8"/>
+<connect gate="B34" pin="IO_L21P_T3_DQS_34" pad="V9"/>
+<connect gate="B34" pin="IO_L22N_T3_34" pad="AB8"/>
+<connect gate="B34" pin="IO_L22P_T3_34" pad="AA8"/>
+<connect gate="B34" pin="IO_L23N_T3_34" pad="Y7"/>
+<connect gate="B34" pin="IO_L23P_T3_34" pad="Y8"/>
+<connect gate="B34" pin="IO_L24N_T3_34" pad="Y9"/>
+<connect gate="B34" pin="IO_L24P_T3_34" pad="W9"/>
+<connect gate="B34" pin="IO_L2N_T0_34" pad="V2"/>
+<connect gate="B34" pin="IO_L2P_T0_34" pad="U2"/>
+<connect gate="B34" pin="IO_L3N_T0_DQS_34" pad="R2"/>
+<connect gate="B34" pin="IO_L3P_T0_DQS_34" pad="R3"/>
+<connect gate="B34" pin="IO_L4N_T0_34" pad="Y2"/>
+<connect gate="B34" pin="IO_L4P_T0_34" pad="W2"/>
+<connect gate="B34" pin="IO_L5N_T0_34" pad="Y1"/>
+<connect gate="B34" pin="IO_L5P_T0_34" pad="W1"/>
+<connect gate="B34" pin="IO_L6N_T0_VREF_34" pad="V3"/>
+<connect gate="B34" pin="IO_L6P_T0_34" pad="U3"/>
+<connect gate="B34" pin="IO_L7N_T1_34" pad="AB1"/>
+<connect gate="B34" pin="IO_L7P_T1_34" pad="AA1"/>
+<connect gate="B34" pin="IO_L8N_T1_34" pad="AB2"/>
+<connect gate="B34" pin="IO_L8P_T1_34" pad="AB3"/>
+<connect gate="B34" pin="IO_L9N_T1_DQS_34" pad="AA3"/>
+<connect gate="B34" pin="IO_L9P_T1_DQS_34" pad="Y3"/>
+<connect gate="B34" pin="VCCO_34 at 0" pad="R5"/>
+<connect gate="B34" pin="VCCO_34 at 1" pad="T2"/>
+<connect gate="B34" pin="VCCO_34 at 2" pad="V6"/>
+<connect gate="B34" pin="VCCO_34 at 3" pad="W3"/>
+<connect gate="B34" pin="VCCO_34 at 4" pad="AA7"/>
+<connect gate="B34" pin="VCCO_34 at 5" pad="AB4"/>
+<connect gate="B35" pin="IO_0_35" pad="F4"/>
+<connect gate="B35" pin="IO_25_35" pad="L6"/>
+<connect gate="B35" pin="IO_L10N_T1_AD15N_35" pad="H5"/>
+<connect gate="B35" pin="IO_L10P_T1_AD15P_35" pad="J5"/>
+<connect gate="B35" pin="IO_L11N_T1_SRCC_35" pad="G3"/>
+<connect gate="B35" pin="IO_L11P_T1_SRCC_35" pad="H3"/>
+<connect gate="B35" pin="IO_L12N_T1_MRCC_35" pad="G4"/>
+<connect gate="B35" pin="IO_L12P_T1_MRCC_35" pad="H4"/>
+<connect gate="B35" pin="IO_L13N_T2_MRCC_35" pad="J4"/>
+<connect gate="B35" pin="IO_L13P_T2_MRCC_35" pad="K4"/>
+<connect gate="B35" pin="IO_L14N_T2_SRCC_35" pad="K3"/>
+<connect gate="B35" pin="IO_L14P_T2_SRCC_35" pad="L3"/>
+<connect gate="B35" pin="IO_L15N_T2_DQS_35" pad="L1"/>
+<connect gate="B35" pin="IO_L15P_T2_DQS_35" pad="M1"/>
+<connect gate="B35" pin="IO_L16N_T2_35" pad="M2"/>
+<connect gate="B35" pin="IO_L16P_T2_35" pad="M3"/>
+<connect gate="B35" pin="IO_L17N_T2_35" pad="J6"/>
+<connect gate="B35" pin="IO_L17P_T2_35" pad="K6"/>
+<connect gate="B35" pin="IO_L18N_T2_35" pad="L4"/>
+<connect gate="B35" pin="IO_L18P_T2_35" pad="L5"/>
+<connect gate="B35" pin="IO_L19N_T3_VREF_35" pad="N3"/>
+<connect gate="B35" pin="IO_L19P_T3_35" pad="N4"/>
+<connect gate="B35" pin="IO_L1N_T0_AD4N_35" pad="A1"/>
+<connect gate="B35" pin="IO_L1P_T0_AD4P_35" pad="B1"/>
+<connect gate="B35" pin="IO_L20N_T3_35" pad="P1"/>
+<connect gate="B35" pin="IO_L20P_T3_35" pad="R1"/>
+<connect gate="B35" pin="IO_L21N_T3_DQS_35" pad="P4"/>
+<connect gate="B35" pin="IO_L21P_T3_DQS_35" pad="P5"/>
+<connect gate="B35" pin="IO_L22N_T3_35" pad="N2"/>
+<connect gate="B35" pin="IO_L22P_T3_35" pad="P2"/>
+<connect gate="B35" pin="IO_L23N_T3_35" pad="M5"/>
+<connect gate="B35" pin="IO_L23P_T3_35" pad="M6"/>
+<connect gate="B35" pin="IO_L24N_T3_35" pad="N5"/>
+<connect gate="B35" pin="IO_L24P_T3_35" pad="P6"/>
+<connect gate="B35" pin="IO_L2N_T0_AD12N_35" pad="B2"/>
+<connect gate="B35" pin="IO_L2P_T0_AD12P_35" pad="C2"/>
+<connect gate="B35" pin="IO_L3N_T0_DQS_AD5N_35" pad="D1"/>
+<connect gate="B35" pin="IO_L3P_T0_DQS_AD5P_35" pad="E1"/>
+<connect gate="B35" pin="IO_L4N_T0_35" pad="D2"/>
+<connect gate="B35" pin="IO_L4P_T0_35" pad="E2"/>
+<connect gate="B35" pin="IO_L5N_T0_AD13N_35" pad="F1"/>
+<connect gate="B35" pin="IO_L5P_T0_AD13P_35" pad="G1"/>
+<connect gate="B35" pin="IO_L6N_T0_VREF_35" pad="E3"/>
+<connect gate="B35" pin="IO_L6P_T0_35" pad="F3"/>
+<connect gate="B35" pin="IO_L7N_T1_AD6N_35" pad="J1"/>
+<connect gate="B35" pin="IO_L7P_T1_AD6P_35" pad="K1"/>
+<connect gate="B35" pin="IO_L8N_T1_AD14N_35" pad="G2"/>
+<connect gate="B35" pin="IO_L8P_T1_AD14P_35" pad="H2"/>
+<connect gate="B35" pin="IO_L9N_T1_DQS_AD7N_35" pad="J2"/>
+<connect gate="B35" pin="IO_L9P_T1_DQS_AD7P_35" pad="K2"/>
+<connect gate="B35" pin="VCCO_35 at 0" pad="C1"/>
+<connect gate="B35" pin="VCCO_35 at 1" pad="F2"/>
+<connect gate="B35" pin="VCCO_35 at 2" pad="H6"/>
+<connect gate="B35" pin="VCCO_35 at 3" pad="J3"/>
+<connect gate="B35" pin="VCCO_35 at 4" pad="M4"/>
+<connect gate="B35" pin="VCCO_35 at 5" pad="N1"/>
+<connect gate="BGNDA" pin="GND at 0" pad="A2"/>
+<connect gate="BGNDA" pin="GND at 1" pad="A3"/>
+<connect gate="BGNDA" pin="GND at 10" pad="B19"/>
+<connect gate="BGNDA" pin="GND at 11" pad="C3"/>
+<connect gate="BGNDA" pin="GND at 12" pad="C6"/>
+<connect gate="BGNDA" pin="GND at 13" pad="C10"/>
+<connect gate="BGNDA" pin="GND at 14" pad="C12"/>
+<connect gate="BGNDA" pin="GND at 15" pad="C16"/>
+<connect gate="BGNDA" pin="GND at 16" pad="D3"/>
+<connect gate="BGNDA" pin="GND at 17" pad="D4"/>
+<connect gate="BGNDA" pin="GND at 18" pad="D8"/>
+<connect gate="BGNDA" pin="GND at 19" pad="D12"/>
+<connect gate="BGNDA" pin="GND at 2" pad="A5"/>
+<connect gate="BGNDA" pin="GND at 20" pad="D13"/>
+<connect gate="BGNDA" pin="GND at 21" pad="E4"/>
+<connect gate="BGNDA" pin="GND at 22" pad="E5"/>
+<connect gate="BGNDA" pin="GND at 23" pad="E7"/>
+<connect gate="BGNDA" pin="GND at 24" pad="E9"/>
+<connect gate="BGNDA" pin="GND at 25" pad="E11"/>
+<connect gate="BGNDA" pin="GND at 26" pad="E20"/>
+<connect gate="BGNDA" pin="GND at 27" pad="F5"/>
+<connect gate="BGNDA" pin="GND at 28" pad="F11"/>
+<connect gate="BGNDA" pin="GND at 29" pad="F17"/>
+<connect gate="BGNDA" pin="GND at 3" pad="A7"/>
+<connect gate="BGNDA" pin="GND at 30" pad="G5"/>
+<connect gate="BGNDA" pin="GND at 31" pad="G6"/>
+<connect gate="BGNDA" pin="GND at 32" pad="G7"/>
+<connect gate="BGNDA" pin="GND at 33" pad="G8"/>
+<connect gate="BGNDA" pin="GND at 34" pad="G9"/>
+<connect gate="BGNDA" pin="GND at 35" pad="G10"/>
+<connect gate="BGNDA" pin="GND at 36" pad="G12"/>
+<connect gate="BGNDA" pin="GND at 37" pad="G14"/>
+<connect gate="BGNDA" pin="GND at 38" pad="H1"/>
+<connect gate="BGNDA" pin="GND at 39" pad="H7"/>
+<connect gate="BGNDA" pin="GND at 4" pad="A9"/>
+<connect gate="BGNDA" pin="GND at 40" pad="H9"/>
+<connect gate="BGNDA" pin="GND at 41" pad="H11"/>
+<connect gate="BGNDA" pin="GND at 42" pad="H21"/>
+<connect gate="BGNDA" pin="GND at 43" pad="J8"/>
+<connect gate="BGNDA" pin="GND at 5" pad="A11"/>
+<connect gate="BGNDA" pin="GND at 6" pad="A12"/>
+<connect gate="BGNDA" pin="GND at 7" pad="A22"/>
+<connect gate="BGNDA" pin="GND at 8" pad="B3"/>
+<connect gate="BGNDA" pin="GND at 9" pad="B12"/>
+<connect gate="BGNDB" pin="GND at 44" pad="J10"/>
+<connect gate="BGNDB" pin="GND at 45" pad="J12"/>
+<connect gate="BGNDB" pin="GND at 46" pad="J18"/>
+<connect gate="BGNDB" pin="GND at 47" pad="K5"/>
+<connect gate="BGNDB" pin="GND at 48" pad="K7"/>
+<connect gate="BGNDB" pin="GND at 49" pad="K11"/>
+<connect gate="BGNDB" pin="GND at 50" pad="K15"/>
+<connect gate="BGNDB" pin="GND at 51" pad="L2"/>
+<connect gate="BGNDB" pin="GND at 52" pad="L8"/>
+<connect gate="BGNDB" pin="GND at 53" pad="L22"/>
+<connect gate="BGNDB" pin="GND at 54" pad="M7"/>
+<connect gate="BGNDB" pin="GND at 55" pad="M11"/>
+<connect gate="BGNDB" pin="GND at 56" pad="M19"/>
+<connect gate="BGNDB" pin="GND at 57" pad="N6"/>
+<connect gate="BGNDB" pin="GND at 58" pad="N8"/>
+<connect gate="BGNDB" pin="GND at 59" pad="N16"/>
+<connect gate="BGNDB" pin="GND at 60" pad="P3"/>
+<connect gate="BGNDB" pin="GND at 61" pad="P7"/>
+<connect gate="BGNDB" pin="GND at 62" pad="P9"/>
+<connect gate="BGNDB" pin="GND at 63" pad="P11"/>
+<connect gate="BGNDB" pin="GND at 64" pad="P13"/>
+<connect gate="BGNDB" pin="GND at 65" pad="R8"/>
+<connect gate="BGNDB" pin="GND at 66" pad="R10"/>
+<connect gate="BGNDB" pin="GND at 67" pad="R12"/>
+<connect gate="BGNDB" pin="GND at 68" pad="R20"/>
+<connect gate="BGNDB" pin="GND at 69" pad="T7"/>
+<connect gate="BGNDB" pin="GND at 70" pad="T9"/>
+<connect gate="BGNDB" pin="GND at 71" pad="T11"/>
+<connect gate="BGNDB" pin="GND at 72" pad="T17"/>
+<connect gate="BGNDB" pin="GND at 73" pad="U4"/>
+<connect gate="BGNDB" pin="GND at 74" pad="U14"/>
+<connect gate="BGNDB" pin="GND at 75" pad="V1"/>
+<connect gate="BGNDB" pin="GND at 76" pad="V11"/>
+<connect gate="BGNDB" pin="GND at 77" pad="V21"/>
+<connect gate="BGNDB" pin="GND at 78" pad="W8"/>
+<connect gate="BGNDB" pin="GND at 79" pad="W18"/>
+<connect gate="BGNDB" pin="GND at 80" pad="Y5"/>
+<connect gate="BGNDB" pin="GND at 81" pad="Y15"/>
+<connect gate="BGNDB" pin="GND at 82" pad="AA2"/>
+<connect gate="BGNDB" pin="GND at 83" pad="AA12"/>
+<connect gate="BGNDB" pin="GND at 84" pad="AA22"/>
+<connect gate="BGNDB" pin="GND at 85" pad="AB9"/>
+<connect gate="BGNDB" pin="GND at 86" pad="AB19"/>
+<connect gate="BMGTAVCC" pin="MGTAVCC at 0" pad="D6"/>
+<connect gate="BMGTAVCC" pin="MGTAVCC at 1" pad="D10"/>
+<connect gate="BMGTAVCC" pin="MGTAVCC at 2" pad="E8"/>
+<connect gate="BMGTAVCC" pin="MGTAVCC at 3" pad="F7"/>
+<connect gate="BMGTAVCC" pin="MGTAVCC at 4" pad="F9"/>
+<connect gate="BMGTAVTT" pin="MGTAVTT at 0" pad="B5"/>
+<connect gate="BMGTAVTT" pin="MGTAVTT at 1" pad="B7"/>
+<connect gate="BMGTAVTT" pin="MGTAVTT at 2" pad="B9"/>
+<connect gate="BMGTAVTT" pin="MGTAVTT at 3" pad="B11"/>
+<connect gate="BMGTAVTT" pin="MGTAVTT at 4" pad="C4"/>
+<connect gate="BMGTAVTT" pin="MGTAVTT at 5" pad="C8"/>
+<connect gate="BTDIODE" pin="DXN_0" pad="N9"/>
+<connect gate="BTDIODE" pin="DXP_0" pad="N10"/>
+<connect gate="BVCCAUX" pin="VCCAUX at 0" pad="H12"/>
+<connect gate="BVCCAUX" pin="VCCAUX at 1" pad="K12"/>
+<connect gate="BVCCAUX" pin="VCCAUX at 2" pad="M12"/>
+<connect gate="BVCCAUX" pin="VCCAUX at 3" pad="P12"/>
+<connect gate="BVCCAUX" pin="VCCAUX at 4" pad="R11"/>
+<connect gate="BVCCBRAM" pin="VCCBRAM at 0" pad="J11"/>
+<connect gate="BVCCBRAM" pin="VCCBRAM at 1" pad="L11"/>
+<connect gate="BVCCBRAM" pin="VCCBRAM at 2" pad="N11"/>
+<connect gate="BVCCINT" pin="VCCINT at 0" pad="H8"/>
+<connect gate="BVCCINT" pin="VCCINT at 1" pad="H10"/>
+<connect gate="BVCCINT" pin="VCCINT at 10" pad="R7"/>
+<connect gate="BVCCINT" pin="VCCINT at 11" pad="R9"/>
+<connect gate="BVCCINT" pin="VCCINT at 12" pad="T8"/>
+<connect gate="BVCCINT" pin="VCCINT at 13" pad="T10"/>
+<connect gate="BVCCINT" pin="VCCINT at 2" pad="J7"/>
+<connect gate="BVCCINT" pin="VCCINT at 3" pad="J9"/>
+<connect gate="BVCCINT" pin="VCCINT at 4" pad="K8"/>
+<connect gate="BVCCINT" pin="VCCINT at 5" pad="L7"/>
+<connect gate="BVCCINT" pin="VCCINT at 6" pad="M8"/>
+<connect gate="BVCCINT" pin="VCCINT at 7" pad="N7"/>
+<connect gate="BVCCINT" pin="VCCINT at 8" pad="P8"/>
+<connect gate="BVCCINT" pin="VCCINT at 9" pad="P10"/>
+<connect gate="BXADC" pin="GNDADC_0" pad="K9"/>
+<connect gate="BXADC" pin="VCCADC_0" pad="K10"/>
+<connect gate="BXADC" pin="VN_0" pad="M9"/>
+<connect gate="BXADC" pin="VP_0" pad="L10"/>
+<connect gate="BXADC" pin="VREFN_0" pad="L9"/>
+<connect gate="BXADC" pin="VREFP_0" pad="M10"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="altera-configdevices">
+<packages>
+<package name="SO08">
+<description><b>Small Outline Package</b></description>
+<wire x1="2.159" y1="1.9558" x2="-2.159" y2="1.9558" width="0.1524" layer="21"/>
+<wire x1="2.159" y1="-1.9558" x2="2.54" y2="-1.5748" width="0.1524" layer="21" curve="90"/>
+<wire x1="-2.54" y1="1.5748" x2="-2.159" y2="1.9558" width="0.1524" layer="21" curve="-90"/>
+<wire x1="2.159" y1="1.9558" x2="2.54" y2="1.5748" width="0.1524" layer="21" curve="-90"/>
+<wire x1="-2.54" y1="-1.5748" x2="-2.159" y2="-1.9558" width="0.1524" layer="21" curve="90"/>
+<wire x1="-2.159" y1="-1.9558" x2="2.159" y2="-1.9558" width="0.1524" layer="21"/>
+<wire x1="2.54" y1="-1.5748" x2="2.54" y2="1.5748" width="0.1524" layer="21"/>
+<wire x1="-2.54" y1="1.5748" x2="-2.54" y2="-1.5748" width="0.1524" layer="21"/>
+<wire x1="-2.54" y1="0.508" x2="-2.54" y2="-0.508" width="0.1524" layer="21" curve="-180"/>
+<wire x1="-2.54" y1="-1.6002" x2="2.54" y2="-1.6002" width="0.0508" layer="21"/>
+<smd name="1" x="-1.905" y="-3.0734" dx="0.6604" dy="2.032" layer="1"/>
+<smd name="8" x="-1.905" y="3.0734" dx="0.6604" dy="2.032" layer="1"/>
+<smd name="2" x="-0.635" y="-3.0734" dx="0.6604" dy="2.032" layer="1"/>
+<smd name="3" x="0.635" y="-3.0734" dx="0.6604" dy="2.032" layer="1"/>
+<smd name="7" x="-0.635" y="3.0734" dx="0.6604" dy="2.032" layer="1"/>
+<smd name="6" x="0.635" y="3.0734" dx="0.6604" dy="2.032" layer="1"/>
+<smd name="4" x="1.905" y="-3.0734" dx="0.6604" dy="2.032" layer="1"/>
+<smd name="5" x="1.905" y="3.0734" dx="0.6604" dy="2.032" layer="1"/>
+<text x="3.937" y="-2.032" size="1.27" layer="27" ratio="10" rot="R90">>VALUE</text>
+<text x="-2.921" y="-1.905" size="1.27" layer="25" ratio="10" rot="R90">>NAME</text>
+<rectangle x1="1.651" y1="1.9558" x2="2.159" y2="3.0988" layer="51"/>
+<rectangle x1="-2.159" y1="-3.0988" x2="-1.651" y2="-1.9558" layer="51"/>
+<rectangle x1="-0.889" y1="-3.0988" x2="-0.381" y2="-1.9558" layer="51"/>
+<rectangle x1="0.381" y1="-3.0734" x2="0.889" y2="-1.9304" layer="51"/>
+<rectangle x1="1.651" y1="-3.0988" x2="2.159" y2="-1.9558" layer="51"/>
+<rectangle x1="0.381" y1="1.9558" x2="0.889" y2="3.0988" layer="51"/>
+<rectangle x1="-0.889" y1="1.9558" x2="-0.381" y2="3.0988" layer="51"/>
+<rectangle x1="-2.159" y1="1.9558" x2="-1.651" y2="3.0988" layer="51"/>
 </package>
-<package name="HC18U-H">
-<description><b>CRYSTAL</b></description>
-<wire x1="5.461" y1="-3.175" x2="5.08" y2="-3.175" width="0.8128" layer="21"/>
-<wire x1="5.08" y1="-3.175" x2="-5.08" y2="-3.175" width="0.8128" layer="21"/>
-<wire x1="-5.08" y1="-3.175" x2="-5.461" y2="-3.175" width="0.8128" layer="21"/>
-<wire x1="4.445" y1="10.16" x2="-4.445" y2="10.16" width="0.1524" layer="21"/>
-<wire x1="4.445" y1="10.16" x2="5.08" y2="9.525" width="0.1524" layer="21" curve="-90"/>
-<wire x1="-5.08" y1="9.525" x2="-4.445" y2="10.16" width="0.1524" layer="21" curve="-90"/>
-<wire x1="-4.572" y1="3.81" x2="4.572" y2="3.81" width="0.6096" layer="21"/>
-<wire x1="-0.3302" y1="8.255" x2="-0.3302" y2="5.715" width="0.3048" layer="21"/>
-<wire x1="-0.3302" y1="5.715" x2="0.3048" y2="5.715" width="0.3048" layer="21"/>
-<wire x1="0.3048" y1="5.715" x2="0.3048" y2="8.255" width="0.3048" layer="21"/>
-<wire x1="0.3048" y1="8.255" x2="-0.3302" y2="8.255" width="0.3048" layer="21"/>
-<wire x1="0.9398" y1="8.255" x2="0.9398" y2="6.985" width="0.3048" layer="21"/>
-<wire x1="-0.9398" y1="8.255" x2="-0.9398" y2="6.985" width="0.3048" layer="21"/>
-<wire x1="0.9398" y1="6.985" x2="2.54" y2="6.985" width="0.1524" layer="21"/>
-<wire x1="0.9398" y1="6.985" x2="0.9398" y2="5.715" width="0.3048" layer="21"/>
-<wire x1="-0.9398" y1="6.985" x2="-2.54" y2="6.985" width="0.1524" layer="21"/>
-<wire x1="-0.9398" y1="6.985" x2="-0.9398" y2="5.715" width="0.3048" layer="21"/>
-<wire x1="-2.54" y1="-3.302" x2="-2.54" y2="-5.08" width="0.6096" layer="51"/>
-<wire x1="2.54" y1="-3.302" x2="2.54" y2="-5.08" width="0.6096" layer="51"/>
-<wire x1="5.08" y1="3.048" x2="5.08" y2="-3.175" width="0.1524" layer="21"/>
-<wire x1="5.08" y1="4.572" x2="5.08" y2="9.525" width="0.1524" layer="21"/>
-<wire x1="4.572" y1="3.81" x2="5.08" y2="3.81" width="0.6096" layer="51"/>
-<wire x1="5.08" y1="3.81" x2="5.715" y2="3.81" width="0.6096" layer="51"/>
-<wire x1="5.08" y1="3.81" x2="5.08" y2="3.048" width="0.1524" layer="51"/>
-<wire x1="5.08" y1="3.81" x2="5.08" y2="4.572" width="0.1524" layer="51"/>
-<wire x1="-5.08" y1="3.175" x2="-5.08" y2="-3.175" width="0.1524" layer="21"/>
-<wire x1="-5.08" y1="4.445" x2="-5.08" y2="9.525" width="0.1524" layer="21"/>
-<wire x1="-4.699" y1="3.81" x2="-5.715" y2="3.81" width="0.6096" layer="51"/>
-<wire x1="-5.08" y1="4.445" x2="-5.08" y2="3.175" width="0.1524" layer="51"/>
-<pad name="1" x="-2.54" y="-5.08" drill="0.8128"/>
-<pad name="2" x="2.54" y="-5.08" drill="0.8128"/>
-<pad name="M" x="-5.715" y="3.81" drill="0.8128"/>
-<pad name="M1" x="5.715" y="3.81" drill="0.8128"/>
-<text x="-5.08" y="10.668" size="1.27" layer="25" ratio="10">>NAME</text>
-<text x="-4.445" y="-0.889" size="1.27" layer="27" ratio="10">>VALUE</text>
-<rectangle x1="-6.35" y1="-5.08" x2="6.35" y2="10.795" layer="43"/>
+<package name="DFN-S">
+<description><b>8-Lead Plastic Dual Flat No Lead Package (MF)</b> 6x5 mm Body (DFN-S)<p>
+Source: http://www.microchip.com .. 41190c.pdf</description>
+<wire x1="-2.94" y1="2.41" x2="2.94" y2="2.41" width="0.1016" layer="21"/>
+<wire x1="2.94" y1="2.41" x2="2.94" y2="2.26" width="0.1016" layer="21"/>
+<wire x1="-2.94" y1="2.41" x2="-2.94" y2="2.26" width="0.1016" layer="21"/>
+<wire x1="2.94" y1="-2.41" x2="-2.94" y2="-2.41" width="0.1016" layer="21"/>
+<wire x1="-2.94" y1="-2.41" x2="-2.94" y2="-2.26" width="0.1016" layer="21"/>
+<wire x1="2.94" y1="-2.41" x2="2.94" y2="-2.26" width="0.1016" layer="21"/>
+<wire x1="-2.94" y1="2.41" x2="-2.94" y2="-2.41" width="0.1016" layer="51"/>
+<wire x1="2.94" y1="-2.41" x2="2.94" y2="2.41" width="0.1016" layer="51"/>
+<circle x="-2.02" y="1.78" radius="0.22" width="0.1016" layer="21"/>
+<smd name="1" x="-2.69" y="1.905" dx="0.4" dy="0.6" layer="1" rot="R90"/>
+<smd name="2" x="-2.69" y="0.635" dx="0.4" dy="0.6" layer="1" rot="R90"/>
+<smd name="3" x="-2.69" y="-0.635" dx="0.4" dy="0.6" layer="1" rot="R90"/>
+<smd name="4" x="-2.69" y="-1.905" dx="0.4" dy="0.6" layer="1" rot="R90"/>
+<smd name="5" x="2.69" y="-1.905" dx="0.4" dy="0.6" layer="1" rot="R270"/>
+<smd name="6" x="2.69" y="-0.635" dx="0.4" dy="0.6" layer="1" rot="R270"/>
+<smd name="7" x="2.69" y="0.635" dx="0.4" dy="0.6" layer="1" rot="R270"/>
+<smd name="8" x="2.69" y="1.905" dx="0.4" dy="0.6" layer="1" rot="R270"/>
+<text x="-2.54" y="3.175" size="1.27" layer="25">>NAME</text>
+<text x="-2.54" y="-4.445" size="1.27" layer="27">>VALUE</text>
 </package>
-<package name="HC18U-V">
-<description><b>CRYSTAL</b></description>
-<wire x1="5.08" y1="-1.905" x2="5.08" y2="1.905" width="0.4064" layer="21"/>
-<wire x1="-5.08" y1="1.905" x2="-5.08" y2="-1.905" width="0.4064" layer="21"/>
-<wire x1="-4.445" y1="2.54" x2="4.445" y2="2.54" width="0.4064" layer="21"/>
-<wire x1="-4.445" y1="-2.54" x2="4.445" y2="-2.54" width="0.4064" layer="21"/>
-<wire x1="4.445" y1="-2.54" x2="5.08" y2="-1.905" width="0.4064" layer="21" curve="90"/>
-<wire x1="4.445" y1="2.54" x2="5.08" y2="1.905" width="0.4064" layer="21" curve="-90"/>
-<wire x1="-5.08" y1="1.905" x2="-4.445" y2="2.54" width="0.4064" layer="21" curve="-90"/>
-<wire x1="-5.08" y1="-1.905" x2="-4.445" y2="-2.54" width="0.4064" layer="21" curve="90"/>
-<wire x1="-4.318" y1="-1.905" x2="4.318" y2="-1.905" width="0.1524" layer="21"/>
-<wire x1="4.318" y1="-1.905" x2="4.445" y2="-1.778" width="0.1524" layer="21"/>
-<wire x1="4.445" y1="-1.778" x2="4.445" y2="1.778" width="0.1524" layer="21"/>
-<wire x1="4.318" y1="1.905" x2="4.445" y2="1.778" width="0.1524" layer="21"/>
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+</packages>
+<symbols>
+<symbol name="ALTERA_EPCQ">
+<pin name="!S" x="-17.78" y="6.35" length="middle"/>
+<pin name="DQ1" x="-17.78" y="3.81" length="middle"/>
+<pin name="!W!/VPP/DQ2" x="-17.78" y="1.27" length="middle"/>
+<pin name="VSS" x="-17.78" y="-1.27" length="middle"/>
+<pin name="VCC" x="19.05" y="6.35" length="middle" rot="R180"/>
+<pin name="!HOLD!/DQ3" x="19.05" y="3.81" length="middle" rot="R180"/>
+<pin name="C" x="19.05" y="1.27" length="middle" rot="R180"/>
+<pin name="DQ0" x="19.05" y="-1.27" length="middle" rot="R180"/>
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+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="N25Q128A13E" prefix="IC">
+<gates>
+<gate name="A" symbol="ALTERA_EPCQ" x="0" y="-6.35"/>
+</gates>
+<devices>
+<device name="S" package="SO08">
+<connects>
+<connect gate="A" pin="!HOLD!/DQ3" pad="7"/>
+<connect gate="A" pin="!S" pad="1"/>
+<connect gate="A" pin="!W!/VPP/DQ2" pad="3"/>
+<connect gate="A" pin="C" pad="6"/>
+<connect gate="A" pin="DQ0" pad="5"/>
+<connect gate="A" pin="DQ1" pad="2"/>
+<connect gate="A" pin="VCC" pad="8"/>
+<connect gate="A" pin="VSS" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="OC_DIGIKEY" value="557-1562-ND"/>
+<attribute name="OC_FARNELL" value="2253682"/>
+<attribute name="PRICE100_DIGIKEY" value="1.30470" constant="no"/>
+<attribute name="PRICE100_FARNELL" value="5.10" constant="no"/>
+</technology>
+</technologies>
+</device>
+<device name="F7" package="DFN-S">
+<connects>
+<connect gate="A" pin="!HOLD!/DQ3" pad="7"/>
+<connect gate="A" pin="!S" pad="1"/>
+<connect gate="A" pin="!W!/VPP/DQ2" pad="3"/>
+<connect gate="A" pin="C" pad="6"/>
+<connect gate="A" pin="DQ0" pad="5"/>
+<connect gate="A" pin="DQ1" pad="2"/>
+<connect gate="A" pin="VCC" pad="8"/>
+<connect gate="A" pin="VSS" pad="4"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="OC_DIGIKEY" value="N25Q128A13EF740F TR-ND"/>
+<attribute name="PRICE100_DIGIKEY" value="" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="transistors_gaui">
+<description><b>2N7002T; N-channel TrenchMOS FET</b><p>
+Produced by Philips. All information is found at:<br>
+http://www.semiconductors.philips.com/pip/2N7002T.html<br>
+</p>
+<author>Created by gudjon at mc2.chalmers.se</author></description>
+<packages>
+<package name="SOT23">
+<description><b>SOT-23</b></description>
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+<symbols>
+<symbol name="IGFET-EN-GDS">
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+<text x="-11.43" y="2.54" size="1.778" layer="95">>NAME</text>
+<pin name="D" x="5.08" y="2.54" visible="off" length="middle" direction="pas" rot="R180"/>
+<pin name="S" x="5.08" y="-2.54" visible="off" length="middle" direction="pas" rot="R180"/>
+<pin name="G" x="-5.08" y="-2.54" visible="off" length="short" direction="pas"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="2N7002" prefix="Q">
+<gates>
+<gate name="G$1" symbol="IGFET-EN-GDS" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="SOT23">
+<connects>
+<connect gate="G$1" pin="D" pad="3"/>
+<connect gate="G$1" pin="G" pad="1"/>
+<connect gate="G$1" pin="S" pad="2"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="led">
+<description><b>LEDs</b><p>
+<author>Created by librarian at cadsoft.de</author><br>
+Extended by Federico Battaglin <author>&lt;federico.rd at fdpinternational.com&gt;</author> with DUOLED</description>
+<packages>
+<package name="1206">
+<description><b>CHICAGO MINIATURE LAMP, INC.</b><p>
+7022X Series SMT LEDs 1206 Package Size</description>
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+<package name="LD260">
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+<tr><td>SML10OY3KH-TR</td><td>ULTRA YELLOW</td></tr>
+<tr><td>SML10AG3KH-TR</td><td>AQUA GREEN</td></tr>
+<tr><td>SML10BG3KH-TR</td><td>BLUE GREEN</td></tr>
+<tr><td>SML10PB1KH-TR</td><td>SUPER BLUE</td></tr>
+<tr><td>SML10CW1KH-TR</td><td>WHITE</td></tr>
+</table>
+
+Source: http://www.ledtronics.com/ds/smd-1206/dstr0094.PDF</description>
+<wire x1="-1.5" y1="0.5" x2="-1.5" y2="-0.5" width="0.2032" layer="51" curve="-180"/>
+<wire x1="1.5" y1="-0.5" x2="1.5" y2="0.5" width="0.2032" layer="51" curve="-180"/>
+<wire x1="-1.55" y1="0.75" x2="1.55" y2="0.75" width="0.1016" layer="51"/>
+<wire x1="1.55" y1="-0.75" x2="-1.55" y2="-0.75" width="0.1016" layer="51"/>
+<circle x="-0.725" y="0.525" radius="0.125" width="0" layer="21"/>
+<smd name="C" x="-1.75" y="0" dx="1.5" dy="1.5" layer="1"/>
+<smd name="A" x="1.75" y="0" dx="1.5" dy="1.5" layer="1"/>
+<text x="-1.5" y="1" size="1.27" layer="25">>NAME</text>
+<text x="-1.5" y="-2.5" size="1.27" layer="27">>VALUE</text>
+<rectangle x1="-1.6" y1="0.4" x2="-1.15" y2="0.8" layer="51"/>
+<rectangle x1="-1.6" y1="-0.8" x2="-1.15" y2="-0.4" layer="51"/>
+<rectangle x1="-1.175" y1="-0.6" x2="-1" y2="-0.275" layer="51"/>
+<rectangle x1="1.15" y1="-0.8" x2="1.6" y2="-0.4" layer="51" rot="R180"/>
+<rectangle x1="1.15" y1="0.4" x2="1.6" y2="0.8" layer="51" rot="R180"/>
+<rectangle x1="1" y1="0.275" x2="1.175" y2="0.6" layer="51" rot="R180"/>
+<rectangle x1="-0.1" y1="-0.1" x2="0.1" y2="0.1" layer="21"/>
+</package>
+<package name="SML0603">
+<description><b>SML0603-XXX (HIGH INTENSITY) LED</b><p>
+<table>
+<tr><td>AG3K</td><td>AQUA GREEN</td></tr>
+<tr><td>B1K</td><td>SUPER BLUE</td></tr>
+<tr><td>R1K</td><td>SUPER RED</td></tr>
+<tr><td>R3K</td><td>ULTRA RED</td></tr>
+<tr><td>O3K</td><td>SUPER ORANGE</td></tr>
+<tr><td>O3KH</td><td>SOFT ORANGE</td></tr>
+<tr><td>Y3KH</td><td>SUPER YELLOW</td></tr>
+<tr><td>Y3K</td><td>SUPER YELLOW</td></tr>
+<tr><td>2CW</td><td>WHITE</td></tr>
+</table>
+Source: http://www.ledtronics.com/ds/smd-0603/Dstr0092.pdf</description>
+<wire x1="-0.75" y1="0.35" x2="0.75" y2="0.35" width="0.1016" layer="51"/>
+<wire x1="0.75" y1="0.35" x2="0.75" y2="-0.35" width="0.1016" layer="51"/>
+<wire x1="0.75" y1="-0.35" x2="-0.75" y2="-0.35" width="0.1016" layer="51"/>
+<wire x1="-0.75" y1="-0.35" x2="-0.75" y2="0.35" width="0.1016" layer="51"/>
+<wire x1="-0.45" y1="0.3" x2="-0.45" y2="-0.3" width="0.1016" layer="51"/>
+<wire x1="0.45" y1="0.3" x2="0.45" y2="-0.3" width="0.1016" layer="51"/>
+<wire x1="-0.2" y1="0.35" x2="0.2" y2="0.35" width="0.1016" layer="21"/>
+<wire x1="-0.2" y1="-0.35" x2="0.2" y2="-0.35" width="0.1016" layer="21"/>
+<smd name="C" x="-0.75" y="0" dx="0.8" dy="0.8" layer="1"/>
+<smd name="A" x="0.75" y="0" dx="0.8" dy="0.8" layer="1"/>
+<text x="-1" y="1" size="1.27" layer="25">>NAME</text>
+<text x="-1" y="-2" size="1.27" layer="27">>VALUE</text>
+<rectangle x1="-0.4" y1="0.175" x2="0" y2="0.4" layer="51"/>
+<rectangle x1="-0.25" y1="0.175" x2="0" y2="0.4" layer="21"/>
+</package>
+</packages>
+<symbols>
+<symbol name="LED">
+<wire x1="1.27" y1="0" x2="0" y2="-2.54" width="0.254" layer="94"/>
+<wire x1="0" y1="-2.54" x2="-1.27" y2="0" width="0.254" layer="94"/>
+<wire x1="1.27" y1="-2.54" x2="0" y2="-2.54" width="0.254" layer="94"/>
+<wire x1="0" y1="-2.54" x2="-1.27" y2="-2.54" width="0.254" layer="94"/>
+<wire x1="1.27" y1="0" x2="0" y2="0" width="0.254" layer="94"/>
+<wire x1="0" y1="0" x2="-1.27" y2="0" width="0.254" layer="94"/>
+<wire x1="0" y1="0" x2="0" y2="-2.54" width="0.1524" layer="94"/>
+<wire x1="-2.032" y1="-0.762" x2="-3.429" y2="-2.159" width="0.1524" layer="94"/>
+<wire x1="-1.905" y1="-1.905" x2="-3.302" y2="-3.302" width="0.1524" layer="94"/>
+<text x="3.556" y="-4.572" size="1.778" layer="95" rot="R90">>NAME</text>
+<text x="5.715" y="-4.572" size="1.778" layer="96" rot="R90">>VALUE</text>
+<pin name="C" x="0" y="-5.08" visible="off" length="short" direction="pas" rot="R90"/>
+<pin name="A" x="0" y="2.54" visible="off" length="short" direction="pas" rot="R270"/>
+<polygon width="0.1524" layer="94">
+<vertex x="-3.429" y="-2.159"/>
+<vertex x="-3.048" y="-1.27"/>
+<vertex x="-2.54" y="-1.778"/>
+</polygon>
+<polygon width="0.1524" layer="94">
+<vertex x="-3.302" y="-3.302"/>
+<vertex x="-2.921" y="-2.413"/>
+<vertex x="-2.413" y="-2.921"/>
+</polygon>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="LED" prefix="LED" uservalue="yes">
+<description><b>LED</b><p>
+<u>OSRAM</u>:<br>
+
+- <u>CHIPLED</u><br>
+LG R971, LG N971, LY N971, LG Q971, LY Q971, LO R971, LY R971
+LH N974, LH R974<br>
+LS Q976, LO Q976, LY Q976<br>
+LO Q996<br>
+
+- <u>Hyper CHIPLED</u><br>
+LW Q18S<br>
+LB Q993, LB Q99A, LB R99A<br>
+
+- <u>SideLED</u><br>
+LS A670, LO A670, LY A670, LG A670, LP A670<br>
+LB A673, LV A673, LT A673, LW A673<br>
+LH A674<br>
+LY A675<br>
+LS A676, LA A676, LO A676, LY A676, LW A676<br>
+LS A679, LY A679, LG A679<br>
+
+-  <u>Hyper Micro SIDELED®</u><br>
+LS Y876, LA Y876, LO Y876, LY Y876<br>
+LT Y87S<br>
+
+- <u>SmartLED</u><br>
+LW L88C, LW L88S<br>
+LB L89C, LB L89S, LG L890<br>
+LS L89K, LO L89K, LY L89K<br>
+LS L896, LA L896, LO L896, LY L896<br>
+
+- <u>TOPLED</u><br>
+LS T670, LO T670, LY T670, LG T670, LP T670<br>
+LSG T670, LSP T670, LSY T670, LOP T670, LYG T670<br>
+LG T671, LOG T671, LSG T671<br>
+LB T673, LV T673, LT T673, LW T673<br>
+LH T674<br>
+LS T676, LA T676, LO T676, LY T676, LB T676, LH T676, LSB T676, LW T676<br>
+LB T67C, LV T67C, LT T67C, LS T67K, LO T67K, LY T67K, LW E67C<br>
+LS E67B, LA E67B, LO E67B, LY E67B, LB E67C, LV E67C, LT E67C<br>
+LW T67C<br>
+LS T679, LY T679, LG T679<br>
+LS T770, LO T770, LY T770, LG T770, LP T770<br>
+LB T773, LV T773, LT T773, LW T773<br>
+LH T774<br>
+LS E675, LA E675, LY E675, LS T675<br>
+LS T776, LA T776, LO T776, LY T776, LB T776<br>
+LHGB T686<br>
+LT T68C, LB T68C<br>
+
+- <u>Hyper Mini TOPLED®</u><br>
+LB M676<br>
+
+- <u>Mini TOPLED Santana®</u><br>
+LG M470<br>
+LS M47K, LO M47K, LY M47K
+<p>
+Source: http://www.osram.convergy.de<p>
+
+<u>LUXEON:</u><br>
+- <u>LUMILED®</u><br>
+LXK2-PW12-R00, LXK2-PW12-S00, LXK2-PW14-U00, LXK2-PW14-V00<br>
+LXK2-PM12-R00, LXK2-PM12-S00, LXK2-PM14-U00<br>
+LXK2-PE12-Q00, LXK2-PE12-R00, LXK2-PE12-S00, LXK2-PE14-T00, LXK2-PE14-U00<br>
+LXK2-PB12-K00, LXK2-PB12-L00, LXK2-PB12-M00, LXK2-PB14-N00, LXK2-PB14-P00, LXK2-PB14-Q00<br>
+LXK2-PR12-L00, LXK2-PR12-M00, LXK2-PR14-Q00, LXK2-PR14-R00<br>
+LXK2-PD12-Q00, LXK2-PD12-R00, LXK2-PD12-S00<br>
+LXK2-PH12-R00, LXK2-PH12-S00<br>
+LXK2-PL12-P00, LXK2-PL12-Q00, LXK2-PL12-R00
+<p>
+Source: www.luxeon.com<p>
+
+<u>KINGBRIGHT:</U><p>
+KA-3528ASYC<br>
+Source: www.kingbright.com</description>
+<gates>
+<gate name="G$1" symbol="LED" x="0" y="0"/>
+</gates>
+<devices>
+<device name="SMT1206" package="1206">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="LD260" package="LD260">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SQR2X5" package="LED2X5">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="3MM" package="LED3MM">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="5MM" package="LED5MM">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="LSU260" package="LSU260">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="LZR181" package="LZR181">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B152" package="Q62902-B152">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B153" package="Q62902-B153">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B155" package="Q62902-B155">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="B156" package="Q62902-B156">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SFH480" package="SFH480">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SFH482" package="SFH482">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SQR5.7X3.2" package="U57X32">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="IRL80A" package="IRL80A">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="P-LCC-2" package="P-LCC-2">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="MINI-TOP" package="OSRAM-MINI-TOP-LED">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SIDELED" package="OSRAM-SIDELED">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SMART-LED" package="SMART-LED">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="B"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="P-LCC-2-BACK" package="P-LCC-2-TOPLED-RG">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="MICRO-SIDELED" package="MICRO-SIDELED">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="P-LCC-4" package="P-LCC-4">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C at 4"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CHIP-LED0603" package="CHIP-LED0603">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CHIP-LED0805" package="CHIP-LED0805">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="TOPLED-SANTANA" package="MINI-TOPLED-SANTANA">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CHIPLED_0805" package="CHIPLED_0805">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CHIPLED_1206" package="CHIPLED_1206">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CHIPLED_0603" package="CHIPLED_0603">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="CHIPLED-0603-TTW" package="CHIPLED-0603-TTW">
+<connects>
+<connect gate="G$1" pin="A" pad="A at 1"/>
+<connect gate="G$1" pin="C" pad="C at 1"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="" package="SMARTLED-TTW">
+<connects>
+<connect gate="G$1" pin="A" pad="A at 1"/>
+<connect gate="G$1" pin="C" pad="C at 1"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="-LUMILED+" package="LUMILED+">
+<connects>
+<connect gate="G$1" pin="A" pad="2+"/>
+<connect gate="G$1" pin="C" pad="4-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="-LUMILED" package="LUMILED">
+<connects>
+<connect gate="G$1" pin="A" pad="2+"/>
+<connect gate="G$1" pin="C" pad="4-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="10MM" package="LED10MM">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="K"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="KA-3528ASYC" package="KA-3528ASYC">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SML0805" package="SML0805">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SML1206" package="SML1206">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SML0603" package="SML0603">
+<connects>
+<connect gate="G$1" pin="A" pad="A"/>
+<connect gate="G$1" pin="C" pad="C"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="con-lstb">
+<description><b>Pin Headers</b><p>
+Naming:<p>
+MA = male<p>
+# contacts - # rows<p>
+W = angled<p>
+<author>Created by librarian at cadsoft.de</author></description>
+<packages>
+<package name="MA08-2">
+<description><b>PIN HEADER</b></description>
+<wire x1="-9.525" y1="2.54" x2="-8.255" y2="2.54" width="0.1524" layer="21"/>
+<wire x1="-8.255" y1="2.54" x2="-7.62" y2="1.905" width="0.1524" layer="21"/>
+<wire x1="-7.62" y1="1.905" x2="-6.985" y2="2.54" width="0.1524" layer="21"/>
+<wire x1="-6.985" y1="2.54" x2="-5.715" y2="2.54" width="0.1524" layer="21"/>
+<wire x1="-5.715" y1="2.54" x2="-5.08" y2="1.905" width="0.1524" layer="21"/>
+<wire x1="-9.525" y1="2.54" x2="-10.16" y2="1.905" width="0.1524" layer="21"/>
+<wire x1="-5.08" y1="1.905" x2="-4.445" y2="2.54" width="0.1524" layer="21"/>
+<wire x1="-4.445" y1="2.54" x2="-3.175" y2="2.54" width="0.1524" layer="21"/>
+<wire x1="-3.175" y1="2.54" x2="-2.54" y2="1.905" width="0.1524" layer="21"/>
+<wire x1="-1.905" y1="2.54" x2="-0.635" y2="2.54" width="0.1524" layer="21"/>
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+<gates>
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+</gates>
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+<connect gate="G$1" pin="12" pad="12"/>
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+<connect gate="G$1" pin="5" pad="5"/>
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+<connect gate="G$1" pin="8" pad="8"/>
+<connect gate="G$1" pin="9" pad="9"/>
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+<technologies>
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+<attribute name="OC_NEWARK" value="unknown" constant="no"/>
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+<description><b>PIN HEADER</b></description>
+<gates>
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+<connect gate="1" pin="3" pad="3"/>
+<connect gate="1" pin="4" pad="4"/>
+<connect gate="1" pin="5" pad="5"/>
+<connect gate="1" pin="6" pad="6"/>
+<connect gate="1" pin="7" pad="7"/>
+<connect gate="1" pin="8" pad="8"/>
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+</technology>
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+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
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-<wire x1="5.842" y1="-1.651" x2="5.842" y2="1.651" width="0.0508" layer="21"/>
-<wire x1="5.842" y1="-1.651" x2="6.223" y2="-2.286" width="0.0508" layer="21"/>
-<wire x1="5.715" y1="-2.286" x2="6.223" y2="-2.286" width="0.1524" layer="21"/>
-<wire x1="3.683" y1="-2.286" x2="5.715" y2="-2.286" width="0.1524" layer="51"/>
-<wire x1="5.715" y1="-1.651" x2="5.842" y2="-1.651" width="0.0508" layer="21"/>
-<wire x1="3.683" y1="-1.651" x2="5.715" y2="-1.651" width="0.0508" layer="51"/>
-<wire x1="5.842" y1="1.651" x2="6.223" y2="2.286" width="0.0508" layer="21"/>
-<wire x1="5.842" y1="1.651" x2="5.715" y2="1.651" width="0.0508" layer="21"/>
-<wire x1="5.715" y1="2.286" x2="6.223" y2="2.286" width="0.1524" layer="21"/>
-<wire x1="3.683" y1="2.286" x2="5.715" y2="2.286" width="0.1524" layer="51"/>
-<wire x1="5.715" y1="1.651" x2="3.683" y2="1.651" width="0.0508" layer="51"/>
-<wire x1="-3.81" y1="-0.254" x2="-2.54" y2="-0.254" width="0.1524" layer="21"/>
-<wire x1="-2.54" y1="-0.254" x2="-2.54" y2="0.254" width="0.1524" layer="21"/>
-<wire x1="-2.54" y1="0.254" x2="-3.81" y2="0.254" width="0.1524" layer="21"/>
-<wire x1="-3.81" y1="0.254" x2="-3.81" y2="-0.254" width="0.1524" layer="21"/>
-<wire x1="-3.81" y1="0.635" x2="-3.175" y2="0.635" width="0.1524" layer="21"/>
-<wire x1="-3.175" y1="0.635" x2="-2.54" y2="0.635" width="0.1524" layer="21"/>
-<wire x1="-3.175" y1="0.635" x2="-3.175" y2="1.016" width="0.1016" layer="21"/>
-<wire x1="-3.81" y1="-0.635" x2="-3.175" y2="-0.635" width="0.1524" layer="21"/>
-<wire x1="-3.175" y1="-0.635" x2="-2.54" y2="-0.635" width="0.1524" layer="21"/>
-<wire x1="-3.175" y1="-0.635" x2="-3.175" y2="-1.016" width="0.1016" layer="21"/>
-<circle x="5.08" y="0" radius="0.254" width="0.1524" layer="21"/>
-<smd name="1" x="-4.699" y="-1.778" dx="1.778" dy="1.778" layer="1"/>
-<smd name="2" x="4.699" y="-1.778" dx="1.778" dy="1.778" layer="1"/>
-<smd name="3" x="4.699" y="1.778" dx="1.778" dy="1.778" layer="1"/>
-<smd name="4" x="-4.699" y="1.778" dx="1.778" dy="1.778" layer="1"/>
-<text x="-2.54" y="2.54" size="1.27" layer="25" ratio="10">>NAME</text>
-<text x="-2.032" y="-0.635" size="1.27" layer="27" ratio="10">>VALUE</text>
+</packages>
+<symbols>
+<symbol name="EN6337QI">
+<wire x1="-15.24" y1="22.86" x2="15.24" y2="22.86" width="0.254" layer="94"/>
+<wire x1="15.24" y1="22.86" x2="15.24" y2="-22.86" width="0.254" layer="94"/>
+<wire x1="15.24" y1="-22.86" x2="-15.24" y2="-22.86" width="0.254" layer="94"/>
+<wire x1="-15.24" y1="-22.86" x2="-15.24" y2="22.86" width="0.254" layer="94"/>
+<pin name="PVIN" x="-20.32" y="17.78" visible="pin" length="middle" direction="pwr"/>
+<pin name="ENABLE" x="-20.32" y="7.62" visible="pin" length="middle" direction="in"/>
+<pin name="AVIN" x="-20.32" y="12.7" visible="pin" length="middle" direction="pwr"/>
+<pin name="AGND" x="-5.08" y="-27.94" visible="pin" length="middle" direction="pwr" rot="R90"/>
+<pin name="PGND" x="5.08" y="-27.94" visible="pin" length="middle" direction="pwr" rot="R90"/>
+<pin name="VOUT" x="20.32" y="17.78" visible="pin" length="middle" direction="pwr" rot="R180"/>
+<pin name="VFB" x="20.32" y="2.54" visible="pin" length="middle" direction="in" rot="R180"/>
+<pin name="LLM/SYNC" x="-20.32" y="-2.54" visible="pin" length="middle" direction="in"/>
+<pin name="SS" x="-20.32" y="-17.78" visible="pin" length="middle"/>
+<pin name="POK" x="20.32" y="-17.78" visible="pin" length="middle" direction="out" rot="R180"/>
+<pin name="RLLM" x="-20.32" y="-7.62" visible="pin" length="middle" direction="in"/>
+<text x="-9.9314" y="26.924" size="2.0828" layer="95" ratio="10" rot="SR0">>NAME</text>
+<text x="-10.3632" y="32.385" size="2.0828" layer="96" ratio="10" rot="SR0">>VALUE</text>
+</symbol>
+<symbol name="EN5364QI">
+<wire x1="-15.24" y1="38.1" x2="-15.24" y2="-38.1" width="0.254" layer="94"/>
+<wire x1="-15.24" y1="-38.1" x2="17.78" y2="-38.1" width="0.254" layer="94"/>
+<wire x1="17.78" y1="-38.1" x2="17.78" y2="38.1" width="0.254" layer="94"/>
+<wire x1="17.78" y1="38.1" x2="-15.24" y2="38.1" width="0.254" layer="94"/>
+<pin name="PVIN" x="-20.32" y="33.02" visible="pin" length="middle" direction="pwr"/>
+<pin name="AVIN" x="-20.32" y="27.94" visible="pin" length="middle" direction="pwr"/>
+<pin name="ENABLE" x="-20.32" y="22.86" visible="pin" length="middle" direction="in"/>
+<pin name="PGND" x="7.62" y="-43.18" visible="pin" length="middle" direction="pwr" rot="R90"/>
+<pin name="SS" x="-20.32" y="-33.02" visible="pin" length="middle" direction="in"/>
+<pin name="AGND" x="-5.08" y="-43.18" visible="pin" length="middle" direction="pwr" rot="R90"/>
+<pin name="VOUT" x="22.86" y="33.02" visible="pin" length="middle" direction="pwr" rot="R180"/>
+<pin name="VFB" x="22.86" y="17.78" visible="pin" length="middle" rot="R180"/>
+<text x="-4.8514" y="39.624" size="2.0828" layer="95" ratio="10" rot="SR0">>NAME</text>
+<text x="-5.2832" y="45.085" size="2.0828" layer="96" ratio="10" rot="SR0">>VALUE</text>
+<pin name="S_IN" x="-20.32" y="2.54" visible="pin" length="middle" direction="in"/>
+<pin name="S_OUT" x="22.86" y="-7.62" visible="pin" length="middle" direction="out" rot="R180"/>
+<pin name="EN_PB" x="-20.32" y="17.78" visible="pin" length="middle" direction="in"/>
+<pin name="POK" x="22.86" y="-33.02" visible="pin" length="middle" direction="out" rot="R180"/>
+<pin name="EAOUT" x="22.86" y="-12.7" visible="pin" length="middle" direction="out" rot="R180"/>
+<pin name="OCP_ADJ" x="-20.32" y="-22.86" visible="pin" length="middle" direction="in"/>
+<pin name="MAR1" x="-20.32" y="-7.62" visible="pin" length="middle" direction="in"/>
+<pin name="MAR2" x="-20.32" y="-12.7" visible="pin" length="middle" direction="in"/>
+<pin name="VSENSE" x="22.86" y="2.54" visible="pin" length="middle" rot="R180"/>
+<pin name="S_DELAY" x="-20.32" y="-2.54" visible="pin" length="middle" direction="in"/>
+<pin name="M/S" x="-20.32" y="7.62" visible="pin" length="middle" direction="in"/>
+</symbol>
+<symbol name="LMZ22008">
+<wire x1="-33.02" y1="20.32" x2="17.78" y2="20.32" width="0.254" layer="94"/>
+<wire x1="17.78" y1="20.32" x2="17.78" y2="-25.4" width="0.254" layer="94"/>
+<wire x1="17.78" y1="-25.4" x2="-33.02" y2="-25.4" width="0.254" layer="94"/>
+<wire x1="-33.02" y1="-25.4" x2="-33.02" y2="20.32" width="0.254" layer="94"/>
+<pin name="VIN at 2" x="-38.1" y="10.16" visible="pin" length="middle" direction="pwr"/>
+<pin name="SYNC" x="-38.1" y="-10.16" visible="pin" length="middle" direction="in"/>
+<pin name="EN" x="-38.1" y="0" visible="pin" length="middle" direction="in"/>
+<pin name="AGND at 5" x="-2.54" y="-30.48" visible="pin" length="middle" direction="pwr" rot="R90"/>
+<pin name="PGND" x="-17.78" y="-30.48" visible="pin" length="middle" direction="pwr" rot="R90"/>
+<pin name="FB" x="22.86" y="-5.08" visible="pin" length="middle" direction="in" rot="R180"/>
+<pin name="SS/TRK" x="-38.1" y="-20.32" visible="pin" length="middle" direction="in"/>
+<pin name="SH" x="22.86" y="-15.24" visible="pin" length="middle" rot="R180"/>
+<text x="-20.32" y="22.86" size="1.778" layer="94">>VALUE</text>
+<text x="-20.32" y="10.16" size="1.778" layer="94">>NAME</text>
+<pin name="VOUT at 10" x="22.86" y="15.24" visible="pin" length="middle" direction="pwr" rot="R180"/>
+<pin name="VIN at 1" x="-38.1" y="15.24" visible="pin" length="middle" direction="pwr"/>
+<pin name="AGND at 6" x="2.54" y="-30.48" visible="pin" length="middle" direction="pwr" rot="R90"/>
+<pin name="VOUT at 11" x="22.86" y="10.16" visible="pin" length="middle" direction="pwr" rot="R180"/>
+</symbol>
+</symbols>
+<devicesets>
+<deviceset name="EN6347QI">
+<description>3A PowerSoC
+Voltage Mode Synchronous PWM Buck with Integrated Inductor</description>
+<gates>
+<gate name="G$1" symbol="EN6337QI" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="QFN38_4X7X1.85">
+<connects>
+<connect gate="G$1" pin="AGND" pad="P$32"/>
+<connect gate="G$1" pin="AVIN" pad="P$33"/>
+<connect gate="G$1" pin="ENABLE" pad="P$27"/>
+<connect gate="G$1" pin="LLM/SYNC" pad="P$26"/>
+<connect gate="G$1" pin="PGND" pad="P$13 P$14 P$15 P$16 P$17 P$18 P$39 P$40"/>
+<connect gate="G$1" pin="POK" pad="P$28"/>
+<connect gate="G$1" pin="PVIN" pad="P$19 P$20 P$21"/>
+<connect gate="G$1" pin="RLLM" pad="P$29"/>
+<connect gate="G$1" pin="SS" pad="P$30"/>
+<connect gate="G$1" pin="VFB" pad="P$31"/>
+<connect gate="G$1" pin="VOUT" pad="P$5 P$6 P$7 P$8 P$9 P$10 P$11"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MPN" value="EN6347QI" constant="no"/>
+<attribute name="OC_FARNELL" value="2081146" constant="no"/>
+<attribute name="PACKAGE" value="QFN" constant="no"/>
+<attribute name="SUPPLIER" value="ENPIRION" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="EN5364QI">
+<description>6A PowerSoC
+Voltage Mode Synchronous Buck PWM DC-DC Converter
+With Integrated Inductor</description>
+<gates>
+<gate name="G$1" symbol="EN5364QI" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="QFN68_8X11X1.85">
+<connects>
+<connect gate="G$1" pin="AGND" pad="P$55"/>
+<connect gate="G$1" pin="AVIN" pad="P$53"/>
+<connect gate="G$1" pin="EAOUT" pad="P$57"/>
+<connect gate="G$1" pin="ENABLE" pad="P$52"/>
+<connect gate="G$1" pin="EN_PB" pad="P$51"/>
+<connect gate="G$1" pin="M/S" pad="P$50"/>
+<connect gate="G$1" pin="MAR1" pad="P$61"/>
+<connect gate="G$1" pin="MAR2" pad="P$62"/>
+<connect gate="G$1" pin="OCP_ADJ" pad="P$58"/>
+<connect gate="G$1" pin="PGND" pad="P$1 P$2 P$3 P$4 P$27 P$28 P$29 P$30 P$31 P$32 P$33 P$64 P$65 P$66 P$67 P$68 P$69 P$70 P$71"/>
+<connect gate="G$1" pin="POK" pad="P$54"/>
+<connect gate="G$1" pin="PVIN" pad="P$34 P$35 P$36 P$37 P$38 P$39 P$40 P$41 P$42 P$43"/>
+<connect gate="G$1" pin="SS" pad="P$59"/>
+<connect gate="G$1" pin="S_DELAY" pad="P$60"/>
+<connect gate="G$1" pin="S_IN" pad="P$49"/>
+<connect gate="G$1" pin="S_OUT" pad="P$48"/>
+<connect gate="G$1" pin="VFB" pad="P$56"/>
+<connect gate="G$1" pin="VOUT" pad="P$5 P$6 P$7 P$8 P$9 P$10 P$11 P$12 P$13"/>
+<connect gate="G$1" pin="VSENSE" pad="P$63"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MPN" value="EN5364QI" constant="no"/>
+<attribute name="OC_FARNELL" value="2081142" constant="no"/>
+<attribute name="PACKAGE" value="QFN" constant="no"/>
+<attribute name="SUPPLIER" value="ENPIRION" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+<deviceset name="LMZ13608">
+<description>LMZ13608 8-A SIMPLE SWITCHER
+Power Module With 36-V Maximum Input Voltage
+
+http://www.ti.com/lit/ds/symlink/lmz13608.pdf</description>
+<gates>
+<gate name="G$1" symbol="LMZ22008" x="0" y="0"/>
+</gates>
+<devices>
+<device name="" package="NDY">
+<connects>
+<connect gate="G$1" pin="AGND at 5" pad="P$5"/>
+<connect gate="G$1" pin="AGND at 6" pad="P$6"/>
+<connect gate="G$1" pin="EN" pad="P$4"/>
+<connect gate="G$1" pin="FB" pad="P$7"/>
+<connect gate="G$1" pin="PGND" pad="P$8"/>
+<connect gate="G$1" pin="SH" pad="P$10"/>
+<connect gate="G$1" pin="SS/TRK" pad="P$9"/>
+<connect gate="G$1" pin="SYNC" pad="P$3"/>
+<connect gate="G$1" pin="VIN at 1" pad="P$1"/>
+<connect gate="G$1" pin="VIN at 2" pad="P$2"/>
+<connect gate="G$1" pin="VOUT at 10" pad="P$11"/>
+<connect gate="G$1" pin="VOUT at 11" pad="P$12"/>
+</connects>
+<technologies>
+<technology name="">
+<attribute name="MPN" value="LMZ13608TZ/NOPB" constant="no"/>
+<attribute name="OC_FARNELL" value="2492265" constant="no"/>
+<attribute name="PACKAGE" value="NDY (11)" constant="no"/>
+<attribute name="SUPPLIER" value="Texas Instruments" constant="no"/>
+</technology>
+</technologies>
+</device>
+</devices>
+</deviceset>
+</devicesets>
+</library>
+<library name="rc-master">
+<description><b>R/C MASTER! - v1.07 (07/03/2007)</b><p>
+<p>This library is a collection of SMD and through hole resistors and capacitors by various manufacturers. Some of these include types from Panasonic, Kemet, BC Components and others. Many of the packages were adapted from <b>rcl.lbr</b> and <b>cap-pan40.lbr</b> and have been renamed and grouped in a more logical form.</p><p>Silkscreen elements are a minimum of 8 mils in width with larger components using 10 mil widths. Most of the SMD components [...]
+<p><h4>All capacitors are grouped by the following naming conventions:</h4></p>
+<table width="380" border="1" bordercolor="#000000">
+  <tr> 
+    <td width="81" bgcolor="#33CCFF"><div align="center"><strong>Prefix</strong></div></td>
+    <td width="289" bgcolor="#33CCFF"><div align="center"><strong>Description</strong></div></td>
+  </tr>
+  <tr> 
+    <td><div align="center">CBP_</div></td>
+    <td><div align="center">Bipolar Electrolytic Types</div></td>
+  </tr>
+  <tr> 
+    <td><div align="center">CCA_</div></td>
+    <td><div align="center">Chip Cap Array Types</div></td>
+  </tr>
+  <tr> 
+    <td><div align="center">CP_</div></td>
+    <td><div align="center">Polarized Electrolytic/Tantalum Types</div></td>
+  </tr>
+  <tr> 
+    <td><div align="center">C_</div></td>
+    <td><div align="center">Non-Polarized Film / Chip Types</div></td>
+  </tr>
+  <tr> 
+    <td><div align="center">FB_</div></td>
+    <td><div align="center">Simple Ferrite Bead Types</div></td>
+  </tr>
+  <tr> 
+    <td><div align="center">L_</div></td>
+    <td><div align="center">Simple Chip Inductors</div></td>
+  </tr>
+  <tr> 
+    <td><div align="center">R_</div></td>
+    <td><div align="center">Resistor Types</div></td>
+  </tr>
+</table>
+<p>
+<p><author>THIS LIBRARY IS PROVIDED AS IS AND WITHOUT WARRANTY OF ANY KIND, EXPRESSED OR IMPLIED.<br>Copyright (C) 2007, Bob Starr<br> http://www.bobstarr.net<br>
+</author></description>
+<packages>
+<package name="CE-010X030">
+<description><b>POLCAP RADIAL</b><p>
+1.0 mm lead spacing, 3 mm diameter, grid 0.0125 inch</description>
+<wire x1="-2.2225" y1="0.9525" x2="-1.5875" y2="0.9525" width="0.254" layer="21"/>
+<wire x1="-1.905" y1="0.635" x2="-1.905" y2="1.27" width="0.254" layer="21"/>
+<wire x1="-0.3587" y1="0" x2="-0.7" y2="0" width="0.2032" layer="51"/>
+<wire x1="0.2764" y1="0" x2="0.7" y2="0" width="0.2032" layer="51"/>
+<wire x1="0.2" y1="0" x2="0.4" y2="0.6" width="0.254" layer="51" curve="-37.877434" cap="flat"/>
+<wire x1="0.4" y1="-0.6" x2="0.2" y2="0" width="0.254" layer="51" curve="-37.380842" cap="flat"/>
+<wire x1="-0.2587" y1="-0.6349" x2="-0.2587" y2="0.635" width="0.254" layer="51"/>
+<circle x="0" y="0" radius="1.506" width="0.2032" layer="21"/>
+<pad name="+" x="-0.635" y="0" drill="0.6096" diameter="0.8128" shape="long" rot="R90"/>
+<pad name="-" x="0.635" y="0" drill="0.6096" diameter="0.8128" shape="long" rot="R90"/>
+<text x="1.5874" y="-1.905" size="0.8128" layer="27" ratio="10">>VALUE</text>
+<text x="1.5874" y="0.635" size="1.016" layer="25" ratio="18">>NAME</text>
+</package>
+<package name="CE-020X050">
+<description><b>POLCAP RADIAL</b><p>
+2.0 mm lead spacing, 5 mm diameter, grid 0.0125 inch</description>
+<wire x1="-1.27" y1="1.905" x2="-0.635" y2="1.905" width="0.254" layer="21"/>
+<wire x1="-0.9525" y1="1.5875" x2="-0.9525" y2="2.2225" width="0.254" layer="21"/>
+<wire x1="-0.3175" y1="0" x2="-0.9525" y2="0" width="0.2032" layer="51"/>
+<wire x1="0.3176" y1="0" x2="0.9525" y2="0" width="0.2032" layer="51"/>
+<wire x1="0.3176" y1="0" x2="0.6351" y2="1.1112" width="0.3048" layer="51" curve="-37.874253" cap="flat"/>
+<wire x1="0.6351" y1="-1.1113" x2="0.3176" y2="0" width="0.3048" layer="51" curve="-37.379812" cap="flat"/>
+<wire x1="-0.3175" y1="-1.1112" x2="-0.3175" y2="1.1113" width="0.3048" layer="51"/>
+<circle x="0" y="0" radius="2.7127" width="0.2032" layer="21"/>
+<pad name="+" x="-0.9525" y="0" drill="0.8128" shape="long" rot="R90"/>
+<pad name="-" x="0.9525" y="0" drill="0.8128" shape="long" rot="R90"/>
+<text x="2.8575" y="-2.54" size="0.8128" layer="27" ratio="10">>VALUE</text>
+<text x="2.8575" y="1.27" size="1.016" layer="25" ratio="18">>NAME</text>
+</package>
+<package name="CE-025X060">
+<description><b>POLCAP RADIAL</b><p>
+2.5 mm lead spacing, 6 mm diameter, grid 0.0125 inch</description>
+<wire x1="-1.7462" y1="2.0638" x2="-0.7937" y2="2.0638" width="0.254" layer="21"/>
+<wire x1="-1.27" y1="2.54" x2="-1.27" y2="1.5875" width="0.254" layer="21"/>
+<wire x1="-0.3175" y1="0" x2="-1.27" y2="0" width="0.2032" layer="51"/>
+<wire x1="0.3176" y1="0" x2="1.27" y2="0" width="0.2032" layer="51"/>
+<wire x1="0.3176" y1="0" x2="0.6351" y2="1.1112" width="0.3048" layer="51" curve="-37.874253" cap="flat"/>
+<wire x1="0.6351" y1="-1.1113" x2="0.3176" y2="0" width="0.3048" layer="51" curve="-37.379812" cap="flat"/>
+<wire x1="-0.3175" y1="-1.1112" x2="-0.3175" y2="1.1113" width="0.3048" layer="51"/>
+<circle x="0" y="0" radius="3.4342" width="0.2032" layer="21"/>
+<pad name="+" x="-1.27" y="0" drill="0.8128" diameter="1.778"/>
+<pad name="-" x="1.27" y="0" drill="0.8128" diameter="1.778" shape="octagon"/>
+<text x="3.81" y="1.905" size="1.016" layer="25" ratio="18">>NAME</text>
+<text x="3.81" y="-3.175" size="0.8128" layer="27" ratio="10">>VALUE</text>
+</package>
+<package name="CE-025X065">
+<description><b>POLCAP RADIAL</b><p>
+2.5 mm lead spacing, 6.5 mm diameter, grid 0.0125 inch</description>
+<wire x1="-1.7462" y1="2.0638" x2="-0.7937" y2="2.0638" width="0.254" layer="21"/>
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+<text x="2.2225" y="-1.9049" size="0.8128" layer="27" ratio="10">>VALUE</text>
+<text x="2.2225" y="0.635" size="1.016" layer="25" ratio="18">>NAME</text>
+</package>
+<package name="CE-020X060">
+<description><b>POLCAP RADIAL</b><p>
+2.0 mm lead spacing, 6 mm diameter, grid 0.0125 inch</description>
+<wire x1="-1.4287" y1="2.0638" x2="-0.4762" y2="2.0638" width="0.254" layer="21"/>
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+<text x="3.81" y="-3.175" size="0.8128" layer="27" ratio="10">>VALUE</text>
+</package>
+<package name="CE-025X075">
+<description><b>POLCAP RADIAL</b><p>
+2.5 mm lead spacing, 7.5 mm diameter, grid 0.0125 inch</description>
+<wire x1="-1.7462" y1="2.0638" x2="-0.7937" y2="2.0638" width="0.254" layer="21"/>
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+<pad name="+" x="-1.27" y="0" drill="0.8128" diameter="1.778"/>
+<pad name="-" x="1.27" y="0" drill="0.8128" diameter="1.778" shape="octagon"/>
+<text x="3.81" y="1.905" size="1.016" layer="25" ratio="18">>NAME</text>
+<text x="3.81" y="-3.175" size="0.8128" layer="27" ratio="10">>VALUE</text>
+</package>
+<package name="CE-025X085">
+<description><b>POLCAP RADIAL</b><p>
+2.5 mm lead spacing, 8.5 mm diameter, grid 0.0125 inch</description>
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+<pad name="-" x="1.27" y="0" drill="0.8128" diameter="1.778" shape="octagon"/>
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+<text x="4.445" y="-3.81" size="0.8128" layer="27" ratio="10">>VALUE</text>
+</package>
+<package name="CEH-035-080X115">
+<description><b>POLCAP RADIAL</b> - Horizontal<p>
+3.5 mm lead spacing, 8 mm diameter, 11.5 mm length, grid 0.00625 inch</description>
+<wire x1="-3.905" y1="1.9525" x2="3.9051" y2="1.9525" width="0.2032" layer="21"/>
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+<pad name="+" x="-1.7463" y="0" drill="0.8128" shape="long" rot="R90"/>
+<pad name="-" x="1.7463" y="0" drill="0.8128" shape="long" rot="R90"/>
+<text x="5.7625" y="1.905" size="0.8128" layer="27" ratio="10" rot="R90">>VALUE</text>
+<text x="-4.81" y="1.905" size="1.016" layer="25" ratio="18" rot="R90">>NAME</text>
+</package>
+<package name="CEH-035-080X115/R">
+<description><b>POLCAP RADIAL</b> - Horizontal Rotated<p>
+3.5 mm lead spacing, 8 mm diameter, 11.5 mm length, grid 0.00625 inch</description>
+<wire x1="-3.905" y1="1.9525" x2="3.9051" y2="1.9525" width="0.2032" layer="21"/>
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+<pad name="+" x="1.7463" y="0" drill="0.8128" shape="long" rot="R270"/>
+<pad name="-" x="-1.7463" y="0" drill="0.8128" shape="long" rot="R270"/>
+<text x="5.7625" y="1.905" size="0.8128" layer="27" ratio="10" rot="R90">>VALUE</text>
+<text x="-4.81" y="1.905" size="1.016" layer="25" ratio="18" rot="R90">>NAME</text>
 </package>
 </packages>
 <symbols>
-<symbol name="Q">
-<wire x1="1.016" y1="0" x2="2.54" y2="0" width="0.1524" layer="94"/>
-<wire x1="-2.54" y1="0" x2="-1.016" y2="0" width="0.1524" layer="94"/>
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-<wire x1="-0.381" y1="-1.524" x2="0.381" y2="-1.524" width="0.254" layer="94"/>
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-<wire x1="0.381" y1="1.524" x2="-0.381" y2="1.524" width="0.254" layer="94"/>
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-<wire x1="-1.016" y1="1.778" x2="-1.016" y2="-1.778" width="0.254" layer="94"/>
-<text x="2.54" y="1.016" size="1.778" layer="95">>NAME</text>
-<text x="2.54" y="-2.54" size="1.778" layer="96">>VALUE</text>
-<text x="-2.159" y="-1.143" size="0.8636" layer="93">1</text>
-<text x="1.524" y="-1.143" size="0.8636" layer="93">2</text>
-<pin name="2" x="2.54" y="0" visible="off" length="point" direction="pas" swaplevel="1" rot="R180"/>
-<pin name="1" x="-2.54" y="0" visible="off" length="point" direction="pas" swaplevel="1"/>
+<symbol name="CP-">
+<wire x1="0.635" y1="0" x2="2.54" y2="0" width="0.1524" layer="94"/>
+<wire x1="0.635" y1="1.5875" x2="0.635" y2="0" width="0.508" layer="94"/>
+<wire x1="0.635" y1="0" x2="0.635" y2="-1.5875" width="0.508" layer="94"/>
+<wire x1="-0.381" y1="0" x2="-0.3811" y2="0" width="0.1524" layer="94"/>
+<wire x1="-0.3811" y1="0" x2="-2.54" y2="0" width="0.1524" layer="94"/>
+<wire x1="-0.365" y1="0" x2="-0.9017" y2="-1.5367" width="0.4064" layer="94" curve="-37.878659" cap="flat"/>
+<wire x1="-0.8979" y1="1.5144" x2="-0.3811" y2="0" width="0.4064" layer="94" curve="-37.377473" cap="flat"/>
+<text x="3.175" y="0.635" size="1.778" layer="95">>NAME</text>
+<text x="-5.08" y="-3.81" size="1.778" layer="96">>VALUE</text>
+<text x="1.27" y="0.635" size="1.4224" layer="94" ratio="12">+</text>
+<pin name="-" x="-2.54" y="0" visible="off" length="point" direction="pas"/>
+<pin name="+" x="2.54" y="0" visible="off" length="point" direction="pas" rot="R180"/>
 </symbol>
 </symbols>
 <devicesets>
-<deviceset name="CRYSTAL" prefix="Q" uservalue="yes">
-<description><b>CRYSTAL</b></description>
+<deviceset name="CP_" prefix="C" uservalue="yes">
+<description><B>POLARIZED CAP</B></description>
 <gates>
-<gate name="G$1" symbol="Q" x="0" y="0"/>
+<gate name="G$1" symbol="CP-" x="0" y="0"/>
 </gates>
 <devices>
-<device name="HC49S" package="HC49/S">
+<device name="E-010X030" package="CE-010X030">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E-020X050" package="CE-020X050">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E-025X060" package="CE-025X060">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E-025X065" package="CE-025X065">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E-035X100" package="CE-035X100">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E-035X080" package="CE-035X080">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E-050X100" package="CE-050X100">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E-050X120" package="CE-050X120">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E-075X160" package="CE-075X160">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E-075X180" package="CE-075X180">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="" package="CEA-100X100">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EA-100X250" package="CEA-100X250">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EA-120X250" package="CEA-120X250">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EA-120X310" package="CEA-120X310">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EA-160X250" package="CEA-160X250">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EA-160X310" package="CEA-160X310">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EA-180X400" package="CEA-180X400">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EA-220X400" package="CEA-220X400">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EA-220X500" package="CEA-220X500">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EA-035X070" package="CEA-035X070">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EA-045X100" package="CEA-045X100">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EA-063X100" package="CEA-063X100">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EA-080X160" package="CEA-080X160">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EA-080X200" package="CEA-080X200">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="ETS-20" package="CETS-20">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="ETS-22" package="CETS-22">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="ETS-25" package="CETS-25">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="ETS-30" package="CETS-30">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="ETS-35" package="CETS-35">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="ETS-40" package="CETS-40">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E-050X125" package="CE-050X125">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="7343-TE-D" package="C7343-TE-D">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EH-015-040X110" package="CEH-015-040X110">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EH-015-040X070" package="CEH-015-040X070">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EH-020-050X110" package="CEH-020-050X110">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EH-020-050X150" package="CEH-020-050X150">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EH-025-060X110" package="CEH-025-060X110">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EH-025-060X150" package="CEH-025-060X150">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EH-050-100X120" package="CEH-050-100X120">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EH-050-100X200" package="CEH-050-100X200">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EH-050-100X120/R" package="CEH-050-100X120/R">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EH-015-040X110/R" package="CEH-015-040X110/R">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EH-015-040X070/R" package="CEH-015-040X070/R">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EH-020-050X110/R" package="CEH-020-050X110/R">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EH-020-050X150/R" package="CEH-020-050X150/R">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EH-025-060X110/R" package="CEH-025-060X110/R">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="EH-025-060X150/R" package="CEH-025-060X150/R">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="AA127X350" package="CEAA127X350">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="AA222X510" package="CEAA222X510">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="AA286X640" package="CEAA286X640">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="AA318X790" package="CEAA318X790">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="TT025-100" package="CTT-025-100">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="TT025-030" package="CTT-025-030">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="TT025-040" package="CTT-025-040">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="TT025-050" package="CTT-025-050">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="TT025-070" package="CTT-025-070">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="TT050-100" package="CTT-050-100">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="TT050-080" package="CTT-050-080">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="3216-TE-A" package="C3216-TE-A">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="3258-TE-B" package="C3528-TE-B">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="6032-TE-C" package="C6032-TE-C">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SV-A" package="CSV-A">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SV-B" package="CSV-B">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SV-C" package="CSV-C">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SV-D" package="CSV-D">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SV-E/F" package="CSV-E/F">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SV-G" package="CSV-G">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="3216" package="C3216/T">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="3216-18R" package="C3216-18R/T">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="3216-18W" package="C3216-18W/T">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="3528" package="C3528/T">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="1667008" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="HC49GW" package="HC49GW">
+<device name="3528-21R" package="C3528-21R/T">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="unknown" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="HC49TL-H" package="HC49TL-H">
+<device name="3528-21W" package="C3528-21W/T">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="unknown" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="HC49U-H" package="HC49U-H">
+<device name="6032" package="C6032/T">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="1666973" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="HC49U-LM" package="HC49U-LM">
+<device name="6032-28R" package="C6032-28R/T">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="1666956" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="HC49U-V" package="HC49U-V">
+<device name="6032-28W" package="C6032-28W/T">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="1666969" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="HC49U70" package="HC49U70">
+<device name="7343" package="C7343/T">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="unknown" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="HC49UP" package="HC49UP">
+<device name="BC139CLL-2R" package="C139CLL-2R">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="unknown" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="HC13U-H" package="HC13U-H">
+<device name="BC139CLL-2W" package="C139CLL-2W">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="unknown" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="HC18U-H" package="HC18U-H">
+<device name="BC139CLL-3W" package="C139CLL-3W">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="unknown" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="HC18U-V" package="HC18U-V">
+<device name="BC140CLH-0810" package="C140CLH-0810">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="unknown" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="HC33U-H" package="HC33U-H">
+<device name="BC140CLH-1010" package="C140CLH-1010">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="unknown" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="HC33U-V" package="HC33U-V">
+<device name="BC140CLH-1014" package="C140CLH-1014">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="unknown" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="SM49" package="SM49">
+<device name="BC150CLZ-0810" package="C150CLZ-0810">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="unknown" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="TC26H" package="TC26H">
+<device name="BC150CLZ-1010" package="C150CLZ-1010">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="unknown" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="TC26V" package="TC26V">
+<device name="BC150CLZ-1014" package="C150CLZ-1014">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="unknown" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
+</technologies>
+</device>
+<device name="BC153CLV-0405" package="C153CLV-0405">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="BC153CLV-0505" package="C153CLV-0505">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="BC153CLV-0605" package="C153CLV-0605">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="BC153CLV-0807" package="C153CLV-0807">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="BC153CLV-0810" package="C153CLV-0810">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="BC153CLV-1010" package="C153CLV-1010">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="BC153CLV-1012" package="C153CLV-1012">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="BC153CLV-1014" package="C153CLV-1014">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="BC175TMP-0808" package="C175TMP-0808">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="BC175TMP-0810" package="C175TMP-0810">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SV-H" package="CSV-H">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SV-J" package="CSV-J">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="SV-K" package="CSV-K">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="GC-SD-H" package="CGOLD-SD-H">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="GC-SD-V" package="CGOLD-SD-V">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
+</technologies>
+</device>
+<device name="E-015X040" package="CE-015X040">
+<connects>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
+</connects>
+<technologies>
+<technology name=""/>
 </technologies>
 </device>
-<device name="TC38H" package="TC38H">
+<device name="E-020X060" package="CE-020X060">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="2"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="unknown" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="68SMX" package="86SMX">
+<device name="E-025X075" package="CE-025X075">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="4"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="6344860" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="MM20SS" package="MM20SS">
+<device name="E-025X085" package="CE-025X085">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="4"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="unknown" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="MM39SL" package="MM39SL">
+<device name="EH-035-080X115" package="CEH-035-080X115">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="4"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="unknown" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
-<device name="CTS406" package="CTS406">
+<device name="EH-035-080X115/R" package="CEH-035-080X115/R">
 <connects>
-<connect gate="G$1" pin="1" pad="1"/>
-<connect gate="G$1" pin="2" pad="3"/>
+<connect gate="G$1" pin="+" pad="+"/>
+<connect gate="G$1" pin="-" pad="-"/>
 </connects>
 <technologies>
-<technology name="">
-<attribute name="MF" value="" constant="no"/>
-<attribute name="MPN" value="" constant="no"/>
-<attribute name="OC_FARNELL" value="unknown" constant="no"/>
-<attribute name="OC_NEWARK" value="unknown" constant="no"/>
-</technology>
+<technology name=""/>
 </technologies>
 </device>
 </devices>
@@ -25195,3680 +41059,9412 @@ Source: 008-0260-0_E.pdf</description>
 <part name="FID15" library="UsedComponents" deviceset="FIDUCIAL" device="1X2"/>
 <part name="D2" library="diode" deviceset="BAT54C" device=""/>
 <part name="L2" library="microbuilder" deviceset="INDUCTOR" device="_0805" value="10uH"/>
+<part name="U7" library="Xilinx_XC7A200TFBG484" deviceset="XC7A200TFBG484" device=""/>
+<part name="SUPPLY59" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY60" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY61" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY62" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY63" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY64" library="supply2" deviceset="GND" device=""/>
+<part name="C65" library="resistor" deviceset="CPOL-EU" device="SMCD" value="330 uF">
+<attribute name="DIELECTRIC" value="TANTALUM"/>
+<attribute name="RATED_VOLTAGE" value="6.3V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="SUPPLY65" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY66" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY67" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY68" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY69" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY70" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY71" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY72" library="supply2" deviceset="GND" device=""/>
+<part name="C66" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="SUPPLY73" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY74" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY75" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY76" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY77" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY78" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY79" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY80" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY81" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY82" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY83" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY84" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY85" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY86" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY87" library="supply2" deviceset="GND" device=""/>
+<part name="C67" library="resistor" deviceset="C-EU" device="C0402" value="0.47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="6.3V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="SUPPLY88" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY89" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY90" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY91" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY92" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY93" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY94" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY95" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY96" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY97" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY98" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY99" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY100" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY101" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY102" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY103" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY104" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY105" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY106" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY107" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY108" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY109" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY110" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY111" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY112" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY113" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY114" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY115" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY116" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY117" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY118" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY119" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY120" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY121" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY122" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY123" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY124" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY125" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY126" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY127" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY128" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY129" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY130" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY131" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY132" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY133" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY134" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY135" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY136" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY137" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY138" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY139" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY140" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY141" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY142" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY143" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY144" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY145" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY146" library="supply2" deviceset="GND" device=""/>
+<part name="IC3" library="altera-configdevices" deviceset="N25Q128A13E" device="S"/>
+<part name="SUPPLY147" library="supply2" deviceset="GND" device=""/>
+<part name="R9" library="resistor" deviceset="R-EU_" device="R0603" value="4.7k">
+<attribute name="TOLERANCE" value="5%"/>
+</part>
+<part name="JP7" library="jumper" deviceset="JP1Q" device=""/>
+<part name="R20" library="resistor" deviceset="R-EU_" device="R0603" value="4.7k">
+<attribute name="TOLERANCE" value="5%"/>
+</part>
+<part name="SUPPLY148" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY149" library="supply2" deviceset="GND" device=""/>
+<part name="R21" library="resistor" deviceset="R-EU_" device="R0603" value="1.0k">
+<attribute name="TOLERANCE" value="5%"/>
+</part>
+<part name="SUPPLY150" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY151" library="supply2" deviceset="GND" device=""/>
+<part name="FRAME8" library="frames" deviceset="A4L-LOC" device=""/>
+<part name="FRAME9" library="frames" deviceset="A4L-LOC" device=""/>
+<part name="FRAME10" library="frames" deviceset="A4L-LOC" device=""/>
+<part name="FRAME11" library="frames" deviceset="A4L-LOC" device=""/>
+<part name="FRAME12" library="frames" deviceset="A4L-LOC" device=""/>
+<part name="FRAME13" library="frames" deviceset="A4L-LOC" device=""/>
+<part name="FRAME14" library="frames" deviceset="A4L-LOC" device=""/>
+<part name="FRAME15" library="frames" deviceset="A4L-LOC" device=""/>
+<part name="FRAME16" library="frames" deviceset="A4L-LOC" device=""/>
+<part name="FRAME17" library="frames" deviceset="A4L-LOC" device=""/>
+<part name="FRAME18" library="frames" deviceset="A4L-LOC" device=""/>
+<part name="FRAME19" library="frames" deviceset="A4L-LOC" device=""/>
+<part name="C68" library="resistor" deviceset="C-EU" device="C1210" value="47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="20%"/>
+</part>
+<part name="C69" library="resistor" deviceset="CPOL-EU" device="SMCD" value="330 uF">
+<attribute name="DIELECTRIC" value="TANTALUM"/>
+<attribute name="RATED_VOLTAGE" value="6.3V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="LED11" library="led" deviceset="LED" device="CHIP-LED0603"/>
+<part name="LED12" library="led" deviceset="LED" device="CHIP-LED0603"/>
+<part name="R22" library="resistor" deviceset="R-EU_" device="R0603" value="330">
+<attribute name="TOLERANCE" value="5%"/>
+</part>
+<part name="SUPPLY152" library="supply2" deviceset="GND" device=""/>
+<part name="FRAME20" library="frames" deviceset="A4L-LOC" device=""/>
+<part name="LED13" library="led" deviceset="LED" device="CHIP-LED0603"/>
+<part name="LED14" library="led" deviceset="LED" device="CHIP-LED0603"/>
+<part name="R23" library="resistor" deviceset="R-EU_" device="R0603" value="1.0k">
+<attribute name="TOLERANCE" value="5%"/>
+</part>
+<part name="R24" library="resistor" deviceset="R-EU_" device="R0603" value="1.0k">
+<attribute name="TOLERANCE" value="5%"/>
+</part>
+<part name="R27" library="resistor" deviceset="R-EU_" device="R0603" value="1.0k">
+<attribute name="TOLERANCE" value="5%"/>
+</part>
+<part name="SV1" library="con-lstb" deviceset="MA08-2" device=""/>
+<part name="SUPPLY153" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY154" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY155" library="supply2" deviceset="GND" device=""/>
+<part name="SV2" library="con-lstb" deviceset="MA08-2" device=""/>
+<part name="SUPPLY156" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY157" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY158" library="supply2" deviceset="GND" device=""/>
+<part name="Q5" library="crystal" deviceset="ASF*" device="" technology="L1">
+<attribute name="MPN" value="ASFL1-50.000MHZ-EK-T"/>
+<attribute name="OC_FARNELL" value="2467924"/>
+<attribute name="OC_NEWARK" value=""/>
+</part>
+<part name="C110" library="resistor" deviceset="C-EU" device="C0603" value="0.01 uF">
+<attribute name="DIELECTRIC" value="X7R"/>
+<attribute name="RATED_VOLTAGE" value="50V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="SUPPLY159" library="supply2" deviceset="GND" device=""/>
+<part name="SUPPLY160" library="supply2" deviceset="GND" device=""/>
+<part name="R28" library="resistor" deviceset="R-EU_" device="R0603" value="0"/>
+<part name="R25" library="resistor" deviceset="R-EU_" device="R0603" value="4.7k">
+<attribute name="TOLERANCE" value="5%"/>
+</part>
+<part name="R26" library="resistor" deviceset="R-EU_" device="R0603" value="4.7k">
+<attribute name="TOLERANCE" value="5%"/>
+</part>
+<part name="Q6" library="transistors_gaui" deviceset="2N7002" device=""/>
+<part name="SUPPLY161" library="supply2" deviceset="GND" device=""/>
+<part name="R29" library="resistor" deviceset="R-EU_" device="R0603" value="4.7k">
+<attribute name="TOLERANCE" value="5%"/>
+</part>
+<part name="SUPPLY162" library="supply2" deviceset="GND" device=""/>
+<part name="R30" library="resistor" deviceset="R-EU_" device="R0603" value="330">
+<attribute name="TOLERANCE" value="5%"/>
+</part>
+<part name="R31" library="resistor" deviceset="R-EU_" device="R0603" value="330">
+<attribute name="TOLERANCE" value="5%"/>
+</part>
+<part name="R32" library="resistor" deviceset="R-EU_" device="R0603" value="330">
+<attribute name="TOLERANCE" value="5%"/>
+</part>
+<part name="LED15" library="led" deviceset="LED" device="CHIP-LED0603"/>
+<part name="R33" library="resistor" deviceset="R-EU_" device="R0603" value="330">
+<attribute name="TOLERANCE" value="5%"/>
+</part>
+<part name="R34" library="resistor" deviceset="R-EU_" device="R0603" value="100">
+<attribute name="TOLERANCE" value="5%"/>
+</part>
+<part name="SV3" library="con-lstb" deviceset="MA08-1" device=""/>
+<part name="SUPPLY163" library="supply2" deviceset="GND" device=""/>
+<part name="R35" library="resistor" deviceset="R-EU_" device="R0603" value="10k">
+<attribute name="TOLERANCE" value="5%"/>
+</part>
+<part name="R36" library="resistor" deviceset="R-EU_" device="R0603" value="10k">
+<attribute name="TOLERANCE" value="5%"/>
+</part>
+<part name="R37" library="resistor" deviceset="R-EU_" device="R0603" value="10k">
+<attribute name="TOLERANCE" value="5%"/>
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+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="6.3V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C122" library="resistor" deviceset="C-EU" device="C0402" value="0.47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="6.3V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C123" library="resistor" deviceset="C-EU" device="C0402" value="0.47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="6.3V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C124" library="resistor" deviceset="C-EU" device="C0402" value="0.47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="6.3V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C125" library="resistor" deviceset="C-EU" device="C0402" value="0.47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="6.3V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C126" library="resistor" deviceset="C-EU" device="C0402" value="0.47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="6.3V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C127" library="resistor" deviceset="C-EU" device="C0402" value="0.47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="6.3V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C128" library="resistor" deviceset="C-EU" device="C0402" value="0.47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="6.3V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C129" library="resistor" deviceset="C-EU" device="C0402" value="0.47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="6.3V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C130" library="resistor" deviceset="C-EU" device="C0402" value="0.47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="6.3V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C131" library="resistor" deviceset="C-EU" device="C0603" value="27pF">
+<attribute name="DIELECTRIC" value="C0G"/>
+<attribute name="RATED_VOLTAGE" value="50V"/>
+<attribute name="TOLERANCE" value="5%"/>
+</part>
+<part name="C132" library="resistor" deviceset="C-EU" device="C0603" value="27pF">
+<attribute name="DIELECTRIC" value="C0G"/>
+<attribute name="RATED_VOLTAGE" value="50V"/>
+<attribute name="TOLERANCE" value="5%"/>
+</part>
+<part name="C133" library="resistor" deviceset="C-EU" device="C0603" value="0.1 uF">
+<attribute name="DIELECTRIC" value="X7R"/>
+<attribute name="RATED_VOLTAGE" value="50V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C134" library="resistor" deviceset="C-EU" device="C0603" value="0.1 uF">
+<attribute name="DIELECTRIC" value="X7R"/>
+<attribute name="RATED_VOLTAGE" value="50V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C135" library="resistor" deviceset="C-EU" device="C0603" value="0.1 uF">
+<attribute name="DIELECTRIC" value="X7R"/>
+<attribute name="RATED_VOLTAGE" value="50V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C136" library="resistor" deviceset="C-EU" device="C0603" value="0.1 uF">
+<attribute name="DIELECTRIC" value="X7R"/>
+<attribute name="RATED_VOLTAGE" value="50V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C137" library="resistor" deviceset="C-EU" device="C0603" value="0.1 uF">
+<attribute name="DIELECTRIC" value="X7R"/>
+<attribute name="RATED_VOLTAGE" value="50V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C138" library="resistor" deviceset="C-EU" device="C0603" value="0.1 uF">
+<attribute name="DIELECTRIC" value="X7R"/>
+<attribute name="RATED_VOLTAGE" value="50V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C139" library="resistor" deviceset="C-EU" device="C0603" value="0.1 uF">
+<attribute name="DIELECTRIC" value="X7R"/>
+<attribute name="RATED_VOLTAGE" value="50V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C140" library="resistor" deviceset="C-EU" device="C1210" value="10 uF">
+<attribute name="DIELECTRIC" value="X7R"/>
+<attribute name="RATED_VOLTAGE" value="50V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C141" library="resistor" deviceset="C-EU" device="C1210" value="10 uF">
+<attribute name="DIELECTRIC" value="X7R"/>
+<attribute name="RATED_VOLTAGE" value="50V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C142" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C143" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C144" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C145" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C146" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C147" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C148" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C149" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C150" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C151" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C152" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C153" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C154" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C155" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C156" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C157" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C158" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C159" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C160" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C161" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C162" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C163" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C164" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C165" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C166" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C167" library="resistor" deviceset="C-EU" device="C0603" value="4.7 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="10%"/>
+</part>
+<part name="C168" library="resistor" deviceset="C-EU" device="C1210" value="47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="20%"/>
+</part>
+<part name="C169" library="resistor" deviceset="C-EU" device="C1210" value="47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="20%"/>
+</part>
+<part name="C170" library="resistor" deviceset="C-EU" device="C1210" value="47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="20%"/>
+</part>
+<part name="C171" library="resistor" deviceset="C-EU" device="C1210" value="47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="20%"/>
+</part>
+<part name="C172" library="resistor" deviceset="C-EU" device="C1210" value="47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="20%"/>
+</part>
+<part name="C173" library="resistor" deviceset="C-EU" device="C1210" value="47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="20%"/>
+</part>
+<part name="C174" library="resistor" deviceset="C-EU" device="C1210" value="47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="20%"/>
+</part>
+<part name="C175" library="resistor" deviceset="C-EU" device="C1210" value="47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="20%"/>
+</part>
+<part name="C176" library="resistor" deviceset="C-EU" device="C1210" value="47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="20%"/>
+</part>
+<part name="C177" library="resistor" deviceset="C-EU" device="C1210" value="47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="20%"/>
+</part>
+<part name="C178" library="resistor" deviceset="C-EU" device="C1210" value="47 uF">
+<attribute name="DIELECTRIC" value="X5R"/>
+<attribute name="RATED_VOLTAGE" value="16V"/>
+<attribute name="TOLERANCE" value="20%"/>
+</part>
 </parts>
 <sheets>
 <sheet>
-<description>CrypTech avalanche noise evaluation board, rev 02</description>
+<description>CrypTech avalanche noise evaluation board, rev 02</description>
+<plain>
+<text x="60.96" y="109.22" size="3.81" layer="91">Novena FPGA connector</text>
+<text x="251.46" y="134.62" size="3.81" layer="91">Extra</text>
+</plain>
+<instances>
+<instance part="SUPPLY2" gate="GND" x="160.02" y="73.66" smashed="yes" rot="MR270">
+<attribute name="VALUE" x="163.195" y="74.295" size="1.778" layer="96" rot="MR180"/>
+</instance>
+<instance part="FRAME1" gate="G$1" x="22.86" y="-106.68"/>
+<instance part="LOGO1" gate="G$1" x="264.16" y="121.92"/>
+<instance part="CON1" gate="G$1" x="104.14" y="20.32"/>
+<instance part="JP2" gate="G$1" x="321.31" y="50.8" rot="R180"/>
+<instance part="JP1" gate="G$1" x="318.77" y="123.19" rot="R180"/>
+<instance part="SUPPLY7" gate="GND" x="160.02" y="91.44" smashed="yes" rot="MR270">
+<attribute name="VALUE" x="163.195" y="94.615" size="1.778" layer="96" rot="MR180"/>
+</instance>
+<instance part="SUPPLY16" gate="GND" x="160.02" y="-27.94" smashed="yes" rot="MR270">
+<attribute name="VALUE" x="163.195" y="-27.305" size="1.778" layer="96" rot="MR180"/>
+</instance>
+<instance part="FID1" gate="G$1" x="302.26" y="73.66"/>
+<instance part="FID2" gate="G$1" x="302.26" y="81.28"/>
+<instance part="FID3" gate="G$1" x="302.26" y="88.9"/>
+<instance part="FID4" gate="G$1" x="309.88" y="88.9"/>
+<instance part="FID5" gate="G$1" x="309.88" y="81.28"/>
+<instance part="FID6" gate="G$1" x="309.88" y="73.66"/>
+<instance part="FID7" gate="G$1" x="287.02" y="73.66"/>
+<instance part="FID8" gate="G$1" x="287.02" y="81.28"/>
+<instance part="FID9" gate="G$1" x="287.02" y="88.9"/>
+<instance part="FID10" gate="G$1" x="294.64" y="88.9"/>
+<instance part="FID11" gate="G$1" x="294.64" y="81.28"/>
+<instance part="FID12" gate="G$1" x="294.64" y="73.66"/>
+<instance part="FID13" gate="G$1" x="317.5" y="88.9"/>
+<instance part="FID14" gate="G$1" x="317.5" y="81.28"/>
+<instance part="FID15" gate="G$1" x="317.5" y="73.66"/>
+</instances>
+<busses>
+<bus name="FMC_D[0..31],FMC_A[0..19],FMC_NE1,FMC_NOE,FMC_NWE,FMC_NL,FMC_NWAIT">
+<segment>
+<wire x1="60.96" y1="99.06" x2="60.96" y2="-40.64" width="0.762" layer="92"/>
+<label x="55.88" y="101.6" size="1.778" layer="95"/>
+<wire x1="60.96" y1="-40.64" x2="185.42" y2="-40.64" width="0.762" layer="92"/>
+<wire x1="185.42" y1="-40.64" x2="185.42" y2="73.66" width="0.762" layer="92"/>
+</segment>
+</bus>
+<bus name="FMC_A[20..21],DIGITIZED">
+<segment>
+<wire x1="195.58" y1="45.72" x2="195.58" y2="40.64" width="0.762" layer="92"/>
+<label x="200.66" y="30.48" size="1.778" layer="95" rot="R90"/>
+</segment>
+<segment>
+<wire x1="195.58" y1="10.16" x2="195.58" y2="5.08" width="0.762" layer="92"/>
+<label x="200.66" y="-2.54" size="1.778" layer="95" rot="R90"/>
+</segment>
+<segment>
+<wire x1="55.88" y1="22.86" x2="55.88" y2="17.78" width="0.762" layer="92"/>
+<label x="53.34" y="7.62" size="1.778" layer="95" rot="R90"/>
+</segment>
+</bus>
+</busses>
+<nets>
+<net name="GND" class="1">
+<segment>
+<wire x1="149.86" y1="73.66" x2="157.48" y2="73.66" width="0.1524" layer="91"/>
+<pinref part="SUPPLY2" gate="GND" pin="GND"/>
+<pinref part="CON1" gate="G$1" pin="GND at 7"/>
+</segment>
+<segment>
+<wire x1="309.88" y1="125.73" x2="313.69" y2="125.73" width="0.1524" layer="91"/>
+<label x="309.88" y="128.27" size="1.778" layer="95" rot="R180"/>
+<pinref part="JP1" gate="G$1" pin="1"/>
+</segment>
+<segment>
+<pinref part="JP2" gate="G$1" pin="1"/>
+<wire x1="313.69" y1="53.34" x2="309.88" y2="53.34" width="0.1524" layer="91"/>
+<label x="303.53" y="53.34" size="1.778" layer="95"/>
+</segment>
+<segment>
+<pinref part="SUPPLY7" gate="GND" pin="GND"/>
+<pinref part="CON1" gate="G$1" pin="GUIDE at L"/>
+<wire x1="157.48" y1="91.44" x2="149.86" y2="91.44" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="CON1" gate="G$1" pin="GUIDE at R"/>
+<pinref part="SUPPLY16" gate="GND" pin="GND"/>
+<wire x1="149.86" y1="-27.94" x2="157.48" y2="-27.94" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="5V" class="0">
+<segment>
+<pinref part="JP2" gate="G$1" pin="3"/>
+<wire x1="313.69" y1="48.26" x2="309.88" y2="48.26" width="0.1524" layer="91"/>
+<label x="306.07" y="48.26" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="3V3" class="0">
+<segment>
+<pinref part="JP2" gate="G$1" pin="2"/>
+<wire x1="313.69" y1="50.8" x2="309.88" y2="50.8" width="0.1524" layer="91"/>
+<label x="304.8" y="50.8" size="1.778" layer="95"/>
+</segment>
+<segment>
+<pinref part="JP1" gate="G$1" pin="3"/>
+<wire x1="313.69" y1="120.65" x2="309.88" y2="120.65" width="0.1524" layer="91"/>
+<label x="309.88" y="121.92" size="1.778" layer="95" rot="R180"/>
+</segment>
+</net>
+<net name="DIGITIZED" class="0">
+<segment>
+<wire x1="313.69" y1="123.19" x2="309.88" y2="123.19" width="0.1524" layer="91"/>
+<pinref part="JP1" gate="G$1" pin="2"/>
+<label x="309.88" y="124.46" size="1.778" layer="95" rot="R180"/>
+</segment>
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_DX18"/>
+<wire x1="91.44" y1="20.32" x2="55.88" y2="20.32" width="0.1524" layer="91"/>
+<label x="63.5" y="20.32" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="P-5.0V_MAIN" class="0">
+<segment>
+<pinref part="CON1" gate="G$1" pin="P-5.0V_MAIN at 36"/>
+<pinref part="CON1" gate="G$1" pin="P-5.0V_MAIN at 37"/>
+<junction x="149.86" y="78.74"/>
+<wire x1="149.86" y1="78.74" x2="149.86" y2="76.2" width="0.1524" layer="91"/>
+<pinref part="CON1" gate="G$1" pin="P-5.0V_MAIN at 38"/>
+<pinref part="CON1" gate="G$1" pin="P-5.0V_MAIN at 40"/>
+<wire x1="149.86" y1="86.36" x2="149.86" y2="83.82" width="0.1524" layer="91"/>
+<pinref part="CON1" gate="G$1" pin="P-5.0V_MAIN at 39"/>
+<junction x="149.86" y="83.82"/>
+<wire x1="149.86" y1="83.82" x2="149.86" y2="81.28" width="0.1524" layer="91"/>
+<wire x1="149.86" y1="81.28" x2="149.86" y2="78.74" width="0.1524" layer="91"/>
+<junction x="149.86" y="81.28"/>
+<wire x1="149.86" y1="81.28" x2="172.72" y2="81.28" width="0.1524" layer="91"/>
+<label x="172.72" y="81.28" size="1.778" layer="95" xref="yes"/>
+</segment>
+</net>
+<net name="MINUS15V_STABLE" class="0">
+<segment>
+<wire x1="313.69" y1="118.11" x2="309.88" y2="118.11" width="0.1524" layer="91"/>
+<pinref part="JP1" gate="G$1" pin="4"/>
+<label x="309.88" y="119.38" size="1.778" layer="95" rot="R180"/>
+</segment>
+</net>
+<net name="FMC_CLK" class="0">
+<segment>
+<wire x1="93.98" y1="27.94" x2="55.88" y2="27.94" width="0.1524" layer="91"/>
+<label x="55.88" y="27.94" size="1.27" layer="95" rot="R90" xref="yes"/>
+<pinref part="CON1" gate="G$1" pin="F_LVDS_CK0_N"/>
+</segment>
+</net>
+<net name="FMC_D0" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_DX8"/>
+<wire x1="93.98" y1="-7.62" x2="60.96" y2="-7.62" width="0.1524" layer="91"/>
+<label x="63.5" y="-7.62" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D1" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS14_N"/>
+<wire x1="93.98" y1="-12.7" x2="60.96" y2="-12.7" width="0.1524" layer="91"/>
+<label x="63.5" y="-12.7" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D13" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_DX0"/>
+<wire x1="149.86" y1="-22.86" x2="185.42" y2="-22.86" width="0.1524" layer="91"/>
+<label x="172.72" y="-22.86" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D14" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_DX3"/>
+<wire x1="149.86" y1="-20.32" x2="185.42" y2="-20.32" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D15" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_DX2"/>
+<wire x1="149.86" y1="-17.78" x2="185.42" y2="-17.78" width="0.1524" layer="91"/>
+<label x="172.72" y="-20.32" size="1.27" layer="95"/>
+<label x="172.72" y="-17.78" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D22" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS13_N"/>
+<wire x1="93.98" y1="0" x2="60.96" y2="0" width="0.1524" layer="91"/>
+<label x="63.5" y="0" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D23" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_DX16"/>
+<wire x1="93.98" y1="2.54" x2="60.96" y2="2.54" width="0.1524" layer="91"/>
+<label x="63.5" y="2.54" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D24" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS12_P"/>
+<wire x1="93.98" y1="5.08" x2="60.96" y2="5.08" width="0.1524" layer="91"/>
+<label x="63.5" y="5.08" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D25" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS12_N"/>
+<wire x1="93.98" y1="7.62" x2="60.96" y2="7.62" width="0.1524" layer="91"/>
+<label x="63.5" y="7.62" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D26" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS10_P"/>
+<wire x1="93.98" y1="12.7" x2="60.96" y2="12.7" width="0.1524" layer="91"/>
+<label x="63.5" y="12.7" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A12" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_DX5"/>
+<wire x1="93.98" y1="-22.86" x2="60.96" y2="-22.86" width="0.1524" layer="91"/>
+<label x="63.5" y="-22.86" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A13" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_DX4"/>
+<wire x1="93.98" y1="-20.32" x2="60.96" y2="-20.32" width="0.1524" layer="91"/>
+<label x="63.5" y="-20.32" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A14" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="DDC_SCL"/>
+<wire x1="93.98" y1="-17.78" x2="60.96" y2="-17.78" width="0.1524" layer="91"/>
+<label x="63.5" y="-17.78" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A16" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_DX11"/>
+<wire x1="149.86" y1="-15.24" x2="185.42" y2="-15.24" width="0.1524" layer="91"/>
+<label x="172.72" y="-15.24" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A17" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="DDC_SDA"/>
+<wire x1="149.86" y1="-12.7" x2="185.42" y2="-12.7" width="0.1524" layer="91"/>
+<label x="172.72" y="-12.7" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A18" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS11_P"/>
+<wire x1="149.86" y1="-7.62" x2="185.42" y2="-7.62" width="0.1524" layer="91"/>
+<label x="172.72" y="-7.62" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_NL" class="0">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS5_N"/>
+<wire x1="93.98" y1="50.8" x2="60.96" y2="50.8" width="0.1524" layer="91"/>
+<label x="63.5" y="50.8" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D28" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS6_N"/>
+<wire x1="93.98" y1="53.34" x2="60.96" y2="53.34" width="0.1524" layer="91"/>
+<label x="63.5" y="53.34" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D29" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS6_P"/>
+<wire x1="93.98" y1="55.88" x2="60.96" y2="55.88" width="0.1524" layer="91"/>
+<label x="63.5" y="55.88" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D27" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS8_P"/>
+<wire x1="93.98" y1="40.64" x2="60.96" y2="40.64" width="0.1524" layer="91"/>
+<label x="63.5" y="40.64" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D3" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS9_P"/>
+<wire x1="93.98" y1="33.02" x2="60.96" y2="33.02" width="0.1524" layer="91"/>
+<label x="63.5" y="33.02" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_NOE" class="0">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS_CK0_P"/>
+<wire x1="93.98" y1="25.4" x2="60.96" y2="25.4" width="0.1524" layer="91"/>
+<label x="63.5" y="25.4" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_NWE" class="0">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS10_N"/>
+<wire x1="93.98" y1="15.24" x2="60.96" y2="15.24" width="0.1524" layer="91"/>
+<label x="63.5" y="15.24" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_NWAIT" class="0">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS8_N"/>
+<wire x1="93.98" y1="43.18" x2="60.96" y2="43.18" width="0.1524" layer="91"/>
+<label x="63.5" y="43.18" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A19" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS3_N"/>
+<wire x1="93.98" y1="60.96" x2="60.96" y2="60.96" width="0.1524" layer="91"/>
+<label x="63.5" y="60.96" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A20" class="0">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_DX17"/>
+<wire x1="152.4" y1="7.62" x2="193.04" y2="7.62" width="0.1524" layer="91"/>
+<label x="172.72" y="7.62" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A21" class="0">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_DX14"/>
+<wire x1="152.4" y1="43.18" x2="195.58" y2="43.18" width="0.1524" layer="91"/>
+<label x="172.72" y="43.18" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D30" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS3_P"/>
+<wire x1="93.98" y1="63.5" x2="60.96" y2="63.5" width="0.1524" layer="91"/>
+<label x="63.5" y="63.5" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D31" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS7_P"/>
+<wire x1="93.98" y1="68.58" x2="60.96" y2="68.58" width="0.1524" layer="91"/>
+<label x="63.5" y="68.58" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A0" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS7_N"/>
+<wire x1="93.98" y1="71.12" x2="60.96" y2="71.12" width="0.1524" layer="91"/>
+<label x="63.5" y="71.12" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A1" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_DX15"/>
+<wire x1="93.98" y1="76.2" x2="60.96" y2="76.2" width="0.1524" layer="91"/>
+<label x="63.5" y="76.2" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A2" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_DX7"/>
+<wire x1="93.98" y1="78.74" x2="60.96" y2="78.74" width="0.1524" layer="91"/>
+<label x="63.5" y="78.74" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A3" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_DX12"/>
+<wire x1="93.98" y1="81.28" x2="60.96" y2="81.28" width="0.1524" layer="91"/>
+<label x="63.5" y="81.28" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A4" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_DX6"/>
+<wire x1="93.98" y1="83.82" x2="60.96" y2="83.82" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A5" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_DX13"/>
+<wire x1="93.98" y1="86.36" x2="60.96" y2="86.36" width="0.1524" layer="91"/>
+<label x="63.5" y="86.36" size="1.27" layer="95"/>
+<label x="63.5" y="83.82" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A6" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDSA_N"/>
+<wire x1="149.86" y1="71.12" x2="185.42" y2="71.12" width="0.1524" layer="91"/>
+<label x="172.72" y="71.12" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A7" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDSA_P"/>
+<wire x1="149.86" y1="68.58" x2="185.42" y2="68.58" width="0.1524" layer="91"/>
+<label x="172.72" y="68.58" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A8" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS2_P"/>
+<wire x1="149.86" y1="66.04" x2="185.42" y2="66.04" width="0.1524" layer="91"/>
+<label x="172.72" y="66.04" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A9" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS2_N"/>
+<wire x1="149.86" y1="63.5" x2="185.42" y2="63.5" width="0.1524" layer="91"/>
+<label x="172.72" y="63.5" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A10" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS1_N"/>
+<wire x1="149.86" y1="58.42" x2="185.42" y2="58.42" width="0.1524" layer="91"/>
+<label x="172.72" y="58.42" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A11" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS1_P"/>
+<wire x1="149.86" y1="55.88" x2="185.42" y2="55.88" width="0.1524" layer="91"/>
+<label x="172.72" y="55.88" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D4" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS4_N"/>
+<wire x1="149.86" y1="50.8" x2="185.42" y2="50.8" width="0.1524" layer="91"/>
+<label x="172.72" y="50.8" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D20" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS11_N"/>
+<wire x1="149.86" y1="-5.08" x2="185.42" y2="-5.08" width="0.1524" layer="91"/>
+<label x="172.72" y="-5.08" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D19" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_DX1"/>
+<wire x1="149.86" y1="-2.54" x2="185.42" y2="-2.54" width="0.1524" layer="91"/>
+<label x="172.72" y="-2.54" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D18" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDSC_N"/>
+<wire x1="149.86" y1="0" x2="185.42" y2="0" width="0.1524" layer="91"/>
+<label x="172.72" y="0" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D17" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDSC_P"/>
+<wire x1="149.86" y1="2.54" x2="185.42" y2="2.54" width="0.1524" layer="91"/>
+<label x="172.72" y="2.54" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D16" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDSB_N"/>
+<wire x1="149.86" y1="12.7" x2="185.42" y2="12.7" width="0.1524" layer="91"/>
+<label x="172.72" y="12.7" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D12" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDSB_P"/>
+<wire x1="149.86" y1="15.24" x2="185.42" y2="15.24" width="0.1524" layer="91"/>
+<label x="172.72" y="15.24" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D11" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS15_P"/>
+<wire x1="149.86" y1="20.32" x2="185.42" y2="20.32" width="0.1524" layer="91"/>
+<label x="172.72" y="20.32" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D10" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS15_N"/>
+<wire x1="149.86" y1="22.86" x2="185.42" y2="22.86" width="0.1524" layer="91"/>
+<label x="172.72" y="22.86" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D9" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS0_P"/>
+<wire x1="149.86" y1="27.94" x2="185.42" y2="27.94" width="0.1524" layer="91"/>
+<label x="172.72" y="27.94" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D8" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS0_N"/>
+<wire x1="149.86" y1="30.48" x2="185.42" y2="30.48" width="0.1524" layer="91"/>
+<label x="172.72" y="30.48" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D7" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS_CK1_P"/>
+<wire x1="149.86" y1="35.56" x2="185.42" y2="35.56" width="0.1524" layer="91"/>
+<label x="172.72" y="35.56" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D6" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS_CK1_N"/>
+<wire x1="149.86" y1="38.1" x2="185.42" y2="38.1" width="0.1524" layer="91"/>
+<label x="172.72" y="38.1" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D5" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS4_P"/>
+<wire x1="149.86" y1="48.26" x2="185.42" y2="48.26" width="0.1524" layer="91"/>
+<label x="172.72" y="48.26" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D21" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS13_P"/>
+<wire x1="93.98" y1="-2.54" x2="60.96" y2="-2.54" width="0.1524" layer="91"/>
+<label x="63.5" y="-2.54" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_A15" class="3">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS14_P"/>
+<wire x1="93.98" y1="-15.24" x2="60.96" y2="-15.24" width="0.1524" layer="91"/>
+<label x="63.5" y="-15.24" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_D2" class="2">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS9_N"/>
+<wire x1="93.98" y1="35.56" x2="60.96" y2="35.56" width="0.1524" layer="91"/>
+<label x="63.5" y="35.56" size="1.27" layer="95"/>
+</segment>
+</net>
+<net name="FMC_NE1" class="0">
+<segment>
+<pinref part="CON1" gate="G$1" pin="F_LVDS5_P"/>
+<wire x1="93.98" y1="48.26" x2="60.96" y2="48.26" width="0.1524" layer="91"/>
+<label x="63.5" y="48.26" size="1.27" layer="95"/>
+</segment>
+</net>
+</nets>
+</sheet>
+<sheet>
+<description>Power</description>
+<plain>
+<text x="-114.3" y="34.29" size="3.81" layer="91">VCC 3.3V regulator</text>
+<text x="-2.54" y="35.56" size="3.81" layer="91">DC/DC converter producing -15v for Noise source</text>
+<text x="81.28" y="-11.43" size="1.778" layer="91">Lowpass filter</text>
+<text x="55.88" y="-11.43" size="1.778" layer="91">LC filter</text>
+<text x="93.98" y="-88.9" size="2.54" layer="91">Optionally power whole board
+using micro USB connector</text>
+<text x="-50.8" y="11.43" size="1.778" layer="91">Output cap should
+be X7R with ESR
+between 5-500 mOhm. </text>
+</plain>
+<instances>
+<instance part="USB_PWR" gate="G$1" x="121.92" y="-104.14"/>
+<instance part="SUPPLY11" gate="GND" x="-99.06" y="-10.16" rot="MR0"/>
+<instance part="P+2" gate="VCC" x="-58.42" y="27.94"/>
+<instance part="U1" gate="A" x="-81.28" y="12.7"/>
+<instance part="C8" gate="G$1" x="-63.5" y="-5.08" smashed="yes" rot="R180">
+<attribute name="NAME" x="-60.96" y="-3.81" size="1.27" layer="95"/>
+<attribute name="VALUE" x="-62.23" y="-7.62" size="1.27" layer="96"/>
+</instance>
+<instance part="C10" gate="G$1" x="-106.68" y="10.16" smashed="yes">
+<attribute name="NAME" x="-109.22" y="16.51" size="1.27" layer="95" rot="R270"/>
+<attribute name="VALUE" x="-104.14" y="15.24" size="1.27" layer="96" rot="R270"/>
+</instance>
+<instance part="C7" gate="G$1" x="-58.42" y="11.43" smashed="yes">
+<attribute name="NAME" x="-60.96" y="11.43" size="1.27" layer="95" rot="R90"/>
+<attribute name="VALUE" x="-55.88" y="6.35" size="1.27" layer="96" rot="R90"/>
+</instance>
+<instance part="SUPPLY14" gate="GND" x="-63.5" y="-11.43" rot="MR0"/>
+<instance part="SUPPLY17" gate="GND" x="-58.42" y="2.54" rot="MR0"/>
+<instance part="SUPPLY1" gate="GND" x="38.1" y="0"/>
+<instance part="R3" gate="G$1" x="135.89" y="15.24" rot="R90"/>
+<instance part="SUPPLY3" gate="GND" x="135.89" y="-5.08"/>
+<instance part="IC2" gate="G$1" x="25.4" y="17.78"/>
+<instance part="SUPPLY9" gate="GND" x="48.26" y="12.7"/>
+<instance part="P+3" gate="VCC" x="40.64" y="20.32" smashed="yes">
+<attribute name="VALUE" x="43.18" y="22.86" size="1.778" layer="96" rot="R180"/>
+</instance>
+<instance part="C11" gate="A" x="0" y="22.86" rot="R270"/>
+<instance part="C9" gate="A" x="48.26" y="17.78" rot="R90"/>
+<instance part="ORANGE" gate="G$1" x="135.89" y="2.54" rot="R180"/>
+<instance part="IC1" gate="G$1" x="93.98" y="17.78"/>
+<instance part="SUPPLY12" gate="GND" x="116.84" y="12.7"/>
+<instance part="P+4" gate="VCC" x="109.22" y="20.32" smashed="yes">
+<attribute name="VALUE" x="111.76" y="22.86" size="1.778" layer="96" rot="R180"/>
+</instance>
+<instance part="C5" gate="A" x="68.58" y="22.86" rot="R270"/>
+<instance part="C1" gate="A" x="116.84" y="17.78" rot="R90">
+<attribute name="OC_FARNELL" x="116.84" y="17.78" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="C6" gate="G$1" x="66.04" y="-26.67" smashed="yes">
+<attribute name="NAME" x="69.85" y="-24.13" size="1.6764" layer="95"/>
+<attribute name="VALUE" x="69.85" y="-26.67" size="1.6764" layer="96"/>
+</instance>
+<instance part="C4" gate="G$1" x="95.25" y="-26.67" smashed="yes">
+<attribute name="NAME" x="99.06" y="-24.13" size="1.6764" layer="95"/>
+<attribute name="VALUE" x="99.06" y="-26.67" size="1.6764" layer="96"/>
+</instance>
+<instance part="R6" gate="G$1" x="83.82" y="-16.51" rot="R180"/>
+<instance part="SUPPLY13" gate="GND" x="66.04" y="-33.02"/>
+<instance part="SUPPLY15" gate="GND" x="95.25" y="-33.02"/>
+<instance part="L1" gate="G$1" x="58.42" y="-16.51"/>
+<instance part="SJ1" gate="G$1" x="106.68" y="-16.51" rot="R180"/>
+<instance part="FRAME6" gate="G$1" x="-198.12" y="-142.24"/>
+<instance part="SUPPLY58" gate="GND" x="109.22" y="-109.22"/>
+<instance part="D2" gate="G$1" x="-147.32" y="17.78" rot="R270"/>
+<instance part="C12" gate="G$1" x="-124.46" y="7.62" smashed="yes">
+<attribute name="NAME" x="-127" y="6.35" size="1.6764" layer="95" rot="R90"/>
+<attribute name="VALUE" x="-119.38" y="-5.08" size="1.6764" layer="96" rot="R90"/>
+</instance>
+<instance part="SUPPLY5" gate="GND" x="-124.46" y="-2.54" rot="MR0"/>
+<instance part="L2" gate="G$1" x="-134.62" y="17.78"/>
+</instances>
+<busses>
+</busses>
+<nets>
+<net name="GND" class="1">
+<segment>
+<pinref part="SUPPLY11" gate="GND" pin="GND"/>
+<wire x1="-96.52" y1="5.08" x2="-99.06" y2="5.08" width="0.1524" layer="91"/>
+<wire x1="-99.06" y1="5.08" x2="-99.06" y2="-7.62" width="0.1524" layer="91"/>
+<pinref part="U1" gate="A" pin="GND"/>
+<pinref part="C10" gate="G$1" pin="P$2"/>
+<wire x1="-106.68" y1="5.08" x2="-99.06" y2="5.08" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="7.62" x2="-106.68" y2="5.08" width="0.1524" layer="91"/>
+<junction x="-99.06" y="5.08"/>
+</segment>
+<segment>
+<pinref part="C7" gate="G$1" pin="P$2"/>
+<pinref part="SUPPLY17" gate="GND" pin="GND"/>
+<wire x1="-58.42" y1="5.08" x2="-58.42" y2="8.89" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="SUPPLY14" gate="GND" pin="GND"/>
+<pinref part="C8" gate="G$1" pin="1"/>
+<wire x1="-63.5" y1="-8.89" x2="-63.5" y2="-7.62" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="SUPPLY1" gate="GND" pin="GND"/>
+<wire x1="38.1" y1="10.16" x2="38.1" y2="2.54" width="0.1524" layer="91"/>
+<pinref part="IC2" gate="G$1" pin="GND"/>
+</segment>
+<segment>
+<pinref part="C9" gate="A" pin="1"/>
+<pinref part="SUPPLY9" gate="GND" pin="GND"/>
+<wire x1="48.26" y1="17.78" x2="48.26" y2="15.24" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="SUPPLY3" gate="GND" pin="GND"/>
+<wire x1="135.89" y1="0" x2="135.89" y2="-2.54" width="0.1524" layer="91"/>
+<pinref part="ORANGE" gate="G$1" pin="A"/>
+</segment>
+<segment>
+<pinref part="C1" gate="A" pin="1"/>
+<pinref part="SUPPLY12" gate="GND" pin="GND"/>
+<wire x1="116.84" y1="17.78" x2="116.84" y2="15.24" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="C6" gate="G$1" pin="P$2"/>
+<pinref part="SUPPLY13" gate="GND" pin="GND"/>
+<wire x1="66.04" y1="-29.21" x2="66.04" y2="-30.48" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="C4" gate="G$1" pin="P$2"/>
+<pinref part="SUPPLY15" gate="GND" pin="GND"/>
+<wire x1="95.25" y1="-29.21" x2="95.25" y2="-30.48" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="USB_PWR" gate="G$1" pin="GND"/>
+<wire x1="119.38" y1="-104.14" x2="109.22" y2="-104.14" width="0.1524" layer="91"/>
+<pinref part="SUPPLY58" gate="GND" pin="GND"/>
+<wire x1="109.22" y1="-104.14" x2="109.22" y2="-106.68" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="C12" gate="G$1" pin="P$2"/>
+<wire x1="-124.46" y1="5.08" x2="-124.46" y2="0" width="0.1524" layer="91"/>
+<pinref part="SUPPLY5" gate="GND" pin="GND"/>
+</segment>
+</net>
+<net name="5V" class="0">
+<segment>
+<pinref part="IC2" gate="G$1" pin="V+"/>
+<wire x1="38.1" y1="15.24" x2="40.64" y2="15.24" width="0.1524" layer="91"/>
+<wire x1="40.64" y1="15.24" x2="40.64" y2="17.78" width="0.1524" layer="91"/>
+<pinref part="P+3" gate="VCC" pin="VCC"/>
+</segment>
+<segment>
+<pinref part="IC1" gate="G$1" pin="V+"/>
+<wire x1="106.68" y1="15.24" x2="109.22" y2="15.24" width="0.1524" layer="91"/>
+<wire x1="109.22" y1="15.24" x2="109.22" y2="17.78" width="0.1524" layer="91"/>
+<pinref part="P+4" gate="VCC" pin="VCC"/>
+</segment>
+<segment>
+<label x="-116.84" y="20.32" size="1.778" layer="95"/>
+<pinref part="C12" gate="G$1" pin="P$1"/>
+<wire x1="-124.46" y1="12.7" x2="-124.46" y2="17.78" width="0.1524" layer="91"/>
+<wire x1="-96.52" y1="17.78" x2="-99.06" y2="17.78" width="0.1524" layer="91"/>
+<wire x1="-99.06" y1="17.78" x2="-106.68" y2="17.78" width="0.1524" layer="91"/>
+<junction x="-99.06" y="17.78"/>
+<pinref part="U1" gate="A" pin="VIN"/>
+<pinref part="U1" gate="A" pin="VEN"/>
+<wire x1="-96.52" y1="12.7" x2="-99.06" y2="12.7" width="0.1524" layer="91"/>
+<wire x1="-99.06" y1="12.7" x2="-99.06" y2="17.78" width="0.1524" layer="91"/>
+<pinref part="C10" gate="G$1" pin="P$1"/>
+<wire x1="-106.68" y1="15.24" x2="-106.68" y2="17.78" width="0.1524" layer="91"/>
+<wire x1="-124.46" y1="17.78" x2="-106.68" y2="17.78" width="0.1524" layer="91"/>
+<junction x="-106.68" y="17.78"/>
+<pinref part="L2" gate="G$1" pin="2"/>
+<wire x1="-129.54" y1="17.78" x2="-124.46" y2="17.78" width="0.1524" layer="91"/>
+<junction x="-124.46" y="17.78"/>
+</segment>
+</net>
+<net name="3V3" class="0">
+<segment>
+<label x="-53.34" y="22.86" size="1.778" layer="95" rot="MR0"/>
+<wire x1="-58.42" y1="25.4" x2="-58.42" y2="17.78" width="0.1524" layer="91"/>
+<wire x1="-58.42" y1="17.78" x2="-66.04" y2="17.78" width="0.1524" layer="91"/>
+<junction x="-58.42" y="17.78"/>
+<pinref part="P+2" gate="VCC" pin="VCC"/>
+<pinref part="U1" gate="A" pin="VOUT"/>
+<pinref part="C7" gate="G$1" pin="P$1"/>
+<wire x1="-58.42" y1="16.51" x2="-58.42" y2="17.78" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$8" class="0">
+<segment>
+<pinref part="U1" gate="A" pin="BYPASS"/>
+<pinref part="C8" gate="G$1" pin="2"/>
+<wire x1="-66.04" y1="5.08" x2="-63.5" y2="5.08" width="0.1524" layer="91"/>
+<wire x1="-63.5" y1="5.08" x2="-63.5" y2="0" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="MINUS15V" class="0">
+<segment>
+<label x="118.11" y="27.94" size="1.778" layer="95"/>
+<pinref part="R3" gate="G$1" pin="2"/>
+<wire x1="135.89" y1="25.4" x2="139.7" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="135.89" y1="20.32" x2="135.89" y2="25.4" width="0.1524" layer="91"/>
+<junction x="135.89" y="25.4"/>
+<pinref part="IC1" gate="G$1" pin="VOUT"/>
+<pinref part="C1" gate="A" pin="2"/>
+<wire x1="106.68" y1="25.4" x2="116.84" y2="25.4" width="0.1524" layer="91"/>
+<junction x="116.84" y="25.4"/>
+<wire x1="135.89" y1="25.4" x2="116.84" y2="25.4" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<wire x1="48.26" y1="-16.51" x2="53.34" y2="-16.51" width="0.1524" layer="91"/>
+<pinref part="L1" gate="G$1" pin="1"/>
+<label x="40.64" y="-13.97" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="N$7" class="0">
+<segment>
+<pinref part="R3" gate="G$1" pin="1"/>
+<wire x1="135.89" y1="7.62" x2="135.89" y2="10.16" width="0.1524" layer="91"/>
+<pinref part="ORANGE" gate="G$1" pin="C"/>
+</segment>
+</net>
+<net name="N$2" class="0">
+<segment>
+<pinref part="IC2" gate="G$1" pin="CAP-"/>
+<wire x1="10.16" y1="15.24" x2="0" y2="15.24" width="0.1524" layer="91"/>
+<pinref part="C11" gate="A" pin="2"/>
+</segment>
+</net>
+<net name="N$3" class="0">
+<segment>
+<pinref part="IC2" gate="G$1" pin="CAP+"/>
+<wire x1="10.16" y1="20.32" x2="7.62" y2="20.32" width="0.1524" layer="91"/>
+<wire x1="7.62" y1="20.32" x2="7.62" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="7.62" y1="25.4" x2="0" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="0" y1="25.4" x2="0" y2="22.86" width="0.1524" layer="91"/>
+<pinref part="C11" gate="A" pin="1"/>
+</segment>
+</net>
+<net name="MINUS5V" class="0">
+<segment>
+<pinref part="IC2" gate="G$1" pin="VOUT"/>
+<pinref part="C9" gate="A" pin="2"/>
+<wire x1="38.1" y1="25.4" x2="48.26" y2="25.4" width="0.1524" layer="91"/>
+<junction x="48.26" y="25.4"/>
+<wire x1="48.26" y1="25.4" x2="60.96" y2="25.4" width="0.1524" layer="91"/>
+<label x="48.26" y="27.94" size="1.778" layer="95"/>
+<wire x1="60.96" y1="-2.54" x2="109.22" y2="-2.54" width="0.1524" layer="91"/>
+<wire x1="109.22" y1="-2.54" x2="109.22" y2="10.16" width="0.1524" layer="91"/>
+<pinref part="IC1" gate="G$1" pin="GND"/>
+<wire x1="109.22" y1="10.16" x2="106.68" y2="10.16" width="0.1524" layer="91"/>
+<wire x1="60.96" y1="-2.54" x2="60.96" y2="25.4" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$1" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="CAP-"/>
+<wire x1="78.74" y1="15.24" x2="68.58" y2="15.24" width="0.1524" layer="91"/>
+<pinref part="C5" gate="A" pin="2"/>
+</segment>
+</net>
+<net name="N$9" class="0">
+<segment>
+<pinref part="IC1" gate="G$1" pin="CAP+"/>
+<wire x1="78.74" y1="20.32" x2="76.2" y2="20.32" width="0.1524" layer="91"/>
+<wire x1="76.2" y1="20.32" x2="76.2" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="76.2" y1="25.4" x2="68.58" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="68.58" y1="25.4" x2="68.58" y2="22.86" width="0.1524" layer="91"/>
+<pinref part="C5" gate="A" pin="1"/>
+</segment>
+</net>
+<net name="MINUS15V_STABLE" class="0">
+<segment>
+<pinref part="SJ1" gate="G$1" pin="1"/>
+<wire x1="111.76" y1="-16.51" x2="115.57" y2="-16.51" width="0.1524" layer="91"/>
+<label x="115.57" y="-16.51" size="1.778" layer="95" xref="yes"/>
+</segment>
+</net>
+<net name="N$11" class="0">
+<segment>
+<pinref part="C6" gate="G$1" pin="P$1"/>
+<wire x1="66.04" y1="-21.59" x2="66.04" y2="-16.51" width="0.1524" layer="91"/>
+<wire x1="66.04" y1="-16.51" x2="63.5" y2="-16.51" width="0.1524" layer="91"/>
+<pinref part="R6" gate="G$1" pin="2"/>
+<wire x1="78.74" y1="-16.51" x2="66.04" y2="-16.51" width="0.1524" layer="91"/>
+<junction x="66.04" y="-16.51"/>
+<pinref part="L1" gate="G$1" pin="2"/>
+</segment>
+</net>
+<net name="N$6" class="0">
+<segment>
+<pinref part="R6" gate="G$1" pin="1"/>
+<pinref part="SJ1" gate="G$1" pin="2"/>
+<wire x1="88.9" y1="-16.51" x2="95.25" y2="-16.51" width="0.1524" layer="91"/>
+<pinref part="C4" gate="G$1" pin="P$1"/>
+<wire x1="95.25" y1="-16.51" x2="101.6" y2="-16.51" width="0.1524" layer="91"/>
+<wire x1="95.25" y1="-21.59" x2="95.25" y2="-16.51" width="0.1524" layer="91"/>
+<junction x="95.25" y="-16.51"/>
+</segment>
+</net>
+<net name="P-5.0V_MAIN" class="0">
+<segment>
+<wire x1="-147.32" y1="10.16" x2="-162.56" y2="10.16" width="0.1524" layer="91"/>
+<label x="-162.56" y="10.16" size="1.778" layer="95" rot="R180" xref="yes"/>
+<pinref part="D2" gate="G$1" pin="A2"/>
+<wire x1="-147.32" y1="10.16" x2="-147.32" y2="12.7" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="USB_PWR_VBUS" class="0">
+<segment>
+<pinref part="USB_PWR" gate="G$1" pin="VBUS"/>
+<wire x1="119.38" y1="-101.6" x2="109.22" y2="-101.6" width="0.1524" layer="91"/>
+<label x="109.22" y="-101.6" size="1.778" layer="95" rot="R180" xref="yes"/>
+</segment>
+<segment>
+<wire x1="-147.32" y1="25.4" x2="-162.56" y2="25.4" width="0.1524" layer="91"/>
+<label x="-162.56" y="25.4" size="1.778" layer="95" rot="R180" xref="yes"/>
+<pinref part="D2" gate="G$1" pin="A1"/>
+<wire x1="-147.32" y1="25.4" x2="-147.32" y2="22.86" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$14" class="0">
+<segment>
+<pinref part="D2" gate="G$1" pin="CC"/>
+<pinref part="L2" gate="G$1" pin="1"/>
+<wire x1="-144.78" y1="17.78" x2="-139.7" y2="17.78" width="0.1524" layer="91"/>
+</segment>
+</net>
+</nets>
+</sheet>
+<sheet>
+<description>Noise source</description>
+<plain>
+<text x="66.04" y="63.5" size="3.81" layer="91">Digitizer</text>
+<text x="-147.32" y="63.5" size="3.81" layer="91">Noise generator</text>
+<text x="-118.11" y="1.27" size="1.778" layer="91" rot="R90">Noisy diode</text>
+<text x="-55.88" y="63.5" size="3.81" layer="91">Amplifier</text>
+<text x="-147.32" y="-35.56" size="1.778" layer="91">AGND is connected to GND on the board using polygons
+(found no other good way) - not visible in schematics.</text>
+</plain>
+<instances>
+<instance part="C13" gate="G$1" x="55.88" y="22.86" smashed="yes" rot="R180">
+<attribute name="NAME" x="53.34" y="20.32" size="1.778" layer="95" rot="R270"/>
+<attribute name="VALUE" x="58.42" y="27.94" size="1.778" layer="96" rot="R270"/>
+</instance>
+<instance part="U2" gate="A" x="81.28" y="30.48"/>
+<instance part="P+1" gate="VCC" x="60.96" y="55.88"/>
+<instance part="SUPPLY4" gate="GND" x="60.96" y="5.08"/>
+<instance part="T3" gate="G$1" x="-114.3" y="6.35" smashed="yes" rot="R180">
+<attribute name="NAME" x="-110.49" y="3.81" size="1.778" layer="95" rot="R180"/>
+<attribute name="VALUE" x="-116.84" y="-1.27" size="1.778" layer="96"/>
+</instance>
+<instance part="T2" gate="G$1" x="-99.06" y="6.35" smashed="yes">
+<attribute name="NAME" x="-96.52" y="8.89" size="1.778" layer="95"/>
+<attribute name="VALUE" x="-96.52" y="6.35" size="1.778" layer="96"/>
+</instance>
+<instance part="C3" gate="G$1" x="-124.46" y="1.27" smashed="yes" rot="R180">
+<attribute name="NAME" x="-127" y="-1.27" size="1.778" layer="95" rot="R270"/>
+<attribute name="VALUE" x="-129.54" y="6.35" size="1.778" layer="96" rot="R270"/>
+</instance>
+<instance part="R5" gate="G$1" x="-106.68" y="21.59" rot="R180"/>
+<instance part="R2" gate="G$1" x="-96.52" y="29.21" rot="R270"/>
+<instance part="SUPPLY6" gate="GND" x="-81.28" y="31.75"/>
+<instance part="TP2" gate="G$1" x="-88.9" y="26.67" smashed="yes">
+<attribute name="NAME" x="-91.44" y="19.05" size="1.778" layer="95"/>
+<attribute name="TP_SIGNAL_NAME" x="-87.63" y="25.4" size="1.778" layer="97"/>
+</instance>
+<instance part="S1" gate="G$1" x="-133.35" y="30.48" smashed="yes">
+<attribute name="NAME" x="-140.97" y="41.91" size="1.778" layer="95"/>
+<attribute name="VALUE" x="-133.35" y="40.64" size="1.778" layer="96"/>
+</instance>
+<instance part="SUPPLY10" gate="GND" x="-144.78" y="10.16"/>
+<instance part="C2" gate="G$1" x="-30.48" y="20.32" smashed="yes" rot="R90">
+<attribute name="NAME" x="-33.02" y="22.86" size="1.778" layer="95" rot="R180"/>
+<attribute name="VALUE" x="-25.4" y="17.78" size="1.778" layer="96" rot="R180"/>
+</instance>
+<instance part="R4" gate="G$1" x="-12.7" y="30.48" smashed="yes">
+<attribute name="NAME" x="-8.89" y="26.8986" size="1.778" layer="95"/>
+<attribute name="VALUE" x="-19.05" y="27.178" size="1.778" layer="96"/>
+</instance>
+<instance part="T1" gate="G$1" x="-7.62" y="20.32" smashed="yes">
+<attribute name="NAME" x="-5.08" y="20.32" size="1.778" layer="95"/>
+<attribute name="VALUE" x="-2.54" y="17.78" size="1.778" layer="96"/>
+</instance>
+<instance part="R1" gate="G$1" x="-5.08" y="45.72" rot="R90"/>
+<instance part="SUPPLY8" gate="GND" x="-5.08" y="10.16"/>
+<instance part="P+7" gate="VCC" x="-5.08" y="55.88"/>
+<instance part="D1" gate="G$1" x="-12.7" y="35.56" smashed="yes">
+<attribute name="NAME" x="-9.906" y="32.385" size="1.778" layer="95"/>
+<attribute name="VALUE" x="-20.066" y="32.131" size="1.778" layer="96"/>
+</instance>
+<instance part="TP1" gate="G$1" x="7.62" y="38.1"/>
+<instance part="FRAME7" gate="G$1" x="-220.98" y="-111.76"/>
+</instances>
+<busses>
+</busses>
+<nets>
+<net name="3V3" class="0">
+<segment>
+<pinref part="U2" gate="A" pin="VCC"/>
+<pinref part="P+1" gate="VCC" pin="VCC"/>
+<wire x1="63.5" y1="35.56" x2="60.96" y2="35.56" width="0.1524" layer="91"/>
+<wire x1="60.96" y1="35.56" x2="60.96" y2="53.34" width="0.1524" layer="91"/>
+<junction x="60.96" y="35.56"/>
+<pinref part="C13" gate="G$1" pin="2"/>
+<wire x1="55.88" y1="35.56" x2="55.88" y2="27.94" width="0.1524" layer="91"/>
+<wire x1="60.96" y1="35.56" x2="55.88" y2="35.56" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="R1" gate="G$1" pin="2"/>
+<wire x1="-5.08" y1="50.8" x2="-5.08" y2="53.34" width="0.1524" layer="91"/>
+<pinref part="P+7" gate="VCC" pin="VCC"/>
+</segment>
+</net>
+<net name="AMPLIFIED" class="0">
+<segment>
+<wire x1="63.5" y1="30.48" x2="45.72" y2="30.48" width="0.1524" layer="91"/>
+<label x="45.72" y="30.48" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U2" gate="A" pin="IN_A"/>
+</segment>
+<segment>
+<wire x1="7.62" y1="30.48" x2="11.43" y2="30.48" width="0.1524" layer="91"/>
+<label x="11.43" y="30.48" size="1.27" layer="95" xref="yes"/>
+<wire x1="-5.08" y1="40.64" x2="-5.08" y2="35.56" width="0.1524" layer="91"/>
+<junction x="-5.08" y="30.48"/>
+<junction x="-5.08" y="30.48"/>
+<pinref part="T1" gate="G$1" pin="C"/>
+<wire x1="-5.08" y1="35.56" x2="-5.08" y2="30.48" width="0.1524" layer="91"/>
+<wire x1="-5.08" y1="30.48" x2="-5.08" y2="25.4" width="0.1524" layer="91"/>
+<pinref part="R1" gate="G$1" pin="1"/>
+<wire x1="-5.08" y1="30.48" x2="7.62" y2="30.48" width="0.1524" layer="91"/>
+<pinref part="R4" gate="G$1" pin="2"/>
+<wire x1="-7.62" y1="30.48" x2="-5.08" y2="30.48" width="0.1524" layer="91"/>
+<pinref part="D1" gate="G$1" pin="C"/>
+<wire x1="-10.16" y1="35.56" x2="-5.08" y2="35.56" width="0.1524" layer="91"/>
+<junction x="-5.08" y="35.56"/>
+<wire x1="7.62" y1="30.48" x2="7.62" y2="35.56" width="0.1524" layer="91"/>
+<pinref part="TP1" gate="G$1" pin="TP"/>
+<junction x="7.62" y="30.48"/>
+</segment>
+</net>
+<net name="DIGITIZED" class="0">
+<segment>
+<label x="111.76" y="35.56" size="1.27" layer="95" xref="yes"/>
+<wire x1="111.76" y1="35.56" x2="99.06" y2="35.56" width="0.1524" layer="91"/>
+<pinref part="U2" gate="A" pin="OUT_Y"/>
+</segment>
+</net>
+<net name="AGND" class="0">
+<segment>
+<pinref part="U2" gate="A" pin="GND"/>
+<pinref part="SUPPLY4" gate="GND" pin="GND"/>
+<wire x1="63.5" y1="20.32" x2="60.96" y2="20.32" width="0.1524" layer="91"/>
+<wire x1="60.96" y1="20.32" x2="60.96" y2="10.16" width="0.1524" layer="91"/>
+<pinref part="C13" gate="G$1" pin="1"/>
+<wire x1="60.96" y1="10.16" x2="60.96" y2="7.62" width="0.1524" layer="91"/>
+<wire x1="55.88" y1="20.32" x2="55.88" y2="10.16" width="0.1524" layer="91"/>
+<wire x1="55.88" y1="10.16" x2="60.96" y2="10.16" width="0.1524" layer="91"/>
+<junction x="60.96" y="10.16"/>
+</segment>
+<segment>
+<wire x1="-81.28" y1="36.83" x2="-81.28" y2="34.29" width="0.1524" layer="91"/>
+<pinref part="SUPPLY6" gate="GND" pin="GND"/>
+<pinref part="R2" gate="G$1" pin="1"/>
+<wire x1="-96.52" y1="36.83" x2="-96.52" y2="34.29" width="0.1524" layer="91"/>
+<wire x1="-96.52" y1="36.83" x2="-81.28" y2="36.83" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="SUPPLY10" gate="GND" pin="GND"/>
+<pinref part="S1" gate="G$1" pin="GND"/>
+<wire x1="-143.51" y1="33.02" x2="-144.78" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="-144.78" y1="33.02" x2="-144.78" y2="12.7" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="T1" gate="G$1" pin="E"/>
+<pinref part="SUPPLY8" gate="GND" pin="GND"/>
+<wire x1="-5.08" y1="15.24" x2="-5.08" y2="12.7" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="NOISE_OUT" class="0">
+<segment>
+<pinref part="T3" gate="G$1" pin="B"/>
+<pinref part="T2" gate="G$1" pin="B"/>
+<wire x1="-111.76" y1="6.35" x2="-101.6" y2="6.35" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="NOISE_IN" class="0">
+<segment>
+<pinref part="R5" gate="G$1" pin="2"/>
+<pinref part="C3" gate="G$1" pin="2"/>
+<wire x1="-124.46" y1="6.35" x2="-124.46" y2="21.59" width="0.1524" layer="91"/>
+<wire x1="-124.46" y1="21.59" x2="-116.84" y2="21.59" width="0.1524" layer="91"/>
+<pinref part="T3" gate="G$1" pin="E"/>
+<wire x1="-116.84" y1="21.59" x2="-111.76" y2="21.59" width="0.1524" layer="91"/>
+<wire x1="-116.84" y1="11.43" x2="-116.84" y2="21.59" width="0.1524" layer="91"/>
+<junction x="-116.84" y="21.59"/>
+</segment>
+</net>
+<net name="RAW_NOISE" class="0">
+<segment>
+<pinref part="R5" gate="G$1" pin="1"/>
+<wire x1="-101.6" y1="21.59" x2="-96.52" y2="21.59" width="0.1524" layer="91"/>
+<pinref part="T2" gate="G$1" pin="C"/>
+<wire x1="-96.52" y1="21.59" x2="-96.52" y2="11.43" width="0.1524" layer="91"/>
+<pinref part="R2" gate="G$1" pin="2"/>
+<wire x1="-96.52" y1="21.59" x2="-96.52" y2="24.13" width="0.1524" layer="91"/>
+<label x="-82.55" y="21.59" size="1.27" layer="95" xref="yes"/>
+<junction x="-96.52" y="21.59"/>
+<wire x1="-96.52" y1="21.59" x2="-88.9" y2="21.59" width="0.1524" layer="91"/>
+<pinref part="TP2" gate="G$1" pin="TP"/>
+<wire x1="-88.9" y1="21.59" x2="-82.55" y2="21.59" width="0.1524" layer="91"/>
+<wire x1="-88.9" y1="21.59" x2="-88.9" y2="24.13" width="0.1524" layer="91"/>
+<junction x="-88.9" y="21.59"/>
+</segment>
+<segment>
+<pinref part="C2" gate="G$1" pin="1"/>
+<wire x1="-33.02" y1="20.32" x2="-39.37" y2="20.32" width="0.1524" layer="91"/>
+<label x="-39.37" y="20.32" size="1.27" layer="95" rot="R180" xref="yes"/>
+</segment>
+</net>
+<net name="MINUS15V_STABLE" class="0">
+<segment>
+<pinref part="C3" gate="G$1" pin="1"/>
+<wire x1="-124.46" y1="-1.27" x2="-124.46" y2="-8.89" width="0.1524" layer="91"/>
+<pinref part="T2" gate="G$1" pin="E"/>
+<wire x1="-124.46" y1="-8.89" x2="-96.52" y2="-8.89" width="0.1524" layer="91"/>
+<wire x1="-96.52" y1="-8.89" x2="-96.52" y2="1.27" width="0.1524" layer="91"/>
+<wire x1="-124.46" y1="-8.89" x2="-137.16" y2="-8.89" width="0.1524" layer="91"/>
+<label x="-137.16" y="-8.89" size="1.778" layer="95" rot="R180" xref="yes"/>
+<junction x="-124.46" y="-8.89"/>
+</segment>
+</net>
+<net name="AMP_P1" class="0">
+<segment>
+<pinref part="D1" gate="G$1" pin="A"/>
+<wire x1="-15.24" y1="35.56" x2="-22.86" y2="35.56" width="0.1524" layer="91"/>
+<pinref part="C2" gate="G$1" pin="2"/>
+<pinref part="R4" gate="G$1" pin="1"/>
+<wire x1="-25.4" y1="20.32" x2="-22.86" y2="20.32" width="0.1524" layer="91"/>
+<wire x1="-22.86" y1="20.32" x2="-22.86" y2="30.48" width="0.1524" layer="91"/>
+<wire x1="-22.86" y1="30.48" x2="-17.78" y2="30.48" width="0.1524" layer="91"/>
+<label x="-25.4" y="25.4" size="1.778" layer="95" rot="R90"/>
+<pinref part="T1" gate="G$1" pin="B"/>
+<wire x1="-10.16" y1="20.32" x2="-22.86" y2="20.32" width="0.1524" layer="91"/>
+<junction x="-22.86" y="20.32"/>
+<wire x1="-22.86" y1="35.56" x2="-22.86" y2="30.48" width="0.1524" layer="91"/>
+<junction x="-22.86" y="30.48"/>
+</segment>
+</net>
+</nets>
+</sheet>
+<sheet>
+<description>ARM Cortex-M4</description>
+<plain>
+<text x="411.48" y="160.02" size="1.778" layer="91">ST AN8844 §2.2
+One bypass capacitor for every VDD.
+Use 0.1 uF X7R 10v.</text>
+<text x="358.14" y="167.64" size="1.778" layer="91">ST AN8844 §2.2
+One 10uF bypass cap for the package.
+(two used for extra comfort)</text>
+<text x="276.86" y="210.82" size="1.778" layer="91">2*2.2uF LowESR or
+1*4.7uF LowESR
+(ST 4488 §2.2)</text>
+<text x="104.14" y="60.96" size="1.778" layer="91">2*2.2uF LowESR or
+1*4.7uF LowESR
+(ST 4488 §2.2)</text>
+<text x="279.4" y="-53.34" size="1.778" layer="91">ST 4488 §5.1
+BOOT0 to GND boots
+Main Flash Memory</text>
+<text x="355.6" y="53.34" size="1.778" layer="91">ST AN4488 §4.1.2
+suggests 25 MHz for good
+Ethernet, USB OTG and I2C</text>
+<text x="429.26" y="53.34" size="1.778" layer="91">SWD program/debug</text>
+<text x="441.96" y="12.7" size="1.778" layer="91">ST AN4488 §2.3.3
+Reset circuit not needed,
+but pull-down cap
+recommended.</text>
+<text x="276.86" y="20.32" size="1.27" layer="91">Enable internal
+power regulator</text>
+<text x="276.86" y="10.16" size="1.27" layer="91">(routed via
+bottom layer
+in case pull-up
+is needed)</text>
+</plain>
+<instances>
+<instance part="U$1" gate="G$1" x="55.88" y="157.48"/>
+<instance part="U$1" gate="G$2" x="55.88" y="7.62"/>
+<instance part="U$1" gate="G$3" x="228.6" y="154.94"/>
+<instance part="U$1" gate="G$4" x="228.6" y="5.08"/>
+<instance part="Q1" gate="G$1" x="368.3" y="48.26"/>
+<instance part="C14" gate="G$1" x="378.46" y="38.1" smashed="yes" rot="R180">
+<attribute name="NAME" x="382.524" y="38.481" size="1.778" layer="95"/>
+<attribute name="VALUE" x="382.524" y="41.021" size="1.778" layer="96"/>
+</instance>
+<instance part="C15" gate="G$1" x="358.14" y="38.1" smashed="yes" rot="R180">
+<attribute name="NAME" x="354.076" y="40.259" size="1.778" layer="95" rot="R180"/>
+<attribute name="VALUE" x="354.076" y="42.799" size="1.778" layer="96" rot="R180"/>
+</instance>
+<instance part="SUPPLY18" gate="GND" x="358.14" y="30.48"/>
+<instance part="SUPPLY19" gate="GND" x="378.46" y="30.48"/>
+<instance part="U$2" gate="G$1" x="436.88" y="40.64" rot="R180"/>
+<instance part="SUPPLY20" gate="GND" x="226.06" y="88.9"/>
+<instance part="SUPPLY21" gate="GND" x="228.6" y="-58.42"/>
+<instance part="SUPPLY22" gate="GND" x="53.34" y="-55.88"/>
+<instance part="SUPPLY24" gate="GND" x="53.34" y="88.9"/>
+<instance part="P+5" gate="VCC" x="53.34" y="223.52"/>
+<instance part="P+6" gate="VCC" x="226.06" y="224.79"/>
+<instance part="P+8" gate="VCC" x="226.06" y="69.85"/>
+<instance part="P+9" gate="VCC" x="53.34" y="73.66"/>
+<instance part="C16" gate="G$1" x="373.38" y="144.78" smashed="yes">
+<attribute name="NAME" x="369.57" y="147.32" size="1.6764" layer="95" rot="R180"/>
+<attribute name="VALUE" x="370.84" y="152.4" size="1.6764" layer="96" rot="R180"/>
+</instance>
+<instance part="C17" gate="G$1" x="378.46" y="144.78" smashed="yes">
+<attribute name="NAME" x="382.27" y="144.78" size="1.6764" layer="95"/>
+<attribute name="VALUE" x="381" y="142.24" size="1.6764" layer="96"/>
+</instance>
+<instance part="SUPPLY25" gate="GND" x="375.92" y="134.62"/>
+<instance part="P+10" gate="VCC" x="375.92" y="158.75"/>
+<instance part="P+11" gate="VCC" x="403.86" y="161.29"/>
+<instance part="SUPPLY26" gate="GND" x="403.86" y="121.92"/>
+<instance part="C18" gate="G$1" x="449.58" y="147.32" smashed="yes">
+<attribute name="NAME" x="449.58" y="154.94" size="1.27" layer="95" font="vector"/>
+<attribute name="VALUE" x="457.2" y="149.86" size="1.27" layer="96" font="vector"/>
+</instance>
+<instance part="C19" gate="G$1" x="444.5" y="147.32" smashed="yes">
+<attribute name="NAME" x="444.5" y="154.94" size="1.27" layer="95" font="vector"/>
+</instance>
+<instance part="C20" gate="G$1" x="439.42" y="147.32" smashed="yes">
+<attribute name="NAME" x="439.42" y="154.94" size="1.27" layer="95" font="vector"/>
+</instance>
+<instance part="C21" gate="G$1" x="434.34" y="147.32" smashed="yes">
+<attribute name="NAME" x="434.34" y="154.94" size="1.27" layer="95" font="vector"/>
+</instance>
+<instance part="C22" gate="G$1" x="429.26" y="147.32" smashed="yes">
+<attribute name="NAME" x="429.26" y="154.94" size="1.27" layer="95" font="vector"/>
+</instance>
+<instance part="C23" gate="G$1" x="424.18" y="147.32" smashed="yes">
+<attribute name="NAME" x="424.18" y="154.94" size="1.27" layer="95" font="vector"/>
+</instance>
+<instance part="C24" gate="G$1" x="419.1" y="147.32" smashed="yes">
+<attribute name="NAME" x="419.1" y="154.94" size="1.27" layer="95" font="vector"/>
+</instance>
+<instance part="C25" gate="G$1" x="414.02" y="147.32" smashed="yes">
+<attribute name="NAME" x="414.02" y="154.94" size="1.27" layer="95" font="vector"/>
+</instance>
+<instance part="C26" gate="G$1" x="414.02" y="134.62" smashed="yes">
+<attribute name="NAME" x="411.48" y="129.54" size="1.27" layer="95" font="vector"/>
+</instance>
+<instance part="C27" gate="G$1" x="408.94" y="134.62" smashed="yes">
+<attribute name="NAME" x="406.4" y="129.54" size="1.27" layer="95" font="vector"/>
+</instance>
+<instance part="C28" gate="G$1" x="408.94" y="147.32" smashed="yes">
+<attribute name="NAME" x="408.94" y="154.94" size="1.27" layer="95" font="vector"/>
+</instance>
+<instance part="C29" gate="G$1" x="403.86" y="147.32" smashed="yes">
+<attribute name="NAME" x="403.86" y="154.94" size="1.27" layer="95" font="vector"/>
+</instance>
+<instance part="C31" gate="G$1" x="449.58" y="134.62" smashed="yes">
+<attribute name="NAME" x="447.04" y="129.54" size="1.27" layer="95" font="vector"/>
+<attribute name="VALUE" x="454.66" y="134.62" size="1.27" layer="96" font="vector"/>
+</instance>
+<instance part="C32" gate="G$1" x="444.5" y="134.62" smashed="yes">
+<attribute name="NAME" x="441.96" y="129.54" size="1.27" layer="95" font="vector"/>
+</instance>
+<instance part="C33" gate="G$1" x="439.42" y="134.62" smashed="yes">
+<attribute name="NAME" x="436.88" y="129.54" size="1.27" layer="95" font="vector"/>
+</instance>
+<instance part="C34" gate="G$1" x="434.34" y="134.62" smashed="yes">
+<attribute name="NAME" x="431.8" y="129.54" size="1.27" layer="95" font="vector"/>
+</instance>
+<instance part="C35" gate="G$1" x="429.26" y="134.62" smashed="yes">
+<attribute name="NAME" x="426.72" y="129.54" size="1.27" layer="95" font="vector"/>
+</instance>
+<instance part="C36" gate="G$1" x="424.18" y="134.62" smashed="yes">
+<attribute name="NAME" x="421.64" y="129.54" size="1.27" layer="95" font="vector"/>
+</instance>
+<instance part="C37" gate="G$1" x="419.1" y="134.62" smashed="yes">
+<attribute name="NAME" x="416.56" y="129.54" size="1.27" layer="95" font="vector"/>
+</instance>
+<instance part="P+12" gate="VCC" x="81.28" y="222.25"/>
+<instance part="C30" gate="G$1" x="96.52" y="208.28" smashed="yes">
+<attribute name="NAME" x="99.06" y="210.82" size="1.27" layer="95" font="vector"/>
+<attribute name="VALUE" x="99.06" y="208.28" size="1.27" layer="96" font="vector"/>
+</instance>
+<instance part="SUPPLY27" gate="GND" x="96.52" y="200.66"/>
+<instance part="P+13" gate="VCC" x="274.32" y="219.71"/>
+<instance part="C38" gate="G$1" x="274.32" y="205.74" smashed="yes">
+<attribute name="NAME" x="276.86" y="208.28" size="1.27" layer="95" font="vector"/>
+<attribute name="VALUE" x="276.86" y="205.74" size="1.27" layer="96" font="vector"/>
+</instance>
+<instance part="P+14" gate="VCC" x="101.6" y="74.93"/>
+<instance part="C39" gate="G$1" x="101.6" y="60.96" smashed="yes">
+<attribute name="NAME" x="104.14" y="58.42" size="1.27" layer="95" font="vector"/>
+<attribute name="VALUE" x="104.14" y="55.88" size="1.27" layer="96" font="vector"/>
+</instance>
+<instance part="P+15" gate="VCC" x="104.14" y="166.37"/>
+<instance part="SUPPLY28" gate="GND" x="274.32" y="-58.42"/>
+<instance part="R10" gate="G$1" x="274.32" y="-48.26" rot="R90"/>
+<instance part="C40" gate="G$1" x="436.88" y="22.86" smashed="yes"/>
+<instance part="SUPPLY29" gate="GND" x="436.88" y="15.24"/>
+<instance part="R12" gate="G$1" x="365.76" y="33.02" rot="R90"/>
+<instance part="SUPPLY42" gate="GND" x="421.64" y="15.24"/>
+<instance part="P+16" gate="VCC" x="421.64" y="52.07"/>
+<instance part="FRAME3" gate="G$1" x="-53.34" y="-116.84"/>
+<instance part="FRAME3" gate="G$2" x="398.78" y="-116.84"/>
+<instance part="P+17" gate="VCC" x="274.32" y="22.86"/>
+<instance part="C56" gate="G$1" x="96.52" y="60.96" smashed="yes">
+<attribute name="NAME" x="93.98" y="63.5" size="1.27" layer="95" font="vector" rot="R90"/>
+<attribute name="VALUE" x="91.44" y="60.96" size="1.27" layer="96" font="vector" rot="R90"/>
+</instance>
+<instance part="C57" gate="G$1" x="269.24" y="205.74" smashed="yes">
+<attribute name="NAME" x="266.7" y="208.28" size="1.27" layer="95" font="vector" rot="R90"/>
+<attribute name="VALUE" x="264.16" y="208.28" size="1.27" layer="96" font="vector" rot="R90"/>
+</instance>
+<instance part="LED5" gate="G$1" x="434.34" y="-20.32" smashed="yes" rot="R90">
+<attribute name="VALUE" x="438.912" y="-14.605" size="1.778" layer="96" rot="R180"/>
+</instance>
+<instance part="LED6" gate="G$1" x="429.26" y="-22.86" smashed="yes" rot="R90">
+<attribute name="VALUE" x="433.832" y="-17.145" size="1.778" layer="96" rot="R180"/>
+</instance>
+<instance part="LED7" gate="G$1" x="434.34" y="-25.4" smashed="yes" rot="R90">
+<attribute name="VALUE" x="438.912" y="-19.685" size="1.778" layer="96" rot="R180"/>
+</instance>
+<instance part="LED8" gate="G$1" x="429.26" y="-27.94" smashed="yes" rot="R90">
+<attribute name="VALUE" x="433.832" y="-22.225" size="1.778" layer="96" rot="R180"/>
+</instance>
+<instance part="R8" gate="A" x="414.02" y="-27.94" rot="R180"/>
+<instance part="SUPPLY43" gate="GND" x="447.04" y="-27.94" rot="R90"/>
+</instances>
+<busses>
+<bus name="FMC_D[0..31],FMC_A[0..19],FMC_NE1,FMC_NOE,FMC_NWE,FMC_NL,FMC_NWAIT">
+<segment>
+<wire x1="165.1" y1="45.72" x2="165.1" y2="-35.56" width="0.762" layer="92"/>
+</segment>
+<segment>
+<wire x1="165.1" y1="195.58" x2="165.1" y2="114.3" width="0.762" layer="92"/>
+</segment>
+<segment>
+<wire x1="294.64" y1="195.58" x2="294.64" y2="114.3" width="0.762" layer="92"/>
+<label x="299.72" y="205.74" size="1.778" layer="95" rot="R270"/>
+</segment>
+<segment>
+<wire x1="294.64" y1="43.18" x2="294.64" y2="-38.1" width="0.762" layer="92"/>
+<label x="299.72" y="55.88" size="1.778" layer="95" rot="R270"/>
+</segment>
+<segment>
+<wire x1="-7.62" y1="185.42" x2="-7.62" y2="121.92" width="0.762" layer="92"/>
+<label x="-12.7" y="210.82" size="1.778" layer="95" rot="R270"/>
+</segment>
+<segment>
+<wire x1="119.38" y1="185.42" x2="119.38" y2="121.92" width="0.762" layer="92"/>
+</segment>
+<segment>
+<wire x1="116.84" y1="45.72" x2="116.84" y2="-35.56" width="0.762" layer="92"/>
+</segment>
+<segment>
+<wire x1="-7.62" y1="45.72" x2="-7.62" y2="-35.56" width="0.762" layer="92"/>
+<label x="-12.7" y="55.88" size="1.778" layer="95" rot="R270"/>
+</segment>
+</bus>
+<bus name="FMC_A[20..21],DIGITIZED">
+<segment>
+<wire x1="7.62" y1="180.34" x2="7.62" y2="175.26" width="0.762" layer="92"/>
+</segment>
+</bus>
+</busses>
+<nets>
+<net name="GND" class="1">
+<segment>
+<pinref part="C15" gate="G$1" pin="1"/>
+<wire x1="358.14" y1="35.56" x2="358.14" y2="33.02" width="0.1524" layer="91"/>
+<pinref part="SUPPLY18" gate="GND" pin="GND"/>
+</segment>
+<segment>
+<wire x1="378.46" y1="35.56" x2="378.46" y2="33.02" width="0.1524" layer="91"/>
+<pinref part="SUPPLY19" gate="GND" pin="GND"/>
+<pinref part="C14" gate="G$1" pin="1"/>
+</segment>
+<segment>
+<pinref part="U$1" gate="G$2" pin="VSS at 60"/>
+<wire x1="40.64" y1="-48.26" x2="40.64" y2="-53.34" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$2" pin="VSS at 93"/>
+<wire x1="40.64" y1="-53.34" x2="45.72" y2="-53.34" width="0.1524" layer="91"/>
+<wire x1="45.72" y1="-53.34" x2="53.34" y2="-53.34" width="0.1524" layer="91"/>
+<wire x1="53.34" y1="-53.34" x2="60.96" y2="-53.34" width="0.1524" layer="91"/>
+<wire x1="60.96" y1="-53.34" x2="66.04" y2="-53.34" width="0.1524" layer="91"/>
+<wire x1="66.04" y1="-53.34" x2="66.04" y2="-48.26" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$2" pin="VSS at 82"/>
+<wire x1="60.96" y1="-48.26" x2="60.96" y2="-53.34" width="0.1524" layer="91"/>
+<junction x="60.96" y="-53.34"/>
+<pinref part="U$1" gate="G$2" pin="VSS at 72"/>
+<wire x1="45.72" y1="-48.26" x2="45.72" y2="-53.34" width="0.1524" layer="91"/>
+<junction x="45.72" y="-53.34"/>
+<pinref part="SUPPLY22" gate="GND" pin="GND"/>
+<junction x="53.34" y="-53.34"/>
+</segment>
+<segment>
+<pinref part="U$1" gate="G$4" pin="VSS at 170"/>
+<pinref part="SUPPLY21" gate="GND" pin="GND"/>
+<wire x1="218.44" y1="-50.8" x2="218.44" y2="-55.88" width="0.1524" layer="91"/>
+<wire x1="218.44" y1="-55.88" x2="228.6" y2="-55.88" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$4" pin="VSS at 202"/>
+<wire x1="228.6" y1="-55.88" x2="233.68" y2="-55.88" width="0.1524" layer="91"/>
+<wire x1="233.68" y1="-55.88" x2="238.76" y2="-55.88" width="0.1524" layer="91"/>
+<wire x1="238.76" y1="-55.88" x2="238.76" y2="-50.8" width="0.1524" layer="91"/>
+<junction x="228.6" y="-55.88"/>
+<pinref part="U$1" gate="G$4" pin="VSS at 184"/>
+<wire x1="233.68" y1="-50.8" x2="233.68" y2="-55.88" width="0.1524" layer="91"/>
+<junction x="233.68" y="-55.88"/>
+</segment>
+<segment>
+<pinref part="U$1" gate="G$3" pin="VSS at 149"/>
+<pinref part="SUPPLY20" gate="GND" pin="GND"/>
+<wire x1="238.76" y1="99.06" x2="238.76" y2="91.44" width="0.1524" layer="91"/>
+<wire x1="238.76" y1="91.44" x2="233.68" y2="91.44" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$3" pin="VSS at 136"/>
+<wire x1="233.68" y1="91.44" x2="226.06" y2="91.44" width="0.1524" layer="91"/>
+<wire x1="233.68" y1="99.06" x2="233.68" y2="91.44" width="0.1524" layer="91"/>
+<junction x="233.68" y="91.44"/>
+<pinref part="U$1" gate="G$3" pin="VSS at 125"/>
+<wire x1="218.44" y1="99.06" x2="218.44" y2="91.44" width="0.1524" layer="91"/>
+<wire x1="218.44" y1="91.44" x2="226.06" y2="91.44" width="0.1524" layer="91"/>
+<junction x="226.06" y="91.44"/>
+<pinref part="U$1" gate="G$3" pin="VSS at 114"/>
+<wire x1="213.36" y1="99.06" x2="213.36" y2="91.44" width="0.1524" layer="91"/>
+<wire x1="213.36" y1="91.44" x2="218.44" y2="91.44" width="0.1524" layer="91"/>
+<junction x="218.44" y="91.44"/>
+</segment>
+<segment>
+<pinref part="U$1" gate="G$1" pin="VSS at 14"/>
+<pinref part="SUPPLY24" gate="GND" pin="GND"/>
+<wire x1="40.64" y1="99.06" x2="40.64" y2="91.44" width="0.1524" layer="91"/>
+<wire x1="40.64" y1="91.44" x2="45.72" y2="91.44" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="VSS at 25"/>
+<wire x1="45.72" y1="91.44" x2="53.34" y2="91.44" width="0.1524" layer="91"/>
+<wire x1="45.72" y1="99.06" x2="45.72" y2="91.44" width="0.1524" layer="91"/>
+<junction x="45.72" y="91.44"/>
+<pinref part="U$1" gate="G$1" pin="VSSA at 40"/>
+<wire x1="60.96" y1="99.06" x2="60.96" y2="91.44" width="0.1524" layer="91"/>
+<wire x1="60.96" y1="91.44" x2="53.34" y2="91.44" width="0.1524" layer="91"/>
+<junction x="53.34" y="91.44"/>
+<pinref part="U$1" gate="G$1" pin="VSS at 51"/>
+<wire x1="66.04" y1="99.06" x2="66.04" y2="91.44" width="0.1524" layer="91"/>
+<wire x1="66.04" y1="91.44" x2="60.96" y2="91.44" width="0.1524" layer="91"/>
+<junction x="60.96" y="91.44"/>
+</segment>
+<segment>
+<pinref part="C16" gate="G$1" pin="P$2"/>
+<wire x1="373.38" y1="142.24" x2="373.38" y2="139.7" width="0.1524" layer="91"/>
+<wire x1="373.38" y1="139.7" x2="375.92" y2="139.7" width="0.1524" layer="91"/>
+<pinref part="SUPPLY25" gate="GND" pin="GND"/>
+<wire x1="375.92" y1="139.7" x2="375.92" y2="137.16" width="0.1524" layer="91"/>
+<pinref part="C17" gate="G$1" pin="P$2"/>
+<wire x1="378.46" y1="142.24" x2="378.46" y2="139.7" width="0.1524" layer="91"/>
+<wire x1="378.46" y1="139.7" x2="375.92" y2="139.7" width="0.1524" layer="91"/>
+<junction x="375.92" y="139.7"/>
+</segment>
+<segment>
+<pinref part="C18" gate="G$1" pin="P$2"/>
+<pinref part="C29" gate="G$1" pin="P$2"/>
+<wire x1="449.58" y1="144.78" x2="444.5" y2="144.78" width="0.1524" layer="91"/>
+<pinref part="SUPPLY26" gate="GND" pin="GND"/>
+<wire x1="444.5" y1="144.78" x2="439.42" y2="144.78" width="0.1524" layer="91"/>
+<wire x1="439.42" y1="144.78" x2="434.34" y2="144.78" width="0.1524" layer="91"/>
+<wire x1="434.34" y1="144.78" x2="429.26" y2="144.78" width="0.1524" layer="91"/>
+<wire x1="429.26" y1="144.78" x2="424.18" y2="144.78" width="0.1524" layer="91"/>
+<wire x1="424.18" y1="144.78" x2="419.1" y2="144.78" width="0.1524" layer="91"/>
+<wire x1="419.1" y1="144.78" x2="414.02" y2="144.78" width="0.1524" layer="91"/>
+<wire x1="414.02" y1="144.78" x2="408.94" y2="144.78" width="0.1524" layer="91"/>
+<wire x1="408.94" y1="144.78" x2="403.86" y2="144.78" width="0.1524" layer="91"/>
+<wire x1="403.86" y1="144.78" x2="403.86" y2="132.08" width="0.1524" layer="91"/>
+<junction x="403.86" y="144.78"/>
+<wire x1="403.86" y1="132.08" x2="403.86" y2="124.46" width="0.1524" layer="91"/>
+<junction x="403.86" y="132.08"/>
+<pinref part="C19" gate="G$1" pin="P$2"/>
+<junction x="444.5" y="144.78"/>
+<pinref part="C20" gate="G$1" pin="P$2"/>
+<junction x="439.42" y="144.78"/>
+<pinref part="C21" gate="G$1" pin="P$2"/>
+<junction x="434.34" y="144.78"/>
+<pinref part="C22" gate="G$1" pin="P$2"/>
+<junction x="429.26" y="144.78"/>
+<pinref part="C23" gate="G$1" pin="P$2"/>
+<junction x="424.18" y="144.78"/>
+<pinref part="C24" gate="G$1" pin="P$2"/>
+<junction x="419.1" y="144.78"/>
+<pinref part="C25" gate="G$1" pin="P$2"/>
+<junction x="414.02" y="144.78"/>
+<pinref part="C28" gate="G$1" pin="P$2"/>
+<junction x="408.94" y="144.78"/>
+<pinref part="C31" gate="G$1" pin="P$2"/>
+<wire x1="449.58" y1="132.08" x2="444.5" y2="132.08" width="0.1524" layer="91"/>
+<pinref part="C32" gate="G$1" pin="P$2"/>
+<junction x="444.5" y="132.08"/>
+<wire x1="444.5" y1="132.08" x2="439.42" y2="132.08" width="0.1524" layer="91"/>
+<pinref part="C33" gate="G$1" pin="P$2"/>
+<junction x="439.42" y="132.08"/>
+<wire x1="439.42" y1="132.08" x2="434.34" y2="132.08" width="0.1524" layer="91"/>
+<pinref part="C34" gate="G$1" pin="P$2"/>
+<junction x="434.34" y="132.08"/>
+<wire x1="434.34" y1="132.08" x2="429.26" y2="132.08" width="0.1524" layer="91"/>
+<pinref part="C35" gate="G$1" pin="P$2"/>
+<junction x="429.26" y="132.08"/>
+<wire x1="429.26" y1="132.08" x2="424.18" y2="132.08" width="0.1524" layer="91"/>
+<pinref part="C36" gate="G$1" pin="P$2"/>
+<junction x="424.18" y="132.08"/>
+<wire x1="424.18" y1="132.08" x2="419.1" y2="132.08" width="0.1524" layer="91"/>
+<pinref part="C37" gate="G$1" pin="P$2"/>
+<junction x="419.1" y="132.08"/>
+<wire x1="419.1" y1="132.08" x2="414.02" y2="132.08" width="0.1524" layer="91"/>
+<pinref part="C26" gate="G$1" pin="P$2"/>
+<junction x="414.02" y="132.08"/>
+<wire x1="414.02" y1="132.08" x2="408.94" y2="132.08" width="0.1524" layer="91"/>
+<pinref part="C27" gate="G$1" pin="P$2"/>
+<junction x="408.94" y="132.08"/>
+<wire x1="408.94" y1="132.08" x2="403.86" y2="132.08" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="SUPPLY27" gate="GND" pin="GND"/>
+<pinref part="C30" gate="G$1" pin="P$2"/>
+<wire x1="96.52" y1="203.2" x2="96.52" y2="205.74" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="R10" gate="G$1" pin="1"/>
+<pinref part="SUPPLY28" gate="GND" pin="GND"/>
+<wire x1="274.32" y1="-53.34" x2="274.32" y2="-55.88" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="SUPPLY29" gate="GND" pin="GND"/>
+<pinref part="C40" gate="G$1" pin="P$2"/>
+<wire x1="436.88" y1="17.78" x2="436.88" y2="20.32" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="U$2" gate="G$1" pin="GND"/>
+<pinref part="SUPPLY42" gate="GND" pin="GND"/>
+<wire x1="436.88" y1="40.64" x2="421.64" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="421.64" y1="40.64" x2="421.64" y2="17.78" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="LED5" gate="G$1" pin="C"/>
+<wire x1="439.42" y1="-20.32" x2="441.96" y2="-20.32" width="0.1524" layer="91"/>
+<wire x1="441.96" y1="-22.86" x2="441.96" y2="-20.32" width="0.1524" layer="91"/>
+<pinref part="LED6" gate="G$1" pin="C"/>
+<wire x1="434.34" y1="-22.86" x2="441.96" y2="-22.86" width="0.1524" layer="91"/>
+<junction x="441.96" y="-22.86"/>
+<wire x1="441.96" y1="-25.4" x2="441.96" y2="-22.86" width="0.1524" layer="91"/>
+<pinref part="LED7" gate="G$1" pin="C"/>
+<wire x1="439.42" y1="-25.4" x2="441.96" y2="-25.4" width="0.1524" layer="91"/>
+<junction x="441.96" y="-25.4"/>
+<pinref part="LED8" gate="G$1" pin="C"/>
+<wire x1="434.34" y1="-27.94" x2="441.96" y2="-27.94" width="0.1524" layer="91"/>
+<wire x1="441.96" y1="-27.94" x2="441.96" y2="-25.4" width="0.1524" layer="91"/>
+<pinref part="SUPPLY43" gate="GND" pin="GND"/>
+<wire x1="444.5" y1="-27.94" x2="441.96" y2="-27.94" width="0.1524" layer="91"/>
+<junction x="441.96" y="-27.94"/>
+</segment>
+</net>
+<net name="3V3" class="0">
+<segment>
+<pinref part="U$1" gate="G$4" pin="VDD at 158"/>
+<wire x1="205.74" y1="58.42" x2="205.74" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="205.74" y1="66.04" x2="210.82" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="210.82" y1="66.04" x2="226.06" y2="66.04" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$4" pin="VDD at 204"/>
+<wire x1="226.06" y1="67.31" x2="226.06" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="246.38" y1="58.42" x2="246.38" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="246.38" y1="66.04" x2="241.3" y2="66.04" width="0.1524" layer="91"/>
+<junction x="226.06" y="66.04"/>
+<pinref part="U$1" gate="G$4" pin="VDD at 185"/>
+<wire x1="241.3" y1="66.04" x2="226.06" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="241.3" y1="58.42" x2="241.3" y2="66.04" width="0.1524" layer="91"/>
+<junction x="241.3" y="66.04"/>
+<pinref part="U$1" gate="G$4" pin="VDD at 171"/>
+<wire x1="210.82" y1="58.42" x2="210.82" y2="66.04" width="0.1524" layer="91"/>
+<junction x="210.82" y="66.04"/>
+<pinref part="P+8" gate="VCC" pin="VCC"/>
+</segment>
+<segment>
+<pinref part="C29" gate="G$1" pin="P$1"/>
+<wire x1="403.86" y1="157.48" x2="403.86" y2="158.75" width="0.1524" layer="91"/>
+<pinref part="C18" gate="G$1" pin="P$1"/>
+<wire x1="403.86" y1="158.75" x2="403.86" y2="152.4" width="0.1524" layer="91"/>
+<wire x1="403.86" y1="152.4" x2="408.94" y2="152.4" width="0.1524" layer="91"/>
+<junction x="403.86" y="152.4"/>
+<wire x1="408.94" y1="152.4" x2="414.02" y2="152.4" width="0.1524" layer="91"/>
+<wire x1="414.02" y1="152.4" x2="419.1" y2="152.4" width="0.1524" layer="91"/>
+<wire x1="419.1" y1="152.4" x2="424.18" y2="152.4" width="0.1524" layer="91"/>
+<wire x1="424.18" y1="152.4" x2="429.26" y2="152.4" width="0.1524" layer="91"/>
+<wire x1="429.26" y1="152.4" x2="434.34" y2="152.4" width="0.1524" layer="91"/>
+<wire x1="434.34" y1="152.4" x2="439.42" y2="152.4" width="0.1524" layer="91"/>
+<wire x1="439.42" y1="152.4" x2="444.5" y2="152.4" width="0.1524" layer="91"/>
+<wire x1="444.5" y1="152.4" x2="449.58" y2="152.4" width="0.1524" layer="91"/>
+<wire x1="449.58" y1="152.4" x2="454.66" y2="152.4" width="0.1524" layer="91"/>
+<junction x="449.58" y="152.4"/>
+<wire x1="454.66" y1="152.4" x2="454.66" y2="139.7" width="0.1524" layer="91"/>
+<pinref part="C27" gate="G$1" pin="P$1"/>
+<wire x1="454.66" y1="139.7" x2="449.58" y2="139.7" width="0.1524" layer="91"/>
+<pinref part="C28" gate="G$1" pin="P$1"/>
+<junction x="408.94" y="152.4"/>
+<pinref part="C25" gate="G$1" pin="P$1"/>
+<junction x="414.02" y="152.4"/>
+<pinref part="C24" gate="G$1" pin="P$1"/>
+<junction x="419.1" y="152.4"/>
+<pinref part="C23" gate="G$1" pin="P$1"/>
+<junction x="424.18" y="152.4"/>
+<pinref part="C22" gate="G$1" pin="P$1"/>
+<junction x="429.26" y="152.4"/>
+<pinref part="C21" gate="G$1" pin="P$1"/>
+<junction x="434.34" y="152.4"/>
+<pinref part="C20" gate="G$1" pin="P$1"/>
+<junction x="439.42" y="152.4"/>
+<pinref part="C19" gate="G$1" pin="P$1"/>
+<junction x="444.5" y="152.4"/>
+<pinref part="C26" gate="G$1" pin="P$1"/>
+<junction x="414.02" y="139.7"/>
+<wire x1="449.58" y1="139.7" x2="444.5" y2="139.7" width="0.1524" layer="91"/>
+<wire x1="444.5" y1="139.7" x2="439.42" y2="139.7" width="0.1524" layer="91"/>
+<wire x1="439.42" y1="139.7" x2="434.34" y2="139.7" width="0.1524" layer="91"/>
+<wire x1="434.34" y1="139.7" x2="429.26" y2="139.7" width="0.1524" layer="91"/>
+<wire x1="429.26" y1="139.7" x2="424.18" y2="139.7" width="0.1524" layer="91"/>
+<wire x1="424.18" y1="139.7" x2="419.1" y2="139.7" width="0.1524" layer="91"/>
+<wire x1="419.1" y1="139.7" x2="414.02" y2="139.7" width="0.1524" layer="91"/>
+<wire x1="414.02" y1="139.7" x2="408.94" y2="139.7" width="0.1524" layer="91"/>
+<pinref part="C37" gate="G$1" pin="P$1"/>
+<junction x="419.1" y="139.7"/>
+<pinref part="C36" gate="G$1" pin="P$1"/>
+<junction x="424.18" y="139.7"/>
+<pinref part="C35" gate="G$1" pin="P$1"/>
+<junction x="429.26" y="139.7"/>
+<pinref part="C34" gate="G$1" pin="P$1"/>
+<junction x="434.34" y="139.7"/>
+<pinref part="C33" gate="G$1" pin="P$1"/>
+<junction x="439.42" y="139.7"/>
+<pinref part="C32" gate="G$1" pin="P$1"/>
+<junction x="444.5" y="139.7"/>
+<pinref part="C31" gate="G$1" pin="P$1"/>
+<junction x="449.58" y="139.7"/>
+<pinref part="P+11" gate="VCC" pin="VCC"/>
+<junction x="403.86" y="158.75"/>
+</segment>
+<segment>
+<pinref part="U$1" gate="G$2" pin="VDD at 59"/>
+<wire x1="33.02" y1="60.96" x2="33.02" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="33.02" y1="68.58" x2="38.1" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="38.1" y1="68.58" x2="53.34" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="53.34" y1="68.58" x2="53.34" y2="71.12" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$2" pin="VDD at 103"/>
+<wire x1="76.2" y1="60.96" x2="76.2" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="76.2" y1="68.58" x2="71.12" y2="68.58" width="0.1524" layer="91"/>
+<junction x="53.34" y="68.58"/>
+<pinref part="U$1" gate="G$2" pin="VDD at 94"/>
+<wire x1="71.12" y1="68.58" x2="66.04" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="66.04" y1="68.58" x2="53.34" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="71.12" y1="60.96" x2="71.12" y2="68.58" width="0.1524" layer="91"/>
+<junction x="71.12" y="68.58"/>
+<pinref part="U$1" gate="G$2" pin="VDD at 83"/>
+<wire x1="66.04" y1="60.96" x2="66.04" y2="68.58" width="0.1524" layer="91"/>
+<junction x="66.04" y="68.58"/>
+<pinref part="U$1" gate="G$2" pin="VDD at 73"/>
+<wire x1="38.1" y1="60.96" x2="38.1" y2="68.58" width="0.1524" layer="91"/>
+<junction x="38.1" y="68.58"/>
+<pinref part="P+9" gate="VCC" pin="VCC"/>
+</segment>
+<segment>
+<pinref part="U$1" gate="G$1" pin="VBAT at 6"/>
+<wire x1="27.94" y1="208.28" x2="27.94" y2="215.9" width="0.1524" layer="91"/>
+<wire x1="27.94" y1="215.9" x2="35.56" y2="215.9" width="0.1524" layer="91"/>
+<wire x1="35.56" y1="215.9" x2="40.64" y2="215.9" width="0.1524" layer="91"/>
+<wire x1="40.64" y1="215.9" x2="53.34" y2="215.9" width="0.1524" layer="91"/>
+<wire x1="53.34" y1="215.9" x2="53.34" y2="220.98" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="VDD at 52"/>
+<wire x1="73.66" y1="208.28" x2="73.66" y2="215.9" width="0.1524" layer="91"/>
+<junction x="53.34" y="215.9"/>
+<wire x1="73.66" y1="215.9" x2="68.58" y2="215.9" width="0.1524" layer="91"/>
+<wire x1="68.58" y1="215.9" x2="53.34" y2="215.9" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$1" pin="VDD at 39"/>
+<wire x1="68.58" y1="208.28" x2="68.58" y2="215.9" width="0.1524" layer="91"/>
+<junction x="68.58" y="215.9"/>
+<pinref part="U$1" gate="G$1" pin="VDD at 26"/>
+<wire x1="40.64" y1="208.28" x2="40.64" y2="215.9" width="0.1524" layer="91"/>
+<junction x="40.64" y="215.9"/>
+<pinref part="U$1" gate="G$1" pin="VDD at 15"/>
+<wire x1="35.56" y1="208.28" x2="35.56" y2="215.9" width="0.1524" layer="91"/>
+<junction x="35.56" y="215.9"/>
+<pinref part="P+5" gate="VCC" pin="VCC"/>
+</segment>
+<segment>
+<pinref part="U$1" gate="G$1" pin="VDDA at 42"/>
+<wire x1="81.28" y1="208.28" x2="81.28" y2="215.9" width="0.1524" layer="91"/>
+<wire x1="81.28" y1="215.9" x2="81.28" y2="219.71" width="0.1524" layer="91"/>
+<wire x1="81.28" y1="215.9" x2="96.52" y2="215.9" width="0.1524" layer="91"/>
+<wire x1="96.52" y1="215.9" x2="96.52" y2="213.36" width="0.1524" layer="91"/>
+<pinref part="C30" gate="G$1" pin="P$1"/>
+<junction x="81.28" y="215.9"/>
+<pinref part="P+12" gate="VCC" pin="VCC"/>
+</segment>
+<segment>
+<pinref part="U$1" gate="G$3" pin="VDD at 115"/>
+<wire x1="205.74" y1="208.28" x2="205.74" y2="215.9" width="0.1524" layer="91"/>
+<wire x1="205.74" y1="215.9" x2="210.82" y2="215.9" width="0.1524" layer="91"/>
+<wire x1="210.82" y1="215.9" x2="226.06" y2="215.9" width="0.1524" layer="91"/>
+<wire x1="226.06" y1="215.9" x2="226.06" y2="222.25" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$3" pin="VDD at 150"/>
+<wire x1="226.06" y1="222.25" x2="226.06" y2="220.98" width="0.1524" layer="91"/>
+<wire x1="246.38" y1="208.28" x2="246.38" y2="215.9" width="0.1524" layer="91"/>
+<wire x1="246.38" y1="215.9" x2="241.3" y2="215.9" width="0.1524" layer="91"/>
+<junction x="226.06" y="215.9"/>
+<pinref part="U$1" gate="G$3" pin="VDD at 137"/>
+<wire x1="241.3" y1="215.9" x2="226.06" y2="215.9" width="0.1524" layer="91"/>
+<wire x1="241.3" y1="208.28" x2="241.3" y2="215.9" width="0.1524" layer="91"/>
+<junction x="241.3" y="215.9"/>
+<pinref part="U$1" gate="G$3" pin="VDD at 124"/>
+<wire x1="210.82" y1="208.28" x2="210.82" y2="215.9" width="0.1524" layer="91"/>
+<junction x="210.82" y="215.9"/>
+<pinref part="P+6" gate="VCC" pin="VCC"/>
+<junction x="226.06" y="222.25"/>
+</segment>
+<segment>
+<pinref part="C38" gate="G$1" pin="P$1"/>
+<wire x1="274.32" y1="210.82" x2="274.32" y2="213.36" width="0.1524" layer="91"/>
+<pinref part="P+13" gate="VCC" pin="VCC"/>
+<wire x1="274.32" y1="213.36" x2="274.32" y2="217.17" width="0.1524" layer="91"/>
+<wire x1="274.32" y1="217.17" x2="274.32" y2="218.44" width="0.1524" layer="91"/>
+<junction x="274.32" y="217.17"/>
+<pinref part="C57" gate="G$1" pin="P$1"/>
+<wire x1="269.24" y1="210.82" x2="269.24" y2="213.36" width="0.1524" layer="91"/>
+<wire x1="269.24" y1="213.36" x2="274.32" y2="213.36" width="0.1524" layer="91"/>
+<junction x="274.32" y="213.36"/>
+</segment>
+<segment>
+<pinref part="C39" gate="G$1" pin="P$1"/>
+<wire x1="101.6" y1="66.04" x2="101.6" y2="68.58" width="0.1524" layer="91"/>
+<pinref part="P+14" gate="VCC" pin="VCC"/>
+<wire x1="101.6" y1="68.58" x2="101.6" y2="72.39" width="0.1524" layer="91"/>
+<wire x1="101.6" y1="72.39" x2="101.6" y2="73.66" width="0.1524" layer="91"/>
+<junction x="101.6" y="72.39"/>
+<pinref part="C56" gate="G$1" pin="P$1"/>
+<wire x1="96.52" y1="66.04" x2="96.52" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="96.52" y1="68.58" x2="101.6" y2="68.58" width="0.1524" layer="91"/>
+<junction x="101.6" y="68.58"/>
+</segment>
+<segment>
+<pinref part="U$1" gate="G$1" pin="VREF+ at 41"/>
+<wire x1="96.52" y1="160.02" x2="104.14" y2="160.02" width="0.1524" layer="91"/>
+<pinref part="P+15" gate="VCC" pin="VCC"/>
+<wire x1="104.14" y1="163.83" x2="104.14" y2="160.02" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="C16" gate="G$1" pin="P$1"/>
+<wire x1="373.38" y1="149.86" x2="373.38" y2="152.4" width="0.1524" layer="91"/>
+<wire x1="373.38" y1="152.4" x2="375.92" y2="152.4" width="0.1524" layer="91"/>
+<wire x1="375.92" y1="152.4" x2="375.92" y2="156.21" width="0.1524" layer="91"/>
+<pinref part="C17" gate="G$1" pin="P$1"/>
+<wire x1="375.92" y1="156.21" x2="375.92" y2="157.48" width="0.1524" layer="91"/>
+<wire x1="378.46" y1="149.86" x2="378.46" y2="152.4" width="0.1524" layer="91"/>
+<wire x1="378.46" y1="152.4" x2="375.92" y2="152.4" width="0.1524" layer="91"/>
+<junction x="375.92" y="152.4"/>
+<pinref part="P+10" gate="VCC" pin="VCC"/>
+<junction x="375.92" y="156.21"/>
+</segment>
+<segment>
+<pinref part="U$2" gate="G$1" pin="VCC"/>
+<wire x1="436.88" y1="43.18" x2="421.64" y2="43.18" width="0.1524" layer="91"/>
+<wire x1="421.64" y1="43.18" x2="421.64" y2="49.53" width="0.1524" layer="91"/>
+<pinref part="P+16" gate="VCC" pin="VCC"/>
+<wire x1="421.64" y1="49.53" x2="421.64" y2="50.8" width="0.1524" layer="91"/>
+<junction x="421.64" y="49.53"/>
+</segment>
+<segment>
+<pinref part="U$1" gate="G$4" pin="PDR_ON at 203"/>
+<wire x1="269.24" y1="17.78" x2="274.32" y2="17.78" width="0.1524" layer="91"/>
+<wire x1="274.32" y1="17.78" x2="274.32" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="P+17" gate="VCC" pin="VCC"/>
+</segment>
+</net>
+<net name="FMC_CLK" class="0">
+<segment>
+<pinref part="U$1" gate="G$4" pin="PD3/FMC_CLK"/>
+<wire x1="187.96" y1="10.16" x2="180.34" y2="10.16" width="0.1524" layer="91"/>
+<label x="180.34" y="10.16" size="1.27" layer="95" rot="R180" xref="yes"/>
+</segment>
+</net>
+<net name="FMC_D0" class="2">
+<segment>
+<pinref part="U$1" gate="G$3" pin="PD14/FMC_D0"/>
+<wire x1="187.96" y1="157.48" x2="165.1" y2="157.48" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D1" class="2">
+<segment>
+<pinref part="U$1" gate="G$3" pin="PD15/FMC_D1"/>
+<wire x1="187.96" y1="154.94" x2="165.1" y2="154.94" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D13" class="2">
+<segment>
+<pinref part="U$1" gate="G$3" pin="PD8/FMC_D13"/>
+<wire x1="187.96" y1="177.8" x2="165.1" y2="177.8" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D14" class="2">
+<segment>
+<pinref part="U$1" gate="G$3" pin="PD9/FMC_D14"/>
+<wire x1="187.96" y1="175.26" x2="165.1" y2="175.26" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D15" class="2">
+<segment>
+<pinref part="U$1" gate="G$3" pin="PD10/FMC_D15"/>
+<wire x1="187.96" y1="172.72" x2="165.1" y2="172.72" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D22" class="2">
+<segment>
+<pinref part="U$1" gate="G$3" pin="FMC_D22/PH14"/>
+<wire x1="294.64" y1="172.72" x2="266.7" y2="172.72" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D23" class="2">
+<segment>
+<pinref part="U$1" gate="G$3" pin="FMC_D23/PH15"/>
+<wire x1="294.64" y1="175.26" x2="266.7" y2="175.26" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D24" class="2">
+<segment>
+<pinref part="U$1" gate="G$3" pin="FMC_D24/PI0"/>
+<wire x1="294.64" y1="177.8" x2="266.7" y2="177.8" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D25" class="2">
+<segment>
+<pinref part="U$1" gate="G$3" pin="FMC_D25/PI1"/>
+<wire x1="294.64" y1="180.34" x2="266.7" y2="180.34" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D26" class="2">
+<segment>
+<pinref part="U$1" gate="G$3" pin="FMC_D26/PI2"/>
+<wire x1="294.64" y1="182.88" x2="266.7" y2="182.88" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A12" class="3">
+<segment>
+<pinref part="U$1" gate="G$3" pin="PG2/FMC_A12"/>
+<wire x1="187.96" y1="124.46" x2="165.1" y2="124.46" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A13" class="3">
+<segment>
+<pinref part="U$1" gate="G$3" pin="PG3/FMC_A13"/>
+<wire x1="187.96" y1="121.92" x2="165.1" y2="121.92" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A14" class="3">
+<segment>
+<pinref part="U$1" gate="G$3" pin="PG4/FMC_A14"/>
+<wire x1="187.96" y1="119.38" x2="165.1" y2="119.38" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A16" class="3">
+<segment>
+<pinref part="U$1" gate="G$3" pin="PD11/FMC_A16"/>
+<wire x1="187.96" y1="170.18" x2="165.1" y2="170.18" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A17" class="3">
+<segment>
+<pinref part="U$1" gate="G$3" pin="PD12/FMC_A17"/>
+<wire x1="187.96" y1="167.64" x2="165.1" y2="167.64" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A18" class="3">
+<segment>
+<pinref part="U$1" gate="G$3" pin="PD13/FMC_A18"/>
+<wire x1="187.96" y1="165.1" x2="165.1" y2="165.1" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_NL" class="0">
+<segment>
+<pinref part="U$1" gate="G$4" pin="FMC_NL/PB7"/>
+<wire x1="294.64" y1="0" x2="266.7" y2="0" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D28" class="2">
+<segment>
+<pinref part="U$1" gate="G$4" pin="FMC_D28/PI6"/>
+<wire x1="294.64" y1="27.94" x2="266.7" y2="27.94" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D29" class="2">
+<segment>
+<pinref part="U$1" gate="G$4" pin="FMC_D29/PI7"/>
+<wire x1="266.7" y1="30.48" x2="294.64" y2="30.48" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D27" class="2">
+<segment>
+<pinref part="U$1" gate="G$4" pin="PI3/FMC_D27"/>
+<wire x1="187.96" y1="35.56" x2="165.1" y2="35.56" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D3" class="2">
+<segment>
+<pinref part="U$1" gate="G$4" pin="PD1/FMC_D3"/>
+<wire x1="187.96" y1="15.24" x2="165.1" y2="15.24" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_NOE" class="0">
+<segment>
+<pinref part="U$1" gate="G$4" pin="PD4/FMC_NOE"/>
+<wire x1="187.96" y1="7.62" x2="165.1" y2="7.62" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_NWE" class="0">
+<segment>
+<pinref part="U$1" gate="G$4" pin="PD5/FMC_NWE"/>
+<wire x1="187.96" y1="5.08" x2="165.1" y2="5.08" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_NWAIT" class="0">
+<segment>
+<pinref part="U$1" gate="G$4" pin="PD6/FMC_NWAIT"/>
+<wire x1="187.96" y1="-2.54" x2="165.1" y2="-2.54" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A19" class="3">
+<segment>
+<pinref part="U$1" gate="G$1" pin="PE3/FMC_A19"/>
+<wire x1="15.24" y1="182.88" x2="-7.62" y2="182.88" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A20" class="0">
+<segment>
+<pinref part="U$1" gate="G$1" pin="PE4/FMC_A20"/>
+<wire x1="15.24" y1="180.34" x2="7.62" y2="180.34" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A21" class="0">
+<segment>
+<pinref part="U$1" gate="G$1" pin="PE5/FMC_A21"/>
+<wire x1="15.24" y1="177.8" x2="7.62" y2="177.8" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D30" class="2">
+<segment>
+<pinref part="U$1" gate="G$1" pin="PI9/FMC_D30"/>
+<wire x1="15.24" y1="160.02" x2="-7.62" y2="160.02" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D31" class="2">
+<segment>
+<pinref part="U$1" gate="G$1" pin="PI10/FMC_D31"/>
+<wire x1="15.24" y1="157.48" x2="-7.62" y2="157.48" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A0" class="3">
+<segment>
+<pinref part="U$1" gate="G$1" pin="PF0/FMC_A0"/>
+<wire x1="15.24" y1="147.32" x2="-7.62" y2="147.32" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A1" class="3">
+<segment>
+<pinref part="U$1" gate="G$1" pin="PF1/FMC_A1"/>
+<wire x1="15.24" y1="144.78" x2="-7.62" y2="144.78" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A2" class="3">
+<segment>
+<pinref part="U$1" gate="G$1" pin="PF2/FMC_A2"/>
+<wire x1="15.24" y1="142.24" x2="-7.62" y2="142.24" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A3" class="3">
+<segment>
+<pinref part="U$1" gate="G$1" pin="PF3/FMC_A3"/>
+<wire x1="15.24" y1="132.08" x2="-7.62" y2="132.08" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A4" class="3">
+<segment>
+<pinref part="U$1" gate="G$1" pin="PF4/FMC_A4"/>
+<wire x1="15.24" y1="129.54" x2="-7.62" y2="129.54" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A5" class="3">
+<segment>
+<pinref part="U$1" gate="G$1" pin="PF5/FMC_A5"/>
+<wire x1="15.24" y1="127" x2="-7.62" y2="127" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A6" class="3">
+<segment>
+<pinref part="U$1" gate="G$2" pin="PF12/FMC_A6"/>
+<wire x1="15.24" y1="-7.62" x2="-7.62" y2="-7.62" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A7" class="3">
+<segment>
+<pinref part="U$1" gate="G$2" pin="PF13/FMC_A7"/>
+<wire x1="15.24" y1="-15.24" x2="-7.62" y2="-15.24" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A8" class="3">
+<segment>
+<pinref part="U$1" gate="G$2" pin="PF14/FMC_A8"/>
+<wire x1="15.24" y1="-17.78" x2="-7.62" y2="-17.78" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A9" class="3">
+<segment>
+<pinref part="U$1" gate="G$2" pin="PF15/FMC_A9"/>
+<wire x1="15.24" y1="-20.32" x2="-7.62" y2="-20.32" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A10" class="3">
+<segment>
+<pinref part="U$1" gate="G$2" pin="PG0/FMC_A10"/>
+<wire x1="15.24" y1="-22.86" x2="-7.62" y2="-22.86" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A11" class="3">
+<segment>
+<pinref part="U$1" gate="G$2" pin="PG1/FMC_A11"/>
+<wire x1="15.24" y1="-25.4" x2="-7.62" y2="-25.4" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D4" class="2">
+<segment>
+<pinref part="U$1" gate="G$2" pin="PE7/FMC_D4"/>
+<wire x1="15.24" y1="-27.94" x2="-7.62" y2="-27.94" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D20" class="2">
+<segment>
+<pinref part="U$1" gate="G$2" pin="FMC_D20/PH12"/>
+<wire x1="93.98" y1="30.48" x2="116.84" y2="30.48" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D19" class="2">
+<segment>
+<pinref part="U$1" gate="G$2" pin="FMC_D19/PH11"/>
+<wire x1="93.98" y1="27.94" x2="116.84" y2="27.94" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D18" class="2">
+<segment>
+<pinref part="U$1" gate="G$2" pin="FMC_D18/PH10"/>
+<wire x1="93.98" y1="25.4" x2="116.84" y2="25.4" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D17" class="2">
+<segment>
+<pinref part="U$1" gate="G$2" pin="FMC_D17/PH9"/>
+<wire x1="93.98" y1="22.86" x2="116.84" y2="22.86" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D16" class="2">
+<segment>
+<pinref part="U$1" gate="G$2" pin="FMC_D16/PH8"/>
+<wire x1="93.98" y1="20.32" x2="116.84" y2="20.32" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D12" class="2">
+<segment>
+<pinref part="U$1" gate="G$2" pin="FMC_D12/PE15"/>
+<wire x1="93.98" y1="-2.54" x2="116.84" y2="-2.54" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D11" class="2">
+<segment>
+<pinref part="U$1" gate="G$2" pin="FMC_D11/PE14"/>
+<wire x1="93.98" y1="-5.08" x2="116.84" y2="-5.08" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D10" class="2">
+<segment>
+<pinref part="U$1" gate="G$2" pin="FMC_D10/PE13"/>
+<wire x1="93.98" y1="-7.62" x2="116.84" y2="-7.62" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D9" class="2">
+<segment>
+<pinref part="U$1" gate="G$2" pin="FMC_D9/PE12"/>
+<wire x1="93.98" y1="-10.16" x2="116.84" y2="-10.16" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D8" class="2">
+<segment>
+<pinref part="U$1" gate="G$2" pin="FMC_D8/PE11"/>
+<wire x1="93.98" y1="-12.7" x2="116.84" y2="-12.7" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D7" class="2">
+<segment>
+<pinref part="U$1" gate="G$2" pin="FMC_D7/PE10"/>
+<wire x1="93.98" y1="-15.24" x2="116.84" y2="-15.24" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D6" class="2">
+<segment>
+<pinref part="U$1" gate="G$2" pin="FMC_D6/PE9"/>
+<wire x1="93.98" y1="-22.86" x2="116.84" y2="-22.86" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D5" class="2">
+<segment>
+<pinref part="U$1" gate="G$2" pin="FMC_D5/PE8"/>
+<wire x1="93.98" y1="-25.4" x2="116.84" y2="-25.4" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D21" class="2">
+<segment>
+<pinref part="U$1" gate="G$3" pin="FMC_D21/PH13"/>
+<wire x1="266.7" y1="170.18" x2="294.64" y2="170.18" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_A15" class="3">
+<segment>
+<pinref part="U$1" gate="G$3" pin="FMC_A15/PG5"/>
+<wire x1="266.7" y1="119.38" x2="294.64" y2="119.38" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_D2" class="2">
+<segment>
+<pinref part="U$1" gate="G$4" pin="PD0/FMC_D2"/>
+<wire x1="187.96" y1="17.78" x2="165.1" y2="17.78" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FMC_NE1" class="0">
+<segment>
+<pinref part="U$1" gate="G$4" pin="PD7/FMC_NE1/FMC_NCE2"/>
+<wire x1="187.96" y1="-5.08" x2="165.1" y2="-5.08" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="OSC_OUT" class="0">
+<segment>
+<pinref part="Q1" gate="G$1" pin="2"/>
+<wire x1="370.84" y1="48.26" x2="370.84" y2="43.18" width="0.1524" layer="91"/>
+<pinref part="C14" gate="G$1" pin="2"/>
+<wire x1="370.84" y1="43.18" x2="370.84" y2="15.24" width="0.1524" layer="91"/>
+<wire x1="370.84" y1="43.18" x2="378.46" y2="43.18" width="0.1524" layer="91"/>
+<junction x="370.84" y="43.18"/>
+<label x="373.38" y="15.24" size="1.778" layer="95" rot="R90"/>
+</segment>
+<segment>
+<pinref part="U$1" gate="G$1" pin="OSC_OUT/PH1"/>
+<wire x1="93.98" y1="137.16" x2="104.14" y2="137.16" width="0.1524" layer="91"/>
+<label x="104.14" y="137.16" size="1.27" layer="95" xref="yes"/>
+</segment>
+</net>
+<net name="OSC_IN" class="0">
+<segment>
+<pinref part="U$1" gate="G$1" pin="OSC_IN/PH0"/>
+<wire x1="93.98" y1="134.62" x2="104.14" y2="134.62" width="0.1524" layer="91"/>
+<label x="104.14" y="134.62" size="1.27" layer="95" xref="yes"/>
+</segment>
+<segment>
+<pinref part="R12" gate="G$1" pin="1"/>
+<wire x1="365.76" y1="27.94" x2="365.76" y2="15.24" width="0.1524" layer="91"/>
+<label x="365.76" y="15.24" size="1.778" layer="95" rot="R90"/>
+</segment>
+</net>
+<net name="SWDIO" class="0">
+<segment>
+<pinref part="U$2" gate="G$1" pin="SWDIO"/>
+<wire x1="436.88" y1="38.1" x2="434.34" y2="38.1" width="0.1524" layer="91"/>
+<label x="434.34" y="38.1" size="1.27" layer="95" rot="R180" xref="yes"/>
+</segment>
+<segment>
+<pinref part="U$1" gate="G$3" pin="JTMS-SWDIO/PA13"/>
+<wire x1="266.7" y1="160.02" x2="279.4" y2="160.02" width="0.1524" layer="91"/>
+<label x="279.4" y="160.02" size="1.27" layer="95" xref="yes"/>
+</segment>
+</net>
+<net name="SWDCLK" class="0">
+<segment>
+<pinref part="U$2" gate="G$1" pin="SWDCLK"/>
+<wire x1="436.88" y1="35.56" x2="434.34" y2="35.56" width="0.1524" layer="91"/>
+<label x="434.34" y="35.56" size="1.27" layer="95" rot="R180" xref="yes"/>
+</segment>
+<segment>
+<pinref part="U$1" gate="G$4" pin="PA14/JTCK-SWCLK"/>
+<wire x1="187.96" y1="30.48" x2="180.34" y2="30.48" width="0.1524" layer="91"/>
+<label x="180.34" y="30.48" size="1.27" layer="95" rot="R180" xref="yes"/>
+</segment>
+</net>
+<net name="NRST" class="0">
+<segment>
+<pinref part="U$2" gate="G$1" pin="NRST"/>
+<pinref part="C40" gate="G$1" pin="P$1"/>
+<wire x1="436.88" y1="27.94" x2="436.88" y2="30.48" width="0.1524" layer="91"/>
+<wire x1="436.88" y1="30.48" x2="434.34" y2="30.48" width="0.1524" layer="91"/>
+<junction x="436.88" y="30.48"/>
+<label x="434.34" y="30.48" size="1.27" layer="95" rot="R180" xref="yes"/>
+</segment>
+<segment>
+<pinref part="U$1" gate="G$1" pin="NRST at 34"/>
+<wire x1="96.52" y1="139.7" x2="104.14" y2="139.7" width="0.1524" layer="91"/>
+<label x="104.14" y="139.7" size="1.27" layer="95" xref="yes"/>
+</segment>
+</net>
+<net name="VCAP2" class="0">
+<segment>
+<pinref part="U$1" gate="G$3" pin="VCAP2 at 148"/>
+<wire x1="269.24" y1="198.12" x2="274.32" y2="198.12" width="0.1524" layer="91"/>
+<pinref part="C38" gate="G$1" pin="P$2"/>
+<wire x1="274.32" y1="198.12" x2="274.32" y2="200.66" width="0.1524" layer="91"/>
+<pinref part="C57" gate="G$1" pin="P$2"/>
+<wire x1="274.32" y1="200.66" x2="274.32" y2="203.2" width="0.1524" layer="91"/>
+<wire x1="269.24" y1="203.2" x2="269.24" y2="200.66" width="0.1524" layer="91"/>
+<wire x1="269.24" y1="200.66" x2="274.32" y2="200.66" width="0.1524" layer="91"/>
+<junction x="274.32" y="200.66"/>
+</segment>
+</net>
+<net name="VCAP1" class="0">
+<segment>
+<wire x1="96.52" y1="53.34" x2="101.6" y2="53.34" width="0.1524" layer="91"/>
+<pinref part="C39" gate="G$1" pin="P$2"/>
+<wire x1="101.6" y1="53.34" x2="101.6" y2="55.88" width="0.1524" layer="91"/>
+<pinref part="U$1" gate="G$2" pin="VCAP1 at 92"/>
+<pinref part="C56" gate="G$1" pin="P$2"/>
+<wire x1="101.6" y1="55.88" x2="101.6" y2="58.42" width="0.1524" layer="91"/>
+<wire x1="96.52" y1="58.42" x2="96.52" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="96.52" y1="55.88" x2="101.6" y2="55.88" width="0.1524" layer="91"/>
+<junction x="101.6" y="55.88"/>
+</segment>
+</net>
+<net name="BOOT0" class="1">
+<segment>
+<pinref part="U$1" gate="G$4" pin="BOOT0 at 197"/>
+<wire x1="269.24" y1="-43.18" x2="274.32" y2="-43.18" width="0.1524" layer="91"/>
+<pinref part="R10" gate="G$1" pin="2"/>
+</segment>
+</net>
+<net name="N$21" class="0">
+<segment>
+<pinref part="Q1" gate="G$1" pin="1"/>
+<pinref part="C15" gate="G$1" pin="2"/>
+<wire x1="365.76" y1="48.26" x2="365.76" y2="43.18" width="0.1524" layer="91"/>
+<wire x1="365.76" y1="43.18" x2="358.14" y2="43.18" width="0.1524" layer="91"/>
+<wire x1="365.76" y1="43.18" x2="365.76" y2="38.1" width="0.1524" layer="91"/>
+<junction x="365.76" y="43.18"/>
+<pinref part="R12" gate="G$1" pin="2"/>
+</segment>
+</net>
+<net name="FT_TXD" class="0">
+<segment>
+<pinref part="U$1" gate="G$1" pin="USART2_RX/PA3"/>
+<wire x1="93.98" y1="182.88" x2="101.6" y2="182.88" width="0.1524" layer="91"/>
+<label x="101.6" y="182.88" size="1.27" layer="95" xref="yes"/>
+</segment>
+</net>
+<net name="FT_RXD" class="0">
+<segment>
+<pinref part="U$1" gate="G$1" pin="USART2_TX/PA2"/>
+<wire x1="93.98" y1="170.18" x2="101.6" y2="170.18" width="0.1524" layer="91"/>
+<label x="101.6" y="170.18" size="1.27" layer="95" xref="yes"/>
+</segment>
+</net>
+<net name="ARM_LED1" class="0">
+<segment>
+<pinref part="U$1" gate="G$2" pin="PJ4"/>
+<wire x1="15.24" y1="-2.54" x2="10.16" y2="-2.54" width="0.1524" layer="91"/>
+<label x="10.16" y="-2.54" size="1.27" layer="95" rot="R180" xref="yes"/>
+</segment>
+<segment>
+<wire x1="403.86" y1="-20.32" x2="398.78" y2="-20.32" width="0.1524" layer="91"/>
+<label x="398.78" y="-20.32" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="R8" gate="A" pin="5"/>
+</segment>
+</net>
+<net name="ARM_LED2" class="0">
+<segment>
+<pinref part="U$1" gate="G$2" pin="PJ3"/>
+<wire x1="15.24" y1="0" x2="10.16" y2="0" width="0.1524" layer="91"/>
+<label x="10.16" y="0" size="1.27" layer="95" rot="R180" xref="yes"/>
+</segment>
+<segment>
+<wire x1="403.86" y1="-22.86" x2="398.78" y2="-22.86" width="0.1524" layer="91"/>
+<label x="398.78" y="-22.86" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="R8" gate="A" pin="6"/>
+</segment>
+</net>
+<net name="ARM_LED3" class="0">
+<segment>
+<pinref part="U$1" gate="G$2" pin="PJ2"/>
+<wire x1="15.24" y1="2.54" x2="10.16" y2="2.54" width="0.1524" layer="91"/>
+<label x="10.16" y="2.54" size="1.27" layer="95" rot="R180" xref="yes"/>
+</segment>
+<segment>
+<wire x1="403.86" y1="-25.4" x2="398.78" y2="-25.4" width="0.1524" layer="91"/>
+<label x="398.78" y="-25.4" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="R8" gate="A" pin="7"/>
+</segment>
+</net>
+<net name="ARM_LED4" class="0">
+<segment>
+<pinref part="U$1" gate="G$2" pin="PJ1"/>
+<wire x1="15.24" y1="5.08" x2="10.16" y2="5.08" width="0.1524" layer="91"/>
+<label x="10.16" y="5.08" size="1.27" layer="95" rot="R180" xref="yes"/>
+</segment>
+<segment>
+<wire x1="403.86" y1="-27.94" x2="398.78" y2="-27.94" width="0.1524" layer="91"/>
+<label x="398.78" y="-27.94" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="R8" gate="A" pin="8"/>
+</segment>
+</net>
+<net name="MKM_FPGA_CS" class="0">
+<segment>
+<wire x1="15.24" y1="27.94" x2="2.54" y2="27.94" width="0.1524" layer="91"/>
+<wire x1="2.54" y1="27.94" x2="2.54" y2="38.1" width="0.1524" layer="91"/>
+<label x="2.54" y="38.1" size="1.27" layer="95" rot="R90" xref="yes"/>
+<pinref part="U$1" gate="G$2" pin="PC4"/>
+</segment>
+</net>
+<net name="MKM_FPGA_SCK" class="0">
+<segment>
+<pinref part="U$1" gate="G$2" pin="PA5/SPI1_SCK"/>
+<wire x1="15.24" y1="35.56" x2="10.16" y2="35.56" width="0.1524" layer="91"/>
+<wire x1="10.16" y1="35.56" x2="10.16" y2="38.1" width="0.1524" layer="91"/>
+<label x="10.16" y="38.1" size="1.27" layer="95" rot="R90" xref="yes"/>
+</segment>
+</net>
+<net name="MKM_FPGA_MISO" class="0">
+<segment>
+<wire x1="15.24" y1="33.02" x2="7.62" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="7.62" y1="33.02" x2="7.62" y2="38.1" width="0.1524" layer="91"/>
+<label x="7.62" y="38.1" size="1.27" layer="95" rot="R90" xref="yes"/>
+<pinref part="U$1" gate="G$2" pin="PA6/SPI1_MISO"/>
+</segment>
+</net>
+<net name="MKM_FPGA_MOSI" class="0">
+<segment>
+<wire x1="15.24" y1="30.48" x2="5.08" y2="30.48" width="0.1524" layer="91"/>
+<wire x1="5.08" y1="30.48" x2="5.08" y2="38.1" width="0.1524" layer="91"/>
+<label x="5.08" y="38.1" size="1.27" layer="95" rot="R90" xref="yes"/>
+<pinref part="U$1" gate="G$2" pin="PA7/SPI1_MOSI"/>
+</segment>
+</net>
+<net name="AVR_GPIO_11" class="0">
+<segment>
+<wire x1="15.24" y1="154.94" x2="12.7" y2="154.94" width="0.1524" layer="91"/>
+<label x="12.7" y="154.94" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U$1" gate="G$1" pin="PI11"/>
+</segment>
+</net>
+<net name="AVR_GPIO_10" class="0">
+<segment>
+<wire x1="15.24" y1="167.64" x2="12.7" y2="167.64" width="0.1524" layer="91"/>
+<label x="12.7" y="167.64" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U$1" gate="G$1" pin="PC13"/>
+</segment>
+</net>
+<net name="RTC_SCL" class="0">
+<segment>
+<pinref part="U$1" gate="G$1" pin="PH4"/>
+<wire x1="93.98" y1="177.8" x2="101.6" y2="177.8" width="0.1524" layer="91"/>
+<label x="101.6" y="177.8" size="1.27" layer="95" xref="yes"/>
+</segment>
+</net>
+<net name="RTC_SDA" class="0">
+<segment>
+<pinref part="U$1" gate="G$1" pin="FMC_SDNWE/PH5"/>
+<wire x1="93.98" y1="180.34" x2="101.6" y2="180.34" width="0.1524" layer="91"/>
+<label x="101.6" y="180.34" size="1.27" layer="95" xref="yes"/>
+</segment>
+</net>
+<net name="RTC_MFP" class="0">
+<segment>
+<pinref part="U$1" gate="G$1" pin="FMC_SDNE0/PH3"/>
+<wire x1="93.98" y1="175.26" x2="101.6" y2="175.26" width="0.1524" layer="91"/>
+<label x="101.6" y="175.26" size="1.27" layer="95" xref="yes"/>
+</segment>
+</net>
+<net name="N$17" class="0">
+<segment>
+<pinref part="LED5" gate="G$1" pin="A"/>
+<wire x1="424.18" y1="-20.32" x2="431.8" y2="-20.32" width="0.1524" layer="91"/>
+<pinref part="R8" gate="A" pin="4"/>
+</segment>
+</net>
+<net name="N$18" class="0">
+<segment>
+<pinref part="LED6" gate="G$1" pin="A"/>
+<wire x1="424.18" y1="-22.86" x2="426.72" y2="-22.86" width="0.1524" layer="91"/>
+<pinref part="R8" gate="A" pin="3"/>
+</segment>
+</net>
+<net name="N$19" class="0">
+<segment>
+<pinref part="LED7" gate="G$1" pin="A"/>
+<wire x1="424.18" y1="-25.4" x2="431.8" y2="-25.4" width="0.1524" layer="91"/>
+<pinref part="R8" gate="A" pin="2"/>
+</segment>
+</net>
+<net name="N$20" class="0">
+<segment>
+<pinref part="LED8" gate="G$1" pin="A"/>
+<wire x1="424.18" y1="-27.94" x2="426.72" y2="-27.94" width="0.1524" layer="91"/>
+<pinref part="R8" gate="A" pin="1"/>
+</segment>
+</net>
+</nets>
+</sheet>
+<sheet>
+<description>USB-UART interface</description>
 <plain>
-<text x="60.96" y="109.22" size="3.81" layer="91">Novena FPGA connector</text>
-<text x="251.46" y="134.62" size="3.81" layer="91">Extra</text>
+<text x="2.54" y="83.82" size="1.778" layer="91">DS_FT232H.pdf
+6.1 USB Bus Powered Configuration
+copy of reference circuit</text>
+<text x="96.52" y="-17.78" size="1.27" layer="91">Place close to FT232</text>
 </plain>
 <instances>
-<instance part="SUPPLY2" gate="GND" x="160.02" y="73.66" smashed="yes" rot="MR270">
-<attribute name="VALUE" x="163.195" y="74.295" size="1.778" layer="96" rot="MR180"/>
+<instance part="U$3" gate="G$1" x="73.66" y="43.18"/>
+<instance part="R11" gate="G$1" x="38.1" y="50.8" rot="R180"/>
+<instance part="C41" gate="G$1" x="20.32" y="53.34" smashed="yes">
+<attribute name="NAME" x="22.86" y="57.15" size="1.6764" layer="95" rot="R90"/>
 </instance>
-<instance part="FRAME1" gate="G$1" x="22.86" y="-106.68"/>
-<instance part="LOGO1" gate="G$1" x="264.16" y="121.92"/>
-<instance part="CON1" gate="G$1" x="104.14" y="20.32"/>
-<instance part="JP2" gate="G$1" x="321.31" y="50.8" rot="R180"/>
-<instance part="JP1" gate="G$1" x="318.77" y="123.19" rot="R180"/>
-<instance part="SUPPLY7" gate="GND" x="160.02" y="91.44" smashed="yes" rot="MR270">
-<attribute name="VALUE" x="163.195" y="94.615" size="1.778" layer="96" rot="MR180"/>
+<instance part="C42" gate="G$1" x="15.24" y="53.34" smashed="yes">
+<attribute name="NAME" x="12.7" y="57.15" size="1.6764" layer="95" rot="R90"/>
+<attribute name="VALUE" x="10.16" y="53.34" size="1.6764" layer="96" rot="R90"/>
 </instance>
-<instance part="SUPPLY16" gate="GND" x="160.02" y="-27.94" smashed="yes" rot="MR270">
-<attribute name="VALUE" x="163.195" y="-27.305" size="1.778" layer="96" rot="MR180"/>
+<instance part="SUPPLY30" gate="GND" x="17.78" y="43.18"/>
+<instance part="SUPPLY31" gate="GND" x="76.2" y="-2.54"/>
+<instance part="R13" gate="G$1" x="30.48" y="40.64" smashed="yes" rot="R270">
+<attribute name="NAME" x="31.9786" y="44.45" size="1.778" layer="95" rot="R270"/>
+<attribute name="VALUE" x="27.178" y="46.99" size="1.778" layer="96" rot="R270"/>
 </instance>
-<instance part="FID1" gate="G$1" x="302.26" y="73.66"/>
-<instance part="FID2" gate="G$1" x="302.26" y="81.28"/>
-<instance part="FID3" gate="G$1" x="302.26" y="88.9"/>
-<instance part="FID4" gate="G$1" x="309.88" y="88.9"/>
-<instance part="FID5" gate="G$1" x="309.88" y="81.28"/>
-<instance part="FID6" gate="G$1" x="309.88" y="73.66"/>
-<instance part="FID7" gate="G$1" x="287.02" y="73.66"/>
-<instance part="FID8" gate="G$1" x="287.02" y="81.28"/>
-<instance part="FID9" gate="G$1" x="287.02" y="88.9"/>
-<instance part="FID10" gate="G$1" x="294.64" y="88.9"/>
-<instance part="FID11" gate="G$1" x="294.64" y="81.28"/>
-<instance part="FID12" gate="G$1" x="294.64" y="73.66"/>
-<instance part="FID13" gate="G$1" x="317.5" y="88.9"/>
-<instance part="FID14" gate="G$1" x="317.5" y="81.28"/>
-<instance part="FID15" gate="G$1" x="317.5" y="73.66"/>
+<instance part="SUPPLY32" gate="GND" x="30.48" y="30.48"/>
+<instance part="R14" gate="G$1" x="109.22" y="43.18" smashed="yes" rot="R180">
+<attribute name="NAME" x="113.03" y="46.7614" size="1.778" layer="95" rot="R180"/>
+<attribute name="VALUE" x="107.95" y="46.482" size="1.778" layer="96" rot="R180"/>
+</instance>
+<instance part="R15" gate="G$1" x="109.22" y="40.64" smashed="yes" rot="R180">
+<attribute name="NAME" x="113.03" y="39.1414" size="1.778" layer="95" rot="R180"/>
+</instance>
+<instance part="LED9" gate="G$1" x="121.92" y="50.8" rot="MR0"/>
+<instance part="LED10" gate="G$1" x="127" y="50.8" smashed="yes" rot="MR0">
+<attribute name="NAME" x="131.064" y="46.228" size="1.778" layer="95" rot="MR90"/>
+<attribute name="VALUE" x="133.985" y="46.228" size="1.778" layer="96" rot="MR90"/>
+</instance>
+<instance part="SUPPLY33" gate="GND" x="45.72" y="-2.54"/>
+<instance part="C43" gate="G$1" x="30.48" y="7.62" smashed="yes" rot="R180">
+<attribute name="NAME" x="34.544" y="8.001" size="1.778" layer="95"/>
+<attribute name="VALUE" x="34.544" y="10.541" size="1.778" layer="96"/>
+</instance>
+<instance part="C44" gate="G$1" x="15.24" y="7.62" smashed="yes" rot="R180">
+<attribute name="NAME" x="11.176" y="9.779" size="1.778" layer="95" rot="R180"/>
+<attribute name="VALUE" x="11.176" y="12.319" size="1.778" layer="96" rot="R180"/>
+</instance>
+<instance part="SUPPLY34" gate="GND" x="15.24" y="-2.54"/>
+<instance part="SUPPLY35" gate="GND" x="30.48" y="-2.54"/>
+<instance part="FT_VCC3V3" gate="VCC" x="76.2" y="96.52"/>
+<instance part="FT_VCC3V3_1" gate="VCC" x="124.46" y="63.5"/>
+<instance part="C45" gate="G$1" x="12.7" y="-35.56" smashed="yes">
+<attribute name="NAME" x="10.16" y="-31.75" size="1.6764" layer="95" rot="R90"/>
+<attribute name="VALUE" x="7.62" y="-35.56" size="1.6764" layer="96" rot="R90"/>
+</instance>
+<instance part="C46" gate="G$1" x="20.32" y="-35.56" smashed="yes">
+<attribute name="NAME" x="17.78" y="-31.75" size="1.6764" layer="95" rot="R90"/>
+<attribute name="VALUE" x="25.4" y="-35.56" size="1.6764" layer="96" rot="R90"/>
+</instance>
+<instance part="SUPPLY36" gate="GND" x="20.32" y="-45.72"/>
+<instance part="C47" gate="G$1" x="142.24" y="-38.1" smashed="yes">
+<attribute name="NAME" x="139.7" y="-34.29" size="1.6764" layer="95" rot="R90"/>
+<attribute name="VALUE" x="137.16" y="-38.1" size="1.6764" layer="96" rot="R90"/>
+</instance>
+<instance part="C48" gate="G$1" x="149.86" y="-38.1" smashed="yes">
+<attribute name="NAME" x="147.32" y="-34.29" size="1.6764" layer="95" rot="R90"/>
+<attribute name="VALUE" x="154.94" y="-38.1" size="1.6764" layer="96" rot="R90"/>
+</instance>
+<instance part="SUPPLY37" gate="GND" x="149.86" y="-48.26"/>
+<instance part="C49" gate="G$1" x="71.12" y="-38.1" smashed="yes">
+<attribute name="NAME" x="68.58" y="-34.29" size="1.6764" layer="95" rot="R90"/>
+<attribute name="VALUE" x="76.2" y="-38.1" size="1.6764" layer="96" rot="R90"/>
+</instance>
+<instance part="C50" gate="G$1" x="58.42" y="-38.1" smashed="yes">
+<attribute name="NAME" x="55.88" y="-39.37" size="1.6764" layer="95" rot="R90"/>
+<attribute name="VALUE" x="63.5" y="-38.1" size="1.6764" layer="96" rot="R90"/>
+</instance>
+<instance part="SUPPLY38" gate="GND" x="71.12" y="-45.72"/>
+<instance part="C51" gate="G$1" x="116.84" y="-38.1" smashed="yes">
+<attribute name="NAME" x="114.3" y="-34.29" size="1.6764" layer="95" rot="R90"/>
+<attribute name="VALUE" x="121.92" y="-38.1" size="1.6764" layer="96" rot="R90"/>
+</instance>
+<instance part="C52" gate="G$1" x="104.14" y="-38.1" smashed="yes">
+<attribute name="NAME" x="101.6" y="-39.37" size="1.6764" layer="95" rot="R90"/>
+<attribute name="VALUE" x="109.22" y="-38.1" size="1.6764" layer="96" rot="R90"/>
+</instance>
+<instance part="SUPPLY39" gate="GND" x="116.84" y="-45.72"/>
+<instance part="C53" gate="G$1" x="124.46" y="12.7" smashed="yes">
+<attribute name="NAME" x="121.92" y="16.51" size="1.6764" layer="95" rot="R90"/>
+</instance>
+<instance part="C54" gate="G$1" x="129.54" y="12.7" smashed="yes">
+<attribute name="NAME" x="127" y="16.51" size="1.6764" layer="95" rot="R90"/>
+</instance>
+<instance part="C55" gate="G$1" x="134.62" y="12.7" smashed="yes">
+<attribute name="NAME" x="132.08" y="16.51" size="1.6764" layer="95" rot="R90"/>
+<attribute name="VALUE" x="139.7" y="12.7" size="1.6764" layer="96" rot="R90"/>
+</instance>
+<instance part="SUPPLY40" gate="GND" x="129.54" y="-2.54"/>
+<instance part="FT_VCC3V3_2" gate="VCC" x="129.54" y="33.02"/>
+<instance part="FB1" gate="G$1" x="96.52" y="-27.94"/>
+<instance part="FB2" gate="G$1" x="50.8" y="-27.94"/>
+<instance part="CN1" gate="G$1" x="-77.47" y="8.89"/>
+<instance part="SUPPLY41" gate="GND" x="-64.77" y="-2.54"/>
+<instance part="Y1" gate="G$1" x="22.86" y="17.78" smashed="yes">
+<attribute name="NAME" x="22.86" y="12.7" size="1.27" layer="95"/>
+<attribute name="VALUE" x="17.78" y="21.59" size="1.27" layer="96"/>
+</instance>
+<instance part="SJ3" gate="1" x="-59.69" y="8.89"/>
+<instance part="SJ4" gate="1" x="-52.07" y="11.43"/>
+<instance part="FRAME2" gate="G$1" x="-114.3" y="-129.54"/>
 </instances>
 <busses>
-<bus name="FMC_D[0..31],FMC_A[0..19],FMC_NE1,FMC_NOE,FMC_NWE,FMC_NL,FMC_NWAIT">
+</busses>
+<nets>
+<net name="GND" class="1">
+<segment>
+<pinref part="C41" gate="G$1" pin="P$2"/>
+<pinref part="SUPPLY30" gate="GND" pin="GND"/>
+<wire x1="20.32" y1="50.8" x2="20.32" y2="45.72" width="0.1524" layer="91"/>
+<wire x1="20.32" y1="45.72" x2="17.78" y2="45.72" width="0.1524" layer="91"/>
+<wire x1="17.78" y1="45.72" x2="15.24" y2="45.72" width="0.1524" layer="91"/>
+<junction x="17.78" y="45.72"/>
+<pinref part="C42" gate="G$1" pin="P$2"/>
+<wire x1="15.24" y1="45.72" x2="15.24" y2="50.8" width="0.1524" layer="91"/>
+</segment>
 <segment>
-<wire x1="60.96" y1="99.06" x2="60.96" y2="-40.64" width="0.762" layer="92"/>
-<label x="55.88" y="101.6" size="1.778" layer="95"/>
-<wire x1="60.96" y1="-40.64" x2="185.42" y2="-40.64" width="0.762" layer="92"/>
-<wire x1="185.42" y1="-40.64" x2="185.42" y2="73.66" width="0.762" layer="92"/>
+<pinref part="U$3" gate="G$1" pin="GND at 48"/>
+<wire x1="88.9" y1="5.08" x2="88.9" y2="0" width="0.1524" layer="91"/>
+<pinref part="SUPPLY31" gate="GND" pin="GND"/>
+<wire x1="88.9" y1="0" x2="86.36" y2="0" width="0.1524" layer="91"/>
+<pinref part="U$3" gate="G$1" pin="AGND at 4"/>
+<wire x1="86.36" y1="0" x2="83.82" y2="0" width="0.1524" layer="91"/>
+<wire x1="83.82" y1="0" x2="81.28" y2="0" width="0.1524" layer="91"/>
+<wire x1="81.28" y1="0" x2="78.74" y2="0" width="0.1524" layer="91"/>
+<wire x1="78.74" y1="0" x2="76.2" y2="0" width="0.1524" layer="91"/>
+<wire x1="63.5" y1="5.08" x2="63.5" y2="0" width="0.1524" layer="91"/>
+<wire x1="63.5" y1="0" x2="66.04" y2="0" width="0.1524" layer="91"/>
+<junction x="76.2" y="0"/>
+<pinref part="U$3" gate="G$1" pin="AGND at 9"/>
+<wire x1="66.04" y1="0" x2="68.58" y2="0" width="0.1524" layer="91"/>
+<wire x1="68.58" y1="0" x2="71.12" y2="0" width="0.1524" layer="91"/>
+<wire x1="71.12" y1="0" x2="73.66" y2="0" width="0.1524" layer="91"/>
+<wire x1="73.66" y1="0" x2="76.2" y2="0" width="0.1524" layer="91"/>
+<wire x1="66.04" y1="5.08" x2="66.04" y2="0" width="0.1524" layer="91"/>
+<junction x="66.04" y="0"/>
+<pinref part="U$3" gate="G$1" pin="AGND at 41"/>
+<wire x1="68.58" y1="5.08" x2="68.58" y2="0" width="0.1524" layer="91"/>
+<junction x="68.58" y="0"/>
+<pinref part="U$3" gate="G$1" pin="GND at 10"/>
+<wire x1="71.12" y1="5.08" x2="71.12" y2="0" width="0.1524" layer="91"/>
+<junction x="71.12" y="0"/>
+<pinref part="U$3" gate="G$1" pin="GND at 11"/>
+<wire x1="73.66" y1="5.08" x2="73.66" y2="0" width="0.1524" layer="91"/>
+<junction x="73.66" y="0"/>
+<pinref part="U$3" gate="G$1" pin="GND at 22"/>
+<wire x1="76.2" y1="5.08" x2="76.2" y2="0" width="0.1524" layer="91"/>
+<pinref part="U$3" gate="G$1" pin="GND at 23"/>
+<wire x1="78.74" y1="5.08" x2="78.74" y2="0" width="0.1524" layer="91"/>
+<junction x="78.74" y="0"/>
+<pinref part="U$3" gate="G$1" pin="GND at 35"/>
+<wire x1="81.28" y1="5.08" x2="81.28" y2="0" width="0.1524" layer="91"/>
+<junction x="81.28" y="0"/>
+<pinref part="U$3" gate="G$1" pin="GND at 36"/>
+<wire x1="83.82" y1="5.08" x2="83.82" y2="0" width="0.1524" layer="91"/>
+<junction x="83.82" y="0"/>
+<pinref part="U$3" gate="G$1" pin="GND at 47"/>
+<wire x1="86.36" y1="5.08" x2="86.36" y2="0" width="0.1524" layer="91"/>
+<junction x="86.36" y="0"/>
 </segment>
-</bus>
-<bus name="FMC_A[20..21],DIGITIZED">
 <segment>
-<wire x1="195.58" y1="45.72" x2="195.58" y2="40.64" width="0.762" layer="92"/>
-<label x="200.66" y="30.48" size="1.778" layer="95" rot="R90"/>
+<pinref part="R13" gate="G$1" pin="2"/>
+<wire x1="30.48" y1="35.56" x2="30.48" y2="33.02" width="0.1524" layer="91"/>
+<pinref part="SUPPLY32" gate="GND" pin="GND"/>
 </segment>
 <segment>
-<wire x1="195.58" y1="10.16" x2="195.58" y2="5.08" width="0.762" layer="92"/>
-<label x="200.66" y="-2.54" size="1.778" layer="95" rot="R90"/>
+<pinref part="U$3" gate="G$1" pin="TEST"/>
+<pinref part="SUPPLY33" gate="GND" pin="GND"/>
+<wire x1="45.72" y1="12.7" x2="45.72" y2="0" width="0.1524" layer="91"/>
 </segment>
 <segment>
-<wire x1="55.88" y1="22.86" x2="55.88" y2="17.78" width="0.762" layer="92"/>
-<label x="53.34" y="7.62" size="1.778" layer="95" rot="R90"/>
+<pinref part="C44" gate="G$1" pin="1"/>
+<wire x1="15.24" y1="5.08" x2="15.24" y2="0" width="0.1524" layer="91"/>
+<pinref part="SUPPLY34" gate="GND" pin="GND"/>
 </segment>
-</bus>
-</busses>
-<nets>
-<net name="GND" class="1">
 <segment>
-<wire x1="149.86" y1="73.66" x2="157.48" y2="73.66" width="0.1524" layer="91"/>
-<pinref part="SUPPLY2" gate="GND" pin="GND"/>
-<pinref part="CON1" gate="G$1" pin="GND at 7"/>
+<wire x1="30.48" y1="5.08" x2="30.48" y2="0" width="0.1524" layer="91"/>
+<pinref part="SUPPLY35" gate="GND" pin="GND"/>
+<pinref part="C43" gate="G$1" pin="1"/>
 </segment>
 <segment>
-<wire x1="309.88" y1="125.73" x2="313.69" y2="125.73" width="0.1524" layer="91"/>
-<label x="309.88" y="128.27" size="1.778" layer="95" rot="R180"/>
-<pinref part="JP1" gate="G$1" pin="1"/>
+<pinref part="C45" gate="G$1" pin="P$2"/>
+<pinref part="SUPPLY36" gate="GND" pin="GND"/>
+<wire x1="12.7" y1="-38.1" x2="12.7" y2="-43.18" width="0.1524" layer="91"/>
+<wire x1="12.7" y1="-43.18" x2="20.32" y2="-43.18" width="0.1524" layer="91"/>
+<pinref part="C46" gate="G$1" pin="P$2"/>
+<wire x1="20.32" y1="-38.1" x2="20.32" y2="-43.18" width="0.1524" layer="91"/>
+<junction x="20.32" y="-43.18"/>
 </segment>
 <segment>
-<pinref part="JP2" gate="G$1" pin="1"/>
-<wire x1="313.69" y1="53.34" x2="309.88" y2="53.34" width="0.1524" layer="91"/>
-<label x="303.53" y="53.34" size="1.778" layer="95"/>
+<pinref part="C47" gate="G$1" pin="P$2"/>
+<pinref part="SUPPLY37" gate="GND" pin="GND"/>
+<wire x1="142.24" y1="-40.64" x2="142.24" y2="-45.72" width="0.1524" layer="91"/>
+<wire x1="142.24" y1="-45.72" x2="149.86" y2="-45.72" width="0.1524" layer="91"/>
+<pinref part="C48" gate="G$1" pin="P$2"/>
+<wire x1="149.86" y1="-40.64" x2="149.86" y2="-45.72" width="0.1524" layer="91"/>
+<junction x="149.86" y="-45.72"/>
 </segment>
 <segment>
-<pinref part="SUPPLY7" gate="GND" pin="GND"/>
-<pinref part="CON1" gate="G$1" pin="GUIDE at L"/>
-<wire x1="157.48" y1="91.44" x2="149.86" y2="91.44" width="0.1524" layer="91"/>
+<pinref part="C50" gate="G$1" pin="P$2"/>
+<wire x1="58.42" y1="-40.64" x2="58.42" y2="-43.18" width="0.1524" layer="91"/>
+<wire x1="58.42" y1="-43.18" x2="71.12" y2="-43.18" width="0.1524" layer="91"/>
+<pinref part="C49" gate="G$1" pin="P$2"/>
+<wire x1="71.12" y1="-43.18" x2="71.12" y2="-40.64" width="0.1524" layer="91"/>
+<junction x="71.12" y="-43.18"/>
+<pinref part="SUPPLY38" gate="GND" pin="GND"/>
 </segment>
 <segment>
-<pinref part="CON1" gate="G$1" pin="GUIDE at R"/>
-<pinref part="SUPPLY16" gate="GND" pin="GND"/>
-<wire x1="149.86" y1="-27.94" x2="157.48" y2="-27.94" width="0.1524" layer="91"/>
+<pinref part="C52" gate="G$1" pin="P$2"/>
+<wire x1="104.14" y1="-40.64" x2="104.14" y2="-43.18" width="0.1524" layer="91"/>
+<wire x1="104.14" y1="-43.18" x2="116.84" y2="-43.18" width="0.1524" layer="91"/>
+<pinref part="C51" gate="G$1" pin="P$2"/>
+<wire x1="116.84" y1="-43.18" x2="116.84" y2="-40.64" width="0.1524" layer="91"/>
+<junction x="116.84" y="-43.18"/>
+<pinref part="SUPPLY39" gate="GND" pin="GND"/>
+</segment>
+<segment>
+<pinref part="C53" gate="G$1" pin="P$2"/>
+<wire x1="124.46" y1="10.16" x2="124.46" y2="5.08" width="0.1524" layer="91"/>
+<wire x1="124.46" y1="5.08" x2="129.54" y2="5.08" width="0.1524" layer="91"/>
+<pinref part="C55" gate="G$1" pin="P$2"/>
+<wire x1="129.54" y1="5.08" x2="134.62" y2="5.08" width="0.1524" layer="91"/>
+<wire x1="134.62" y1="5.08" x2="134.62" y2="10.16" width="0.1524" layer="91"/>
+<pinref part="C54" gate="G$1" pin="P$2"/>
+<wire x1="129.54" y1="10.16" x2="129.54" y2="5.08" width="0.1524" layer="91"/>
+<junction x="129.54" y="5.08"/>
+<pinref part="SUPPLY40" gate="GND" pin="GND"/>
+<wire x1="129.54" y1="5.08" x2="129.54" y2="0" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<wire x1="-67.31" y1="3.81" x2="-64.77" y2="3.81" width="0.1524" layer="91"/>
+<pinref part="CN1" gate="G$1" pin="GND"/>
+<pinref part="SUPPLY41" gate="GND" pin="GND"/>
+<wire x1="-64.77" y1="3.81" x2="-64.77" y2="0" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="5V" class="0">
+<net name="FT_RESET" class="0">
 <segment>
-<pinref part="JP2" gate="G$1" pin="3"/>
-<wire x1="313.69" y1="48.26" x2="309.88" y2="48.26" width="0.1524" layer="91"/>
-<label x="306.07" y="48.26" size="1.778" layer="95"/>
+<pinref part="U$3" gate="G$1" pin="!RESET"/>
+<pinref part="R11" gate="G$1" pin="1"/>
+<wire x1="45.72" y1="50.8" x2="43.18" y2="50.8" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="3V3" class="0">
+<net name="FT_VCCA" class="0">
 <segment>
-<pinref part="JP2" gate="G$1" pin="2"/>
-<wire x1="313.69" y1="50.8" x2="309.88" y2="50.8" width="0.1524" layer="91"/>
-<label x="304.8" y="50.8" size="1.778" layer="95"/>
+<pinref part="U$3" gate="G$1" pin="VCCA"/>
+<wire x1="45.72" y1="63.5" x2="20.32" y2="63.5" width="0.1524" layer="91"/>
+<wire x1="20.32" y1="63.5" x2="20.32" y2="58.42" width="0.1524" layer="91"/>
+<pinref part="C41" gate="G$1" pin="P$1"/>
 </segment>
+</net>
+<net name="FT_VCCORE" class="0">
 <segment>
-<pinref part="JP1" gate="G$1" pin="3"/>
-<wire x1="313.69" y1="120.65" x2="309.88" y2="120.65" width="0.1524" layer="91"/>
-<label x="309.88" y="121.92" size="1.778" layer="95" rot="R180"/>
+<pinref part="U$3" gate="G$1" pin="VCCORE"/>
+<wire x1="45.72" y1="66.04" x2="15.24" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="15.24" y1="66.04" x2="15.24" y2="58.42" width="0.1524" layer="91"/>
+<pinref part="C42" gate="G$1" pin="P$1"/>
 </segment>
 </net>
-<net name="DIGITIZED" class="0">
+<net name="USB_DP" class="0">
 <segment>
-<wire x1="313.69" y1="123.19" x2="309.88" y2="123.19" width="0.1524" layer="91"/>
-<pinref part="JP1" gate="G$1" pin="2"/>
-<label x="309.88" y="124.46" size="1.778" layer="95" rot="R180"/>
+<pinref part="U$3" gate="G$1" pin="DP"/>
+<wire x1="45.72" y1="55.88" x2="43.18" y2="55.88" width="0.1524" layer="91"/>
+<label x="43.18" y="55.88" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_DX18"/>
-<wire x1="91.44" y1="20.32" x2="55.88" y2="20.32" width="0.1524" layer="91"/>
-<label x="63.5" y="20.32" size="1.27" layer="95"/>
+<wire x1="-46.99" y1="11.43" x2="-41.91" y2="11.43" width="0.1524" layer="91"/>
+<label x="-41.91" y="11.43" size="1.016" layer="95" xref="yes"/>
+<pinref part="SJ4" gate="1" pin="2"/>
 </segment>
 </net>
-<net name="P-5.0V_MAIN" class="0">
+<net name="USB_DM" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="P-5.0V_MAIN at 36"/>
-<pinref part="CON1" gate="G$1" pin="P-5.0V_MAIN at 37"/>
-<junction x="149.86" y="78.74"/>
-<wire x1="149.86" y1="78.74" x2="149.86" y2="76.2" width="0.1524" layer="91"/>
-<pinref part="CON1" gate="G$1" pin="P-5.0V_MAIN at 38"/>
-<pinref part="CON1" gate="G$1" pin="P-5.0V_MAIN at 40"/>
-<wire x1="149.86" y1="86.36" x2="149.86" y2="83.82" width="0.1524" layer="91"/>
-<pinref part="CON1" gate="G$1" pin="P-5.0V_MAIN at 39"/>
-<junction x="149.86" y="83.82"/>
-<wire x1="149.86" y1="83.82" x2="149.86" y2="81.28" width="0.1524" layer="91"/>
-<wire x1="149.86" y1="81.28" x2="149.86" y2="78.74" width="0.1524" layer="91"/>
-<junction x="149.86" y="81.28"/>
-<wire x1="149.86" y1="81.28" x2="172.72" y2="81.28" width="0.1524" layer="91"/>
-<label x="172.72" y="81.28" size="1.778" layer="95" xref="yes"/>
+<pinref part="U$3" gate="G$1" pin="DM"/>
+<wire x1="45.72" y1="58.42" x2="43.18" y2="58.42" width="0.1524" layer="91"/>
+<label x="43.18" y="58.42" size="1.27" layer="95" rot="R180" xref="yes"/>
+</segment>
+<segment>
+<wire x1="-54.61" y1="8.89" x2="-41.91" y2="8.89" width="0.1524" layer="91"/>
+<label x="-41.91" y="8.89" size="1.016" layer="95" xref="yes"/>
+<pinref part="SJ3" gate="1" pin="2"/>
 </segment>
 </net>
-<net name="MINUS15V_STABLE" class="0">
+<net name="FT_VREGIN" class="0">
 <segment>
-<wire x1="313.69" y1="118.11" x2="309.88" y2="118.11" width="0.1524" layer="91"/>
-<pinref part="JP1" gate="G$1" pin="4"/>
-<label x="309.88" y="119.38" size="1.778" layer="95" rot="R180"/>
+<pinref part="U$3" gate="G$1" pin="VREGIN"/>
+<wire x1="45.72" y1="73.66" x2="43.18" y2="73.66" width="0.1524" layer="91"/>
+<label x="43.18" y="73.66" size="1.27" layer="95" rot="R180" xref="yes"/>
+</segment>
+<segment>
+<pinref part="C46" gate="G$1" pin="P$1"/>
+<wire x1="20.32" y1="-30.48" x2="20.32" y2="-22.86" width="0.1524" layer="91"/>
+<wire x1="20.32" y1="-22.86" x2="12.7" y2="-22.86" width="0.1524" layer="91"/>
+<pinref part="C45" gate="G$1" pin="P$1"/>
+<wire x1="12.7" y1="-22.86" x2="12.7" y2="-30.48" width="0.1524" layer="91"/>
+<wire x1="12.7" y1="-22.86" x2="12.7" y2="-17.78" width="0.1524" layer="91"/>
+<junction x="12.7" y="-22.86"/>
+<label x="7.62" y="-15.24" size="1.778" layer="95"/>
+</segment>
+<segment>
+<label x="-41.91" y="13.97" size="1.27" layer="95" xref="yes"/>
+<pinref part="CN1" gate="G$1" pin="VBUS"/>
+<wire x1="-67.31" y1="13.97" x2="-41.91" y2="13.97" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="FMC_CLK" class="0">
+<net name="FT_REF" class="0">
 <segment>
-<wire x1="93.98" y1="27.94" x2="55.88" y2="27.94" width="0.1524" layer="91"/>
-<label x="55.88" y="27.94" size="1.27" layer="95" rot="R90" xref="yes"/>
-<pinref part="CON1" gate="G$1" pin="F_LVDS_CK0_N"/>
+<pinref part="U$3" gate="G$1" pin="REF"/>
+<wire x1="45.72" y1="45.72" x2="30.48" y2="45.72" width="0.1524" layer="91"/>
+<pinref part="R13" gate="G$1" pin="1"/>
+</segment>
+</net>
+<net name="N$24" class="0">
+<segment>
+<pinref part="R14" gate="G$1" pin="1"/>
+<wire x1="114.3" y1="43.18" x2="121.92" y2="43.18" width="0.1524" layer="91"/>
+<pinref part="LED9" gate="G$1" pin="C"/>
+<wire x1="121.92" y1="43.18" x2="121.92" y2="45.72" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$26" class="0">
+<segment>
+<pinref part="R15" gate="G$1" pin="1"/>
+<wire x1="114.3" y1="40.64" x2="127" y2="40.64" width="0.1524" layer="91"/>
+<pinref part="LED10" gate="G$1" pin="C"/>
+<wire x1="127" y1="45.72" x2="127" y2="40.64" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FT_RXLED" class="0">
+<segment>
+<pinref part="U$3" gate="G$1" pin="RXLED#"/>
+<pinref part="R14" gate="G$1" pin="2"/>
+<wire x1="101.6" y1="43.18" x2="104.14" y2="43.18" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="FMC_D0" class="2">
+<net name="FT_TXLED" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_DX8"/>
-<wire x1="93.98" y1="-7.62" x2="60.96" y2="-7.62" width="0.1524" layer="91"/>
-<label x="63.5" y="-7.62" size="1.27" layer="95"/>
+<pinref part="U$3" gate="G$1" pin="TXLED#"/>
+<pinref part="R15" gate="G$1" pin="2"/>
+<wire x1="101.6" y1="40.64" x2="104.14" y2="40.64" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="FMC_D1" class="2">
+<net name="FT_VCC3V3" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS14_N"/>
-<wire x1="93.98" y1="-12.7" x2="60.96" y2="-12.7" width="0.1524" layer="91"/>
-<label x="63.5" y="-12.7" size="1.27" layer="95"/>
+<pinref part="U$3" gate="G$1" pin="VCCD"/>
+<wire x1="45.72" y1="68.58" x2="30.48" y2="68.58" width="0.1524" layer="91"/>
+<label x="15.24" y="71.12" size="1.778" layer="95"/>
+<pinref part="R11" gate="G$1" pin="2"/>
+<wire x1="30.48" y1="68.58" x2="15.24" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="33.02" y1="50.8" x2="30.48" y2="50.8" width="0.1524" layer="91"/>
+<wire x1="30.48" y1="50.8" x2="30.48" y2="68.58" width="0.1524" layer="91"/>
+<junction x="30.48" y="68.58"/>
 </segment>
-</net>
-<net name="FMC_D13" class="2">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_DX0"/>
-<wire x1="149.86" y1="-22.86" x2="185.42" y2="-22.86" width="0.1524" layer="91"/>
-<label x="172.72" y="-22.86" size="1.27" layer="95"/>
+<pinref part="FT_VCC3V3_1" gate="VCC" pin="VCC"/>
+<wire x1="124.46" y1="60.96" x2="124.46" y2="55.88" width="0.1524" layer="91"/>
+<pinref part="LED9" gate="G$1" pin="A"/>
+<wire x1="121.92" y1="53.34" x2="121.92" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="121.92" y1="55.88" x2="124.46" y2="55.88" width="0.1524" layer="91"/>
+<pinref part="LED10" gate="G$1" pin="A"/>
+<wire x1="124.46" y1="55.88" x2="127" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="127" y1="55.88" x2="127" y2="53.34" width="0.1524" layer="91"/>
+<junction x="124.46" y="55.88"/>
 </segment>
-</net>
-<net name="FMC_D14" class="2">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_DX3"/>
-<wire x1="149.86" y1="-20.32" x2="185.42" y2="-20.32" width="0.1524" layer="91"/>
+<pinref part="C47" gate="G$1" pin="P$1"/>
+<wire x1="142.24" y1="-33.02" x2="142.24" y2="-25.4" width="0.1524" layer="91"/>
+<pinref part="C48" gate="G$1" pin="P$1"/>
+<wire x1="142.24" y1="-25.4" x2="142.24" y2="-20.32" width="0.1524" layer="91"/>
+<wire x1="149.86" y1="-33.02" x2="149.86" y2="-25.4" width="0.1524" layer="91"/>
+<wire x1="149.86" y1="-25.4" x2="142.24" y2="-25.4" width="0.1524" layer="91"/>
+<junction x="142.24" y="-25.4"/>
+<label x="139.7" y="-17.78" size="1.778" layer="95"/>
 </segment>
-</net>
-<net name="FMC_D15" class="2">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_DX2"/>
-<wire x1="149.86" y1="-17.78" x2="185.42" y2="-17.78" width="0.1524" layer="91"/>
-<label x="172.72" y="-20.32" size="1.27" layer="95"/>
-<label x="172.72" y="-17.78" size="1.27" layer="95"/>
+<wire x1="45.72" y1="-27.94" x2="45.72" y2="-17.78" width="0.1524" layer="91"/>
+<label x="40.64" y="-15.24" size="1.778" layer="95"/>
+<pinref part="FB2" gate="G$1" pin="P$1"/>
+<wire x1="48.26" y1="-27.94" x2="45.72" y2="-27.94" width="0.1524" layer="91"/>
 </segment>
-</net>
-<net name="FMC_D22" class="2">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS13_N"/>
-<wire x1="93.98" y1="0" x2="60.96" y2="0" width="0.1524" layer="91"/>
-<label x="63.5" y="0" size="1.27" layer="95"/>
+<wire x1="91.44" y1="-27.94" x2="91.44" y2="-17.78" width="0.1524" layer="91"/>
+<label x="86.36" y="-15.24" size="1.778" layer="95"/>
+<pinref part="FB1" gate="G$1" pin="P$1"/>
+<wire x1="93.98" y1="-27.94" x2="91.44" y2="-27.94" width="0.1524" layer="91"/>
 </segment>
-</net>
-<net name="FMC_D23" class="2">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_DX16"/>
-<wire x1="93.98" y1="2.54" x2="60.96" y2="2.54" width="0.1524" layer="91"/>
-<label x="63.5" y="2.54" size="1.27" layer="95"/>
+<pinref part="FT_VCC3V3" gate="VCC" pin="VCC"/>
+<wire x1="76.2" y1="93.98" x2="76.2" y2="86.36" width="0.1524" layer="91"/>
+<pinref part="U$3" gate="G$1" pin="VCCIO at 46"/>
+<wire x1="78.74" y1="81.28" x2="78.74" y2="86.36" width="0.1524" layer="91"/>
+<wire x1="78.74" y1="86.36" x2="76.2" y2="86.36" width="0.1524" layer="91"/>
+<pinref part="U$3" gate="G$1" pin="VCCIO at 24"/>
+<wire x1="76.2" y1="86.36" x2="76.2" y2="81.28" width="0.1524" layer="91"/>
+<junction x="76.2" y="86.36"/>
+<pinref part="U$3" gate="G$1" pin="VCCIO at 12"/>
+<wire x1="73.66" y1="81.28" x2="73.66" y2="86.36" width="0.1524" layer="91"/>
+<wire x1="73.66" y1="86.36" x2="76.2" y2="86.36" width="0.1524" layer="91"/>
 </segment>
-</net>
-<net name="FMC_D24" class="2">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS12_P"/>
-<wire x1="93.98" y1="5.08" x2="60.96" y2="5.08" width="0.1524" layer="91"/>
-<label x="63.5" y="5.08" size="1.27" layer="95"/>
+<pinref part="FT_VCC3V3_2" gate="VCC" pin="VCC"/>
+<wire x1="129.54" y1="30.48" x2="129.54" y2="25.4" width="0.1524" layer="91"/>
+<pinref part="C53" gate="G$1" pin="P$1"/>
+<wire x1="124.46" y1="17.78" x2="124.46" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="124.46" y1="25.4" x2="129.54" y2="25.4" width="0.1524" layer="91"/>
+<pinref part="C54" gate="G$1" pin="P$1"/>
+<wire x1="129.54" y1="25.4" x2="129.54" y2="17.78" width="0.1524" layer="91"/>
+<junction x="129.54" y="25.4"/>
+<pinref part="C55" gate="G$1" pin="P$1"/>
+<wire x1="134.62" y1="17.78" x2="134.62" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="134.62" y1="25.4" x2="129.54" y2="25.4" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="FMC_D25" class="2">
+<net name="N$22" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS12_N"/>
-<wire x1="93.98" y1="7.62" x2="60.96" y2="7.62" width="0.1524" layer="91"/>
-<label x="63.5" y="7.62" size="1.27" layer="95"/>
+<pinref part="C43" gate="G$1" pin="2"/>
+<wire x1="25.4" y1="17.78" x2="30.48" y2="17.78" width="0.1524" layer="91"/>
+<wire x1="30.48" y1="17.78" x2="30.48" y2="12.7" width="0.1524" layer="91"/>
+<pinref part="U$3" gate="G$1" pin="XCSO"/>
+<wire x1="45.72" y1="17.78" x2="30.48" y2="17.78" width="0.1524" layer="91"/>
+<junction x="30.48" y="17.78"/>
+<pinref part="Y1" gate="G$1" pin="2"/>
 </segment>
 </net>
-<net name="FMC_D26" class="2">
+<net name="N$13" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS10_P"/>
-<wire x1="93.98" y1="12.7" x2="60.96" y2="12.7" width="0.1524" layer="91"/>
-<label x="63.5" y="12.7" size="1.27" layer="95"/>
+<pinref part="C44" gate="G$1" pin="2"/>
+<wire x1="20.32" y1="17.78" x2="15.24" y2="17.78" width="0.1524" layer="91"/>
+<wire x1="15.24" y1="17.78" x2="15.24" y2="12.7" width="0.1524" layer="91"/>
+<pinref part="U$3" gate="G$1" pin="XCSI"/>
+<wire x1="45.72" y1="30.48" x2="35.56" y2="30.48" width="0.1524" layer="91"/>
+<wire x1="35.56" y1="30.48" x2="35.56" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="35.56" y1="25.4" x2="15.24" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="15.24" y1="25.4" x2="15.24" y2="17.78" width="0.1524" layer="91"/>
+<junction x="15.24" y="17.78"/>
+<pinref part="Y1" gate="G$1" pin="1"/>
 </segment>
 </net>
-<net name="FMC_A12" class="3">
+<net name="FT_TXD" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_DX5"/>
-<wire x1="93.98" y1="-22.86" x2="60.96" y2="-22.86" width="0.1524" layer="91"/>
-<label x="63.5" y="-22.86" size="1.27" layer="95"/>
+<pinref part="U$3" gate="G$1" pin="TXD"/>
+<wire x1="101.6" y1="73.66" x2="109.22" y2="73.66" width="0.1524" layer="91"/>
+<label x="109.22" y="73.66" size="1.27" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="FMC_A13" class="3">
+<net name="FT_RXD" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_DX4"/>
-<wire x1="93.98" y1="-20.32" x2="60.96" y2="-20.32" width="0.1524" layer="91"/>
-<label x="63.5" y="-20.32" size="1.27" layer="95"/>
+<pinref part="U$3" gate="G$1" pin="RXD"/>
+<wire x1="101.6" y1="71.12" x2="109.22" y2="71.12" width="0.1524" layer="91"/>
+<label x="109.22" y="71.12" size="1.27" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="FMC_A14" class="3">
+<net name="FT_VPHY" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="DDC_SCL"/>
-<wire x1="93.98" y1="-17.78" x2="60.96" y2="-17.78" width="0.1524" layer="91"/>
-<label x="63.5" y="-17.78" size="1.27" layer="95"/>
+<pinref part="U$3" gate="G$1" pin="VPHY"/>
+<wire x1="68.58" y1="81.28" x2="68.58" y2="86.36" width="0.1524" layer="91"/>
+<wire x1="68.58" y1="86.36" x2="53.34" y2="86.36" width="0.1524" layer="91"/>
+<label x="53.34" y="86.36" size="1.778" layer="95"/>
 </segment>
-</net>
-<net name="FMC_A16" class="3">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_DX11"/>
-<wire x1="149.86" y1="-15.24" x2="185.42" y2="-15.24" width="0.1524" layer="91"/>
-<label x="172.72" y="-15.24" size="1.27" layer="95"/>
+<pinref part="C49" gate="G$1" pin="P$1"/>
+<wire x1="58.42" y1="-27.94" x2="71.12" y2="-27.94" width="0.1524" layer="91"/>
+<wire x1="71.12" y1="-27.94" x2="71.12" y2="-33.02" width="0.1524" layer="91"/>
+<pinref part="C50" gate="G$1" pin="P$1"/>
+<wire x1="58.42" y1="-33.02" x2="58.42" y2="-27.94" width="0.1524" layer="91"/>
+<junction x="58.42" y="-27.94"/>
+<wire x1="71.12" y1="-27.94" x2="71.12" y2="-17.78" width="0.1524" layer="91"/>
+<junction x="71.12" y="-27.94"/>
+<label x="68.58" y="-15.24" size="1.778" layer="95"/>
+<pinref part="FB2" gate="G$1" pin="P$2"/>
+<wire x1="58.42" y1="-27.94" x2="53.34" y2="-27.94" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="FMC_A17" class="3">
+<net name="FT_VPLL" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="DDC_SDA"/>
-<wire x1="149.86" y1="-12.7" x2="185.42" y2="-12.7" width="0.1524" layer="91"/>
-<label x="172.72" y="-12.7" size="1.27" layer="95"/>
+<pinref part="U$3" gate="G$1" pin="VPLL"/>
+<wire x1="71.12" y1="81.28" x2="71.12" y2="91.44" width="0.1524" layer="91"/>
+<wire x1="71.12" y1="91.44" x2="53.34" y2="91.44" width="0.1524" layer="91"/>
+<label x="53.34" y="91.44" size="1.778" layer="95"/>
+</segment>
+<segment>
+<pinref part="C51" gate="G$1" pin="P$1"/>
+<wire x1="104.14" y1="-27.94" x2="116.84" y2="-27.94" width="0.1524" layer="91"/>
+<wire x1="116.84" y1="-27.94" x2="116.84" y2="-33.02" width="0.1524" layer="91"/>
+<pinref part="C52" gate="G$1" pin="P$1"/>
+<wire x1="104.14" y1="-33.02" x2="104.14" y2="-27.94" width="0.1524" layer="91"/>
+<junction x="104.14" y="-27.94"/>
+<wire x1="116.84" y1="-27.94" x2="116.84" y2="-17.78" width="0.1524" layer="91"/>
+<junction x="116.84" y="-27.94"/>
+<label x="114.3" y="-15.24" size="1.778" layer="95"/>
+<pinref part="FB1" gate="G$1" pin="P$2"/>
+<wire x1="104.14" y1="-27.94" x2="99.06" y2="-27.94" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="FMC_A18" class="3">
+<net name="USBDM" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS11_P"/>
-<wire x1="149.86" y1="-7.62" x2="185.42" y2="-7.62" width="0.1524" layer="91"/>
-<label x="172.72" y="-7.62" size="1.27" layer="95"/>
+<wire x1="-67.31" y1="8.89" x2="-64.77" y2="8.89" width="0.1524" layer="91"/>
+<pinref part="CN1" gate="G$1" pin="D-"/>
+<pinref part="SJ3" gate="1" pin="1"/>
 </segment>
 </net>
-<net name="FMC_NL" class="0">
+<net name="USBDP" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS5_N"/>
-<wire x1="93.98" y1="50.8" x2="60.96" y2="50.8" width="0.1524" layer="91"/>
-<label x="63.5" y="50.8" size="1.27" layer="95"/>
+<wire x1="-67.31" y1="11.43" x2="-57.15" y2="11.43" width="0.1524" layer="91"/>
+<pinref part="CN1" gate="G$1" pin="D+"/>
+<pinref part="SJ4" gate="1" pin="1"/>
 </segment>
 </net>
-<net name="FMC_D28" class="2">
+</nets>
+</sheet>
+<sheet>
+<description>Tamper circuit
+Master Key Memory</description>
+<plain>
+<text x="104.14" y="-22.86" size="1.27" layer="91">CS pull-up to disable MKM by
+default (allows programming
+of AVR)</text>
+<text x="-25.4" y="-55.88" size="1.27" layer="91">Pull-down CONTROL to
+enable 0 (AVR) by default</text>
+<text x="71.12" y="22.86" size="2.54" layer="91">Master Key Memory</text>
+<text x="12.7" y="22.86" size="2.54" layer="91">Analog switch</text>
+<text x="-5.08" y="139.7" size="2.54" layer="91">AVR Tiny Tamper Detect MCU</text>
+<text x="-40.64" y="-48.26" size="1.27" layer="91" rot="R180">Make AVR unable to read the
+MKM by installing this jumper</text>
+<text x="208.28" y="73.66" size="2.54" layer="91">Panic button</text>
+<text x="213.36" y="20.32" size="2.54" layer="91">Expansion GPIO</text>
+</plain>
+<instances>
+<instance part="U3" gate="A" x="33.02" y="88.9"/>
+<instance part="FRAME4" gate="G$1" x="-114.3" y="-96.52"/>
+<instance part="P+19" gate="VCC" x="-33.02" y="129.54"/>
+<instance part="SUPPLY44" gate="GND" x="-35.56" y="45.72"/>
+<instance part="JP3" gate="G$1" x="142.24" y="63.5" smashed="yes">
+<attribute name="NAME" x="137.922" y="69.342" size="1.778" layer="95"/>
+<attribute name="VALUE" x="117.856" y="53.34" size="1.778" layer="96"/>
+</instance>
+<instance part="P+18" gate="VCC" x="154.94" y="76.2"/>
+<instance part="R16" gate="G$1" x="121.92" y="101.6" rot="R90"/>
+<instance part="P+20" gate="VCC" x="121.92" y="116.84"/>
+<instance part="SUPPLY45" gate="GND" x="154.94" y="45.72"/>
+<instance part="U4" gate="A" x="35.56" y="-33.02"/>
+<instance part="U5" gate="A" x="88.9" y="-22.86"/>
+<instance part="SUPPLY46" gate="GND" x="68.58" y="-48.26"/>
+<instance part="P+21" gate="VCC" x="68.58" y="15.24"/>
+<instance part="R17" gate="G$1" x="63.5" y="-27.94"/>
+<instance part="P+22" gate="VCC" x="12.7" y="15.24"/>
+<instance part="SUPPLY47" gate="GND" x="12.7" y="-71.12"/>
+<instance part="R18" gate="G$1" x="63.5" y="-10.16" rot="R90"/>
+<instance part="R19" gate="G$1" x="5.08" y="-58.42" rot="R90"/>
+<instance part="P+23" gate="VCC" x="53.34" y="-27.94" rot="R90"/>
+<instance part="C58" gate="G$1" x="-53.34" y="106.68" smashed="yes">
+<attribute name="NAME" x="-54.61" y="119.38" size="1.27" layer="95"/>
+<attribute name="VALUE" x="-53.34" y="121.92" size="1.27" layer="96" rot="R90"/>
+</instance>
+<instance part="C59" gate="G$1" x="-40.64" y="106.68" smashed="yes">
+<attribute name="NAME" x="-40.64" y="119.38" size="1.27" layer="95" font="vector"/>
+<attribute name="VALUE" x="-40.64" y="121.92" size="1.27" layer="96" font="vector" rot="R90"/>
+</instance>
+<instance part="C60" gate="G$1" x="-45.72" y="106.68" smashed="yes">
+<attribute name="NAME" x="-45.72" y="119.38" size="1.27" layer="95" font="vector"/>
+<attribute name="VALUE" x="-45.72" y="121.92" size="1.27" layer="96" font="vector" rot="R90"/>
+</instance>
+<instance part="C61" gate="G$1" x="7.62" y="0" smashed="yes">
+<attribute name="NAME" x="10.16" y="-2.54" size="1.27" layer="95" font="vector"/>
+<attribute name="VALUE" x="10.16" y="0" size="1.27" layer="96" font="vector"/>
+</instance>
+<instance part="C62" gate="G$1" x="73.66" y="5.08" smashed="yes">
+<attribute name="NAME" x="76.2" y="7.62" size="1.27" layer="95" font="vector"/>
+<attribute name="VALUE" x="76.2" y="5.08" size="1.27" layer="96" font="vector"/>
+</instance>
+<instance part="SUPPLY48" gate="GND" x="73.66" y="-2.54"/>
+<instance part="SUPPLY49" gate="GND" x="7.62" y="-7.62"/>
+<instance part="SUPPLY50" gate="GND" x="-45.72" y="93.98"/>
+<instance part="JP4" gate="A" x="-33.02" y="-48.26"/>
+<instance part="SUPPLY51" gate="GND" x="-33.02" y="-60.96"/>
+<instance part="LED1" gate="G$1" x="238.76" y="-45.72" smashed="yes" rot="R90">
+<attribute name="NAME" x="243.332" y="-42.164" size="1.778" layer="95" rot="R180"/>
+<attribute name="VALUE" x="258.572" y="-45.085" size="1.778" layer="96" rot="R180"/>
+</instance>
+<instance part="LED2" gate="G$1" x="233.68" y="-48.26" smashed="yes" rot="R90">
+<attribute name="VALUE" x="258.572" y="-47.625" size="1.778" layer="96" rot="R180"/>
+</instance>
+<instance part="LED3" gate="G$1" x="238.76" y="-50.8" smashed="yes" rot="R90">
+<attribute name="VALUE" x="258.572" y="-50.165" size="1.778" layer="96" rot="R180"/>
+</instance>
+<instance part="LED4" gate="G$1" x="233.68" y="-53.34" smashed="yes" rot="R90">
+<attribute name="VALUE" x="258.572" y="-52.705" size="1.778" layer="96" rot="R180"/>
+</instance>
+<instance part="SUPPLY23" gate="GND" x="251.46" y="-53.34" rot="R90"/>
+<instance part="R7" gate="A" x="218.44" y="-53.34" rot="R180"/>
+<instance part="JP5" gate="G$1" x="241.3" y="-7.62" rot="R180"/>
+<instance part="SUPPLY52" gate="GND" x="226.06" y="-17.78"/>
+<instance part="P+24" gate="VCC" x="226.06" y="15.24"/>
+<instance part="U$4" gate="A" x="231.14" y="58.42"/>
+<instance part="SUPPLY53" gate="GND" x="248.92" y="40.64"/>
+<instance part="JP6" gate="G$1" x="238.76" y="111.76" rot="R180"/>
+<instance part="SUPPLY54" gate="GND" x="226.06" y="101.6"/>
+<instance part="P+25" gate="VCC" x="218.44" y="121.92"/>
+<instance part="P+26" gate="VCC" x="226.06" y="121.92"/>
+</instances>
+<busses>
+</busses>
+<nets>
+<net name="GND" class="1">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS6_N"/>
-<wire x1="93.98" y1="53.34" x2="60.96" y2="53.34" width="0.1524" layer="91"/>
-<label x="63.5" y="53.34" size="1.27" layer="95"/>
+<pinref part="U3" gate="A" pin="GND_2"/>
+<pinref part="SUPPLY44" gate="GND" pin="GND"/>
+<wire x1="-22.86" y1="60.96" x2="-35.56" y2="60.96" width="0.1524" layer="91"/>
+<wire x1="-35.56" y1="60.96" x2="-35.56" y2="58.42" width="0.1524" layer="91"/>
+<pinref part="U3" gate="A" pin="GND"/>
+<wire x1="-35.56" y1="58.42" x2="-35.56" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="-22.86" y1="58.42" x2="-35.56" y2="58.42" width="0.1524" layer="91"/>
+<junction x="-35.56" y="58.42"/>
 </segment>
-</net>
-<net name="FMC_D29" class="2">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS6_P"/>
-<wire x1="93.98" y1="55.88" x2="60.96" y2="55.88" width="0.1524" layer="91"/>
-<label x="63.5" y="55.88" size="1.27" layer="95"/>
+<pinref part="JP3" gate="G$1" pin="6"/>
+<pinref part="SUPPLY45" gate="GND" pin="GND"/>
+<wire x1="152.4" y1="60.96" x2="154.94" y2="60.96" width="0.1524" layer="91"/>
+<wire x1="154.94" y1="60.96" x2="154.94" y2="48.26" width="0.1524" layer="91"/>
 </segment>
-</net>
-<net name="FMC_D27" class="2">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS8_P"/>
-<wire x1="93.98" y1="40.64" x2="60.96" y2="40.64" width="0.1524" layer="91"/>
-<label x="63.5" y="40.64" size="1.27" layer="95"/>
+<pinref part="SUPPLY46" gate="GND" pin="GND"/>
+<wire x1="68.58" y1="-35.56" x2="68.58" y2="-45.72" width="0.1524" layer="91"/>
+<pinref part="U5" gate="A" pin="VSS"/>
+<wire x1="68.58" y1="-35.56" x2="71.12" y2="-35.56" width="0.1524" layer="91"/>
 </segment>
-</net>
-<net name="FMC_D3" class="2">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS9_P"/>
-<wire x1="93.98" y1="33.02" x2="60.96" y2="33.02" width="0.1524" layer="91"/>
-<label x="63.5" y="33.02" size="1.27" layer="95"/>
+<pinref part="U4" gate="A" pin="VSS"/>
+<pinref part="SUPPLY47" gate="GND" pin="GND"/>
+<wire x1="17.78" y1="-58.42" x2="12.7" y2="-58.42" width="0.1524" layer="91"/>
+<wire x1="12.7" y1="-58.42" x2="12.7" y2="-66.04" width="0.1524" layer="91"/>
+<pinref part="U4" gate="A" pin="VEE"/>
+<wire x1="12.7" y1="-66.04" x2="12.7" y2="-68.58" width="0.1524" layer="91"/>
+<wire x1="17.78" y1="-55.88" x2="12.7" y2="-55.88" width="0.1524" layer="91"/>
+<wire x1="12.7" y1="-55.88" x2="12.7" y2="-58.42" width="0.1524" layer="91"/>
+<junction x="12.7" y="-58.42"/>
+<pinref part="R19" gate="G$1" pin="1"/>
+<wire x1="5.08" y1="-63.5" x2="5.08" y2="-66.04" width="0.1524" layer="91"/>
+<wire x1="5.08" y1="-66.04" x2="12.7" y2="-66.04" width="0.1524" layer="91"/>
+<junction x="12.7" y="-66.04"/>
 </segment>
-</net>
-<net name="FMC_NOE" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS_CK0_P"/>
-<wire x1="93.98" y1="25.4" x2="60.96" y2="25.4" width="0.1524" layer="91"/>
-<label x="63.5" y="25.4" size="1.27" layer="95"/>
+<pinref part="C62" gate="G$1" pin="P$2"/>
+<wire x1="73.66" y1="2.54" x2="73.66" y2="0" width="0.1524" layer="91"/>
+<pinref part="SUPPLY48" gate="GND" pin="GND"/>
 </segment>
-</net>
-<net name="FMC_NWE" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS10_N"/>
-<wire x1="93.98" y1="15.24" x2="60.96" y2="15.24" width="0.1524" layer="91"/>
-<label x="63.5" y="15.24" size="1.27" layer="95"/>
+<pinref part="C61" gate="G$1" pin="P$2"/>
+<wire x1="7.62" y1="-2.54" x2="7.62" y2="-5.08" width="0.1524" layer="91"/>
+<pinref part="SUPPLY49" gate="GND" pin="GND"/>
 </segment>
-</net>
-<net name="FMC_NWAIT" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS8_N"/>
-<wire x1="93.98" y1="43.18" x2="60.96" y2="43.18" width="0.1524" layer="91"/>
-<label x="63.5" y="43.18" size="1.27" layer="95"/>
+<pinref part="C58" gate="G$1" pin="P$2"/>
+<wire x1="-53.34" y1="104.14" x2="-53.34" y2="99.06" width="0.1524" layer="91"/>
+<pinref part="SUPPLY50" gate="GND" pin="GND"/>
+<wire x1="-53.34" y1="99.06" x2="-45.72" y2="99.06" width="0.1524" layer="91"/>
+<wire x1="-45.72" y1="99.06" x2="-45.72" y2="96.52" width="0.1524" layer="91"/>
+<pinref part="C59" gate="G$1" pin="P$2"/>
+<wire x1="-40.64" y1="104.14" x2="-40.64" y2="99.06" width="0.1524" layer="91"/>
+<wire x1="-40.64" y1="99.06" x2="-45.72" y2="99.06" width="0.1524" layer="91"/>
+<junction x="-45.72" y="99.06"/>
+<pinref part="C60" gate="G$1" pin="P$2"/>
+<wire x1="-45.72" y1="104.14" x2="-45.72" y2="99.06" width="0.1524" layer="91"/>
 </segment>
-</net>
-<net name="FMC_A19" class="3">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS3_N"/>
-<wire x1="93.98" y1="60.96" x2="60.96" y2="60.96" width="0.1524" layer="91"/>
-<label x="63.5" y="60.96" size="1.27" layer="95"/>
+<pinref part="JP4" gate="A" pin="1"/>
+<pinref part="SUPPLY51" gate="GND" pin="GND"/>
+<wire x1="-33.02" y1="-55.88" x2="-33.02" y2="-58.42" width="0.1524" layer="91"/>
 </segment>
-</net>
-<net name="FMC_A20" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_DX17"/>
-<wire x1="152.4" y1="7.62" x2="193.04" y2="7.62" width="0.1524" layer="91"/>
-<label x="172.72" y="7.62" size="1.27" layer="95"/>
+<pinref part="LED1" gate="G$1" pin="C"/>
+<wire x1="243.84" y1="-45.72" x2="246.38" y2="-45.72" width="0.1524" layer="91"/>
+<pinref part="LED2" gate="G$1" pin="C"/>
+<wire x1="246.38" y1="-53.34" x2="246.38" y2="-50.8" width="0.1524" layer="91"/>
+<wire x1="246.38" y1="-50.8" x2="246.38" y2="-48.26" width="0.1524" layer="91"/>
+<wire x1="246.38" y1="-48.26" x2="246.38" y2="-45.72" width="0.1524" layer="91"/>
+<wire x1="238.76" y1="-48.26" x2="246.38" y2="-48.26" width="0.1524" layer="91"/>
+<pinref part="LED4" gate="G$1" pin="C"/>
+<wire x1="238.76" y1="-53.34" x2="246.38" y2="-53.34" width="0.1524" layer="91"/>
+<pinref part="LED3" gate="G$1" pin="C"/>
+<wire x1="243.84" y1="-50.8" x2="246.38" y2="-50.8" width="0.1524" layer="91"/>
+<junction x="246.38" y="-50.8"/>
+<junction x="246.38" y="-48.26"/>
+<pinref part="SUPPLY23" gate="GND" pin="GND"/>
+<wire x1="248.92" y1="-53.34" x2="246.38" y2="-53.34" width="0.1524" layer="91"/>
+<junction x="246.38" y="-53.34"/>
 </segment>
-</net>
-<net name="FMC_A21" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_DX14"/>
-<wire x1="152.4" y1="43.18" x2="195.58" y2="43.18" width="0.1524" layer="91"/>
-<label x="172.72" y="43.18" size="1.27" layer="95"/>
+<pinref part="JP5" gate="G$1" pin="10"/>
+<wire x1="231.14" y1="-12.7" x2="226.06" y2="-12.7" width="0.1524" layer="91"/>
+<wire x1="226.06" y1="-12.7" x2="226.06" y2="-15.24" width="0.1524" layer="91"/>
+<pinref part="SUPPLY52" gate="GND" pin="GND"/>
 </segment>
-</net>
-<net name="FMC_D30" class="2">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS3_P"/>
-<wire x1="93.98" y1="63.5" x2="60.96" y2="63.5" width="0.1524" layer="91"/>
-<label x="63.5" y="63.5" size="1.27" layer="95"/>
+<pinref part="U$4" gate="A" pin="G1"/>
+<pinref part="SUPPLY53" gate="GND" pin="GND"/>
+<wire x1="246.38" y1="60.96" x2="248.92" y2="60.96" width="0.1524" layer="91"/>
+<wire x1="248.92" y1="60.96" x2="248.92" y2="55.88" width="0.1524" layer="91"/>
+<pinref part="U$4" gate="A" pin="G2"/>
+<wire x1="248.92" y1="55.88" x2="248.92" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="248.92" y1="48.26" x2="248.92" y2="43.18" width="0.1524" layer="91"/>
+<wire x1="246.38" y1="55.88" x2="248.92" y2="55.88" width="0.1524" layer="91"/>
+<junction x="248.92" y="55.88"/>
+<pinref part="U$4" gate="A" pin="B2"/>
+<wire x1="238.76" y1="48.26" x2="248.92" y2="48.26" width="0.1524" layer="91"/>
+<junction x="248.92" y="48.26"/>
+<pinref part="U$4" gate="A" pin="B1"/>
+<wire x1="238.76" y1="68.58" x2="248.92" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="248.92" y1="68.58" x2="248.92" y2="60.96" width="0.1524" layer="91"/>
+<junction x="248.92" y="60.96"/>
 </segment>
-</net>
-<net name="FMC_D31" class="2">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS7_P"/>
-<wire x1="93.98" y1="68.58" x2="60.96" y2="68.58" width="0.1524" layer="91"/>
-<label x="63.5" y="68.58" size="1.27" layer="95"/>
+<pinref part="JP6" gate="G$1" pin="3"/>
+<wire x1="231.14" y1="109.22" x2="226.06" y2="109.22" width="0.1524" layer="91"/>
+<pinref part="SUPPLY54" gate="GND" pin="GND"/>
+<wire x1="226.06" y1="109.22" x2="226.06" y2="104.14" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="FMC_A0" class="3">
+<net name="AVR_RESET" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS7_N"/>
-<wire x1="93.98" y1="71.12" x2="60.96" y2="71.12" width="0.1524" layer="91"/>
-<label x="63.5" y="71.12" size="1.27" layer="95"/>
+<pinref part="JP3" gate="G$1" pin="5"/>
+<wire x1="134.62" y1="60.96" x2="121.92" y2="60.96" width="0.1524" layer="91"/>
+<wire x1="121.92" y1="60.96" x2="121.92" y2="86.36" width="0.1524" layer="91"/>
+<pinref part="U3" gate="A" pin="PD2_(!PCINT26/ADC26/RESET/DW)"/>
+<wire x1="121.92" y1="86.36" x2="88.9" y2="86.36" width="0.1524" layer="91"/>
+<wire x1="121.92" y1="86.36" x2="121.92" y2="96.52" width="0.1524" layer="91"/>
+<junction x="121.92" y="86.36"/>
+<pinref part="R16" gate="G$1" pin="1"/>
 </segment>
 </net>
-<net name="FMC_A1" class="3">
+<net name="N$31" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_DX15"/>
-<wire x1="93.98" y1="76.2" x2="60.96" y2="76.2" width="0.1524" layer="91"/>
-<label x="63.5" y="76.2" size="1.27" layer="95"/>
+<pinref part="U5" gate="A" pin="!HOLD"/>
+<pinref part="R17" gate="G$1" pin="2"/>
+<wire x1="71.12" y1="-25.4" x2="68.58" y2="-25.4" width="0.1524" layer="91"/>
+<wire x1="68.58" y1="-25.4" x2="68.58" y2="-27.94" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="FMC_A2" class="3">
+<net name="MKM_SCK" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_DX7"/>
-<wire x1="93.98" y1="78.74" x2="60.96" y2="78.74" width="0.1524" layer="91"/>
-<label x="63.5" y="78.74" size="1.27" layer="95"/>
+<pinref part="U5" gate="A" pin="SCK"/>
+<pinref part="U4" gate="A" pin="Z"/>
+<wire x1="71.12" y1="-22.86" x2="53.34" y2="-22.86" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="FMC_A3" class="3">
+<net name="MKM_MOSI" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_DX12"/>
-<wire x1="93.98" y1="81.28" x2="60.96" y2="81.28" width="0.1524" layer="91"/>
-<label x="63.5" y="81.28" size="1.27" layer="95"/>
+<pinref part="U4" gate="A" pin="Y"/>
+<pinref part="U5" gate="A" pin="SI"/>
+<wire x1="53.34" y1="-20.32" x2="71.12" y2="-20.32" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="FMC_A4" class="3">
+<net name="!MKM_CS" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_DX6"/>
-<wire x1="93.98" y1="83.82" x2="60.96" y2="83.82" width="0.1524" layer="91"/>
+<pinref part="U5" gate="A" pin="!CS"/>
+<pinref part="U4" gate="A" pin="X"/>
+<wire x1="71.12" y1="-17.78" x2="63.5" y2="-17.78" width="0.1524" layer="91"/>
+<pinref part="R18" gate="G$1" pin="1"/>
+<wire x1="63.5" y1="-17.78" x2="53.34" y2="-17.78" width="0.1524" layer="91"/>
+<wire x1="63.5" y1="-15.24" x2="63.5" y2="-17.78" width="0.1524" layer="91"/>
+<junction x="63.5" y="-17.78"/>
 </segment>
 </net>
-<net name="FMC_A5" class="3">
+<net name="MKM_MISO" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_DX13"/>
-<wire x1="93.98" y1="86.36" x2="60.96" y2="86.36" width="0.1524" layer="91"/>
-<label x="63.5" y="86.36" size="1.27" layer="95"/>
-<label x="63.5" y="83.82" size="1.27" layer="95"/>
+<pinref part="U4" gate="A" pin="W"/>
+<wire x1="53.34" y1="-15.24" x2="55.88" y2="-15.24" width="0.1524" layer="91"/>
+<wire x1="55.88" y1="-15.24" x2="55.88" y2="17.78" width="0.1524" layer="91"/>
+<wire x1="55.88" y1="17.78" x2="109.22" y2="17.78" width="0.1524" layer="91"/>
+<wire x1="109.22" y1="17.78" x2="109.22" y2="-12.7" width="0.1524" layer="91"/>
+<pinref part="U5" gate="A" pin="SO"/>
+<wire x1="109.22" y1="-12.7" x2="106.68" y2="-12.7" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="FMC_A6" class="3">
+<net name="3V3_BATT" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDSA_N"/>
-<wire x1="149.86" y1="71.12" x2="185.42" y2="71.12" width="0.1524" layer="91"/>
-<label x="172.72" y="71.12" size="1.27" layer="95"/>
+<pinref part="U5" gate="A" pin="VCC"/>
+<pinref part="P+21" gate="VCC" pin="VCC"/>
+<wire x1="71.12" y1="-12.7" x2="68.58" y2="-12.7" width="0.1524" layer="91"/>
+<wire x1="68.58" y1="-12.7" x2="68.58" y2="0" width="0.1524" layer="91"/>
+<pinref part="R18" gate="G$1" pin="2"/>
+<wire x1="68.58" y1="0" x2="68.58" y2="10.16" width="0.1524" layer="91"/>
+<wire x1="68.58" y1="10.16" x2="68.58" y2="12.7" width="0.1524" layer="91"/>
+<wire x1="63.5" y1="-5.08" x2="63.5" y2="0" width="0.1524" layer="91"/>
+<wire x1="63.5" y1="0" x2="68.58" y2="0" width="0.1524" layer="91"/>
+<junction x="68.58" y="0"/>
+<pinref part="C62" gate="G$1" pin="P$1"/>
+<wire x1="73.66" y1="10.16" x2="68.58" y2="10.16" width="0.1524" layer="91"/>
+<junction x="68.58" y="10.16"/>
+<label x="71.12" y="15.24" size="1.27" layer="95"/>
 </segment>
-</net>
-<net name="FMC_A7" class="3">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDSA_P"/>
-<wire x1="149.86" y1="68.58" x2="185.42" y2="68.58" width="0.1524" layer="91"/>
-<label x="172.72" y="68.58" size="1.27" layer="95"/>
+<pinref part="U4" gate="A" pin="VDD"/>
+<pinref part="P+22" gate="VCC" pin="VCC"/>
+<wire x1="17.78" y1="-15.24" x2="12.7" y2="-15.24" width="0.1524" layer="91"/>
+<wire x1="12.7" y1="-15.24" x2="12.7" y2="5.08" width="0.1524" layer="91"/>
+<wire x1="12.7" y1="5.08" x2="12.7" y2="12.7" width="0.1524" layer="91"/>
+<wire x1="12.7" y1="5.08" x2="7.62" y2="5.08" width="0.1524" layer="91"/>
+<junction x="12.7" y="5.08"/>
+<pinref part="C61" gate="G$1" pin="P$1"/>
+<label x="15.24" y="15.24" size="1.27" layer="95"/>
 </segment>
-</net>
-<net name="FMC_A8" class="3">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS2_P"/>
-<wire x1="149.86" y1="66.04" x2="185.42" y2="66.04" width="0.1524" layer="91"/>
-<label x="172.72" y="66.04" size="1.27" layer="95"/>
+<pinref part="JP3" gate="G$1" pin="2"/>
+<pinref part="P+18" gate="VCC" pin="VCC"/>
+<wire x1="152.4" y1="66.04" x2="154.94" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="154.94" y1="66.04" x2="154.94" y2="73.66" width="0.1524" layer="91"/>
+<label x="147.32" y="81.28" size="1.27" layer="95"/>
 </segment>
-</net>
-<net name="FMC_A9" class="3">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS2_N"/>
-<wire x1="149.86" y1="63.5" x2="185.42" y2="63.5" width="0.1524" layer="91"/>
-<label x="172.72" y="63.5" size="1.27" layer="95"/>
+<pinref part="R17" gate="G$1" pin="1"/>
+<pinref part="P+23" gate="VCC" pin="VCC"/>
+<wire x1="58.42" y1="-27.94" x2="55.88" y2="-27.94" width="0.1524" layer="91"/>
 </segment>
-</net>
-<net name="FMC_A10" class="3">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS1_N"/>
-<wire x1="149.86" y1="58.42" x2="185.42" y2="58.42" width="0.1524" layer="91"/>
-<label x="172.72" y="58.42" size="1.27" layer="95"/>
+<pinref part="R16" gate="G$1" pin="2"/>
+<pinref part="P+20" gate="VCC" pin="VCC"/>
+<wire x1="121.92" y1="106.68" x2="121.92" y2="114.3" width="0.1524" layer="91"/>
+<label x="124.46" y="116.84" size="1.27" layer="95"/>
 </segment>
-</net>
-<net name="FMC_A11" class="3">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS1_P"/>
-<wire x1="149.86" y1="55.88" x2="185.42" y2="55.88" width="0.1524" layer="91"/>
-<label x="172.72" y="55.88" size="1.27" layer="95"/>
+<pinref part="U3" gate="A" pin="VCC"/>
+<wire x1="-22.86" y1="111.76" x2="-33.02" y2="111.76" width="0.1524" layer="91"/>
+<wire x1="-33.02" y1="111.76" x2="-33.02" y2="114.3" width="0.1524" layer="91"/>
+<pinref part="U3" gate="A" pin="AVCC"/>
+<wire x1="-33.02" y1="114.3" x2="-33.02" y2="127" width="0.1524" layer="91"/>
+<wire x1="-22.86" y1="114.3" x2="-33.02" y2="114.3" width="0.1524" layer="91"/>
+<junction x="-33.02" y="114.3"/>
+<pinref part="P+19" gate="VCC" pin="VCC"/>
+<pinref part="C58" gate="G$1" pin="P$1"/>
+<wire x1="-33.02" y1="114.3" x2="-40.64" y2="114.3" width="0.1524" layer="91"/>
+<wire x1="-40.64" y1="114.3" x2="-45.72" y2="114.3" width="0.1524" layer="91"/>
+<wire x1="-45.72" y1="114.3" x2="-53.34" y2="114.3" width="0.1524" layer="91"/>
+<wire x1="-53.34" y1="114.3" x2="-53.34" y2="111.76" width="0.1524" layer="91"/>
+<pinref part="C60" gate="G$1" pin="P$1"/>
+<wire x1="-45.72" y1="114.3" x2="-45.72" y2="111.76" width="0.1524" layer="91"/>
+<junction x="-45.72" y="114.3"/>
+<pinref part="C59" gate="G$1" pin="P$1"/>
+<wire x1="-40.64" y1="114.3" x2="-40.64" y2="111.76" width="0.1524" layer="91"/>
+<junction x="-40.64" y="114.3"/>
+<label x="-30.48" y="129.54" size="1.27" layer="95"/>
 </segment>
-</net>
-<net name="FMC_D4" class="2">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS4_N"/>
-<wire x1="149.86" y1="50.8" x2="185.42" y2="50.8" width="0.1524" layer="91"/>
-<label x="172.72" y="50.8" size="1.27" layer="95"/>
+<pinref part="JP6" gate="G$1" pin="2"/>
+<pinref part="P+25" gate="VCC" pin="VCC"/>
+<wire x1="231.14" y1="111.76" x2="218.44" y2="111.76" width="0.1524" layer="91"/>
+<wire x1="218.44" y1="111.76" x2="218.44" y2="119.38" width="0.1524" layer="91"/>
+<label x="218.44" y="124.46" size="1.27" layer="95" rot="R90"/>
 </segment>
-</net>
-<net name="FMC_D20" class="2">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS11_N"/>
-<wire x1="149.86" y1="-5.08" x2="185.42" y2="-5.08" width="0.1524" layer="91"/>
-<label x="172.72" y="-5.08" size="1.27" layer="95"/>
+<wire x1="226.06" y1="10.16" x2="226.06" y2="12.7" width="0.1524" layer="91"/>
+<pinref part="JP5" gate="G$1" pin="1"/>
+<wire x1="231.14" y1="10.16" x2="226.06" y2="10.16" width="0.1524" layer="91"/>
+<label x="228.6" y="15.24" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_D19" class="2">
+<net name="MKM_CONTROL" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_DX1"/>
-<wire x1="149.86" y1="-2.54" x2="185.42" y2="-2.54" width="0.1524" layer="91"/>
-<label x="172.72" y="-2.54" size="1.27" layer="95"/>
+<pinref part="U4" gate="A" pin="CONTROL"/>
+<pinref part="R19" gate="G$1" pin="2"/>
+<wire x1="17.78" y1="-50.8" x2="5.08" y2="-50.8" width="0.1524" layer="91"/>
+<wire x1="5.08" y1="-50.8" x2="5.08" y2="-53.34" width="0.1524" layer="91"/>
+<wire x1="5.08" y1="-50.8" x2="0" y2="-50.8" width="0.1524" layer="91"/>
+<junction x="5.08" y="-50.8"/>
+<label x="0" y="-50.8" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
-</net>
-<net name="FMC_D18" class="2">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDSC_N"/>
-<wire x1="149.86" y1="0" x2="185.42" y2="0" width="0.1524" layer="91"/>
-<label x="172.72" y="0" size="1.27" layer="95"/>
+<wire x1="93.98" y1="114.3" x2="88.9" y2="114.3" width="0.1524" layer="91"/>
+<label x="93.98" y="114.3" size="1.27" layer="95" xref="yes"/>
+<pinref part="U3" gate="A" pin="PC0_(PCINT16/ADC16/TOCC0/SS/XCK)"/>
 </segment>
 </net>
-<net name="FMC_D17" class="2">
+<net name="MKM_AVR_SCK" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDSC_P"/>
-<wire x1="149.86" y1="2.54" x2="185.42" y2="2.54" width="0.1524" layer="91"/>
-<label x="172.72" y="2.54" size="1.27" layer="95"/>
+<pinref part="U4" gate="A" pin="Z1"/>
+<wire x1="17.78" y1="-45.72" x2="12.7" y2="-45.72" width="0.1524" layer="91"/>
+<label x="12.7" y="-45.72" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
-</net>
-<net name="FMC_D16" class="2">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDSB_N"/>
-<wire x1="149.86" y1="12.7" x2="185.42" y2="12.7" width="0.1524" layer="91"/>
-<label x="172.72" y="12.7" size="1.27" layer="95"/>
+<pinref part="U3" gate="A" pin="PD3_(PCINT27/ADC27/SCL/SCK)"/>
+<wire x1="93.98" y1="83.82" x2="124.46" y2="83.82" width="0.1524" layer="91"/>
+<wire x1="124.46" y1="83.82" x2="124.46" y2="63.5" width="0.1524" layer="91"/>
+<pinref part="JP3" gate="G$1" pin="3"/>
+<wire x1="134.62" y1="63.5" x2="124.46" y2="63.5" width="0.1524" layer="91"/>
+<wire x1="88.9" y1="83.82" x2="93.98" y2="83.82" width="0.1524" layer="91"/>
+<wire x1="93.98" y1="83.82" x2="93.98" y2="78.74" width="0.1524" layer="91"/>
+<junction x="93.98" y="83.82"/>
+<label x="93.98" y="78.74" size="1.27" layer="95" rot="R270" xref="yes"/>
 </segment>
 </net>
-<net name="FMC_D12" class="2">
+<net name="MKM_FPGA_CS" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDSB_P"/>
-<wire x1="149.86" y1="15.24" x2="185.42" y2="15.24" width="0.1524" layer="91"/>
-<label x="172.72" y="15.24" size="1.27" layer="95"/>
+<wire x1="17.78" y1="-20.32" x2="12.7" y2="-20.32" width="0.1524" layer="91"/>
+<label x="12.7" y="-20.32" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U4" gate="A" pin="X0"/>
 </segment>
 </net>
-<net name="FMC_D11" class="2">
+<net name="MKM_AVR_CS" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS15_P"/>
-<wire x1="149.86" y1="20.32" x2="185.42" y2="20.32" width="0.1524" layer="91"/>
-<label x="172.72" y="20.32" size="1.27" layer="95"/>
+<wire x1="17.78" y1="-22.86" x2="12.7" y2="-22.86" width="0.1524" layer="91"/>
+<label x="12.7" y="-22.86" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U4" gate="A" pin="X1"/>
 </segment>
-</net>
-<net name="FMC_D10" class="2">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS15_N"/>
-<wire x1="149.86" y1="22.86" x2="185.42" y2="22.86" width="0.1524" layer="91"/>
-<label x="172.72" y="22.86" size="1.27" layer="95"/>
+<pinref part="U3" gate="A" pin="PC1_(PCINT17/ADC17/TOCC1/INT0/CLKO)"/>
+<wire x1="88.9" y1="111.76" x2="93.98" y2="111.76" width="0.1524" layer="91"/>
+<label x="93.98" y="111.76" size="1.27" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="FMC_D9" class="2">
+<net name="MKM_FPGA_MOSI" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS0_P"/>
-<wire x1="149.86" y1="27.94" x2="185.42" y2="27.94" width="0.1524" layer="91"/>
-<label x="172.72" y="27.94" size="1.27" layer="95"/>
+<wire x1="17.78" y1="-27.94" x2="12.7" y2="-27.94" width="0.1524" layer="91"/>
+<label x="12.7" y="-27.94" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U4" gate="A" pin="Y0"/>
 </segment>
 </net>
-<net name="FMC_D8" class="2">
+<net name="MKM_AVR_MOSI" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS0_N"/>
-<wire x1="149.86" y1="30.48" x2="185.42" y2="30.48" width="0.1524" layer="91"/>
-<label x="172.72" y="30.48" size="1.27" layer="95"/>
+<wire x1="17.78" y1="-30.48" x2="12.7" y2="-30.48" width="0.1524" layer="91"/>
+<label x="12.7" y="-30.48" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U4" gate="A" pin="Y1"/>
 </segment>
-</net>
-<net name="FMC_D7" class="2">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS_CK1_P"/>
-<wire x1="149.86" y1="35.56" x2="185.42" y2="35.56" width="0.1524" layer="91"/>
-<label x="172.72" y="35.56" size="1.27" layer="95"/>
+<pinref part="U3" gate="A" pin="PD0_(PCINT24/ADC24/SDA/MOSI)"/>
+<wire x1="88.9" y1="91.44" x2="99.06" y2="91.44" width="0.1524" layer="91"/>
+<pinref part="JP3" gate="G$1" pin="4"/>
+<wire x1="99.06" y1="91.44" x2="160.02" y2="91.44" width="0.1524" layer="91"/>
+<wire x1="160.02" y1="91.44" x2="160.02" y2="63.5" width="0.1524" layer="91"/>
+<wire x1="160.02" y1="63.5" x2="152.4" y2="63.5" width="0.1524" layer="91"/>
+<wire x1="99.06" y1="91.44" x2="99.06" y2="78.74" width="0.1524" layer="91"/>
+<junction x="99.06" y="91.44"/>
+<label x="99.06" y="78.74" size="1.27" layer="95" rot="R270" xref="yes"/>
 </segment>
 </net>
-<net name="FMC_D6" class="2">
+<net name="MKM_FPGA_MISO" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS_CK1_N"/>
-<wire x1="149.86" y1="38.1" x2="185.42" y2="38.1" width="0.1524" layer="91"/>
-<label x="172.72" y="38.1" size="1.27" layer="95"/>
+<wire x1="17.78" y1="-35.56" x2="12.7" y2="-35.56" width="0.1524" layer="91"/>
+<label x="12.7" y="-35.56" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U4" gate="A" pin="W0"/>
 </segment>
 </net>
-<net name="FMC_D5" class="2">
+<net name="MKM_AVR_MISO" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS4_P"/>
-<wire x1="149.86" y1="48.26" x2="185.42" y2="48.26" width="0.1524" layer="91"/>
-<label x="172.72" y="48.26" size="1.27" layer="95"/>
+<wire x1="17.78" y1="-38.1" x2="-33.02" y2="-38.1" width="0.1524" layer="91"/>
+<label x="-38.1" y="-38.1" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U4" gate="A" pin="W1"/>
+<pinref part="JP4" gate="A" pin="2"/>
+<wire x1="-33.02" y1="-38.1" x2="-38.1" y2="-38.1" width="0.1524" layer="91"/>
+<wire x1="-33.02" y1="-40.64" x2="-33.02" y2="-38.1" width="0.1524" layer="91"/>
+<junction x="-33.02" y="-38.1"/>
 </segment>
-</net>
-<net name="FMC_D21" class="2">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS13_P"/>
-<wire x1="93.98" y1="-2.54" x2="60.96" y2="-2.54" width="0.1524" layer="91"/>
-<label x="63.5" y="-2.54" size="1.27" layer="95"/>
+<pinref part="JP3" gate="G$1" pin="1"/>
+<wire x1="134.62" y1="66.04" x2="127" y2="66.04" width="0.1524" layer="91"/>
+<pinref part="U3" gate="A" pin="PD1_(PCINT25/ADC25/MISO)"/>
+<wire x1="127" y1="66.04" x2="127" y2="88.9" width="0.1524" layer="91"/>
+<wire x1="127" y1="88.9" x2="96.52" y2="88.9" width="0.1524" layer="91"/>
+<wire x1="96.52" y1="88.9" x2="88.9" y2="88.9" width="0.1524" layer="91"/>
+<wire x1="96.52" y1="88.9" x2="96.52" y2="78.74" width="0.1524" layer="91"/>
+<junction x="96.52" y="88.9"/>
+<label x="96.52" y="78.74" size="1.27" layer="95" rot="R270" xref="yes"/>
 </segment>
 </net>
-<net name="FMC_A15" class="3">
+<net name="MKM_FPGA_SCK" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS14_P"/>
-<wire x1="93.98" y1="-15.24" x2="60.96" y2="-15.24" width="0.1524" layer="91"/>
-<label x="63.5" y="-15.24" size="1.27" layer="95"/>
+<wire x1="17.78" y1="-43.18" x2="12.7" y2="-43.18" width="0.1524" layer="91"/>
+<label x="12.7" y="-43.18" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U4" gate="A" pin="Z0"/>
 </segment>
 </net>
-<net name="FMC_D2" class="2">
+<net name="N$4" class="0">
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS9_N"/>
-<wire x1="93.98" y1="35.56" x2="60.96" y2="35.56" width="0.1524" layer="91"/>
-<label x="63.5" y="35.56" size="1.27" layer="95"/>
+<pinref part="LED1" gate="G$1" pin="A"/>
+<wire x1="228.6" y1="-45.72" x2="236.22" y2="-45.72" width="0.1524" layer="91"/>
+<pinref part="R7" gate="A" pin="4"/>
 </segment>
 </net>
-<net name="FMC_NE1" class="0">
+<net name="AVR_LED1" class="0">
+<segment>
+<wire x1="208.28" y1="-45.72" x2="203.2" y2="-45.72" width="0.1524" layer="91"/>
+<label x="203.2" y="-45.72" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="R7" gate="A" pin="5"/>
+</segment>
 <segment>
-<pinref part="CON1" gate="G$1" pin="F_LVDS5_P"/>
-<wire x1="93.98" y1="48.26" x2="60.96" y2="48.26" width="0.1524" layer="91"/>
-<label x="63.5" y="48.26" size="1.27" layer="95"/>
+<pinref part="U3" gate="A" pin="(PCINT7/ADC7)_PA7"/>
+<wire x1="-22.86" y1="88.9" x2="-25.4" y2="88.9" width="0.1524" layer="91"/>
+<label x="-25.4" y="88.9" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
 </net>
-</nets>
-</sheet>
-<sheet>
-<description>Power</description>
-<plain>
-<text x="-114.3" y="34.29" size="3.81" layer="91">VCC 3.3V regulator</text>
-<text x="-2.54" y="35.56" size="3.81" layer="91">DC/DC converter producing -15v for Noise source</text>
-<text x="81.28" y="-11.43" size="1.778" layer="91">Lowpass filter</text>
-<text x="55.88" y="-11.43" size="1.778" layer="91">LC filter</text>
-<text x="93.98" y="-88.9" size="2.54" layer="91">Optionally power whole board
-using micro USB connector</text>
-<text x="-50.8" y="11.43" size="1.778" layer="91">Output cap should
-be X7R with ESR
-between 5-500 mOhm. </text>
-</plain>
-<instances>
-<instance part="USB_PWR" gate="G$1" x="121.92" y="-104.14"/>
-<instance part="SUPPLY11" gate="GND" x="-99.06" y="-10.16" rot="MR0"/>
-<instance part="P+2" gate="VCC" x="-58.42" y="27.94"/>
-<instance part="U1" gate="A" x="-81.28" y="12.7"/>
-<instance part="C8" gate="G$1" x="-63.5" y="-5.08" smashed="yes" rot="R180">
-<attribute name="NAME" x="-60.96" y="-3.81" size="1.27" layer="95"/>
-<attribute name="VALUE" x="-62.23" y="-7.62" size="1.27" layer="96"/>
-</instance>
-<instance part="C10" gate="G$1" x="-106.68" y="10.16" smashed="yes">
-<attribute name="NAME" x="-109.22" y="16.51" size="1.27" layer="95" rot="R270"/>
-<attribute name="VALUE" x="-104.14" y="15.24" size="1.27" layer="96" rot="R270"/>
-</instance>
-<instance part="C7" gate="G$1" x="-58.42" y="11.43" smashed="yes">
-<attribute name="NAME" x="-60.96" y="11.43" size="1.27" layer="95" rot="R90"/>
-<attribute name="VALUE" x="-55.88" y="6.35" size="1.27" layer="96" rot="R90"/>
-</instance>
-<instance part="SUPPLY14" gate="GND" x="-63.5" y="-11.43" rot="MR0"/>
-<instance part="SUPPLY17" gate="GND" x="-58.42" y="2.54" rot="MR0"/>
-<instance part="SUPPLY1" gate="GND" x="38.1" y="0"/>
-<instance part="R3" gate="G$1" x="135.89" y="15.24" rot="R90"/>
-<instance part="SUPPLY3" gate="GND" x="135.89" y="-5.08"/>
-<instance part="IC2" gate="G$1" x="25.4" y="17.78"/>
-<instance part="SUPPLY9" gate="GND" x="48.26" y="12.7"/>
-<instance part="P+3" gate="VCC" x="40.64" y="20.32" smashed="yes">
-<attribute name="VALUE" x="43.18" y="22.86" size="1.778" layer="96" rot="R180"/>
-</instance>
-<instance part="C11" gate="A" x="0" y="22.86" rot="R270"/>
-<instance part="C9" gate="A" x="48.26" y="17.78" rot="R90"/>
-<instance part="ORANGE" gate="G$1" x="135.89" y="2.54" rot="R180"/>
-<instance part="IC1" gate="G$1" x="93.98" y="17.78"/>
-<instance part="SUPPLY12" gate="GND" x="116.84" y="12.7"/>
-<instance part="P+4" gate="VCC" x="109.22" y="20.32" smashed="yes">
-<attribute name="VALUE" x="111.76" y="22.86" size="1.778" layer="96" rot="R180"/>
-</instance>
-<instance part="C5" gate="A" x="68.58" y="22.86" rot="R270"/>
-<instance part="C1" gate="A" x="116.84" y="17.78" rot="R90">
-<attribute name="OC_FARNELL" x="116.84" y="17.78" size="1.778" layer="96" rot="R90" display="off"/>
-</instance>
-<instance part="C6" gate="G$1" x="66.04" y="-26.67" smashed="yes">
-<attribute name="NAME" x="69.85" y="-24.13" size="1.6764" layer="95"/>
-<attribute name="VALUE" x="69.85" y="-26.67" size="1.6764" layer="96"/>
-</instance>
-<instance part="C4" gate="G$1" x="95.25" y="-26.67" smashed="yes">
-<attribute name="NAME" x="99.06" y="-24.13" size="1.6764" layer="95"/>
-<attribute name="VALUE" x="99.06" y="-26.67" size="1.6764" layer="96"/>
-</instance>
-<instance part="R6" gate="G$1" x="83.82" y="-16.51" rot="R180"/>
-<instance part="SUPPLY13" gate="GND" x="66.04" y="-33.02"/>
-<instance part="SUPPLY15" gate="GND" x="95.25" y="-33.02"/>
-<instance part="L1" gate="G$1" x="58.42" y="-16.51"/>
-<instance part="SJ1" gate="G$1" x="106.68" y="-16.51" rot="R180"/>
-<instance part="FRAME6" gate="G$1" x="-198.12" y="-142.24"/>
-<instance part="SUPPLY58" gate="GND" x="109.22" y="-109.22"/>
-<instance part="D2" gate="G$1" x="-147.32" y="17.78" rot="R270"/>
-<instance part="C12" gate="G$1" x="-124.46" y="7.62" smashed="yes">
-<attribute name="NAME" x="-127" y="6.35" size="1.6764" layer="95" rot="R90"/>
-<attribute name="VALUE" x="-119.38" y="-5.08" size="1.6764" layer="96" rot="R90"/>
-</instance>
-<instance part="SUPPLY5" gate="GND" x="-124.46" y="-2.54" rot="MR0"/>
-<instance part="L2" gate="G$1" x="-134.62" y="17.78"/>
-</instances>
-<busses>
-</busses>
-<nets>
-<net name="GND" class="1">
+<net name="N$5" class="0">
 <segment>
-<pinref part="SUPPLY11" gate="GND" pin="GND"/>
-<wire x1="-96.52" y1="5.08" x2="-99.06" y2="5.08" width="0.1524" layer="91"/>
-<wire x1="-99.06" y1="5.08" x2="-99.06" y2="-7.62" width="0.1524" layer="91"/>
-<pinref part="U1" gate="A" pin="GND"/>
-<pinref part="C10" gate="G$1" pin="P$2"/>
-<wire x1="-106.68" y1="5.08" x2="-99.06" y2="5.08" width="0.1524" layer="91"/>
-<wire x1="-106.68" y1="7.62" x2="-106.68" y2="5.08" width="0.1524" layer="91"/>
-<junction x="-99.06" y="5.08"/>
+<pinref part="LED2" gate="G$1" pin="A"/>
+<wire x1="228.6" y1="-48.26" x2="231.14" y2="-48.26" width="0.1524" layer="91"/>
+<pinref part="R7" gate="A" pin="3"/>
 </segment>
+</net>
+<net name="AVR_LED2" class="0">
 <segment>
-<pinref part="C7" gate="G$1" pin="P$2"/>
-<pinref part="SUPPLY17" gate="GND" pin="GND"/>
-<wire x1="-58.42" y1="5.08" x2="-58.42" y2="8.89" width="0.1524" layer="91"/>
+<wire x1="208.28" y1="-48.26" x2="203.2" y2="-48.26" width="0.1524" layer="91"/>
+<label x="203.2" y="-48.26" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="R7" gate="A" pin="6"/>
 </segment>
 <segment>
-<pinref part="SUPPLY14" gate="GND" pin="GND"/>
-<pinref part="C8" gate="G$1" pin="1"/>
-<wire x1="-63.5" y1="-8.89" x2="-63.5" y2="-7.62" width="0.1524" layer="91"/>
+<pinref part="U3" gate="A" pin="(PCINT6/ADC6)_PA6"/>
+<wire x1="-22.86" y1="91.44" x2="-25.4" y2="91.44" width="0.1524" layer="91"/>
+<label x="-25.4" y="91.44" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
+</net>
+<net name="N$15" class="0">
 <segment>
-<pinref part="SUPPLY1" gate="GND" pin="GND"/>
-<wire x1="38.1" y1="10.16" x2="38.1" y2="2.54" width="0.1524" layer="91"/>
-<pinref part="IC2" gate="G$1" pin="GND"/>
+<pinref part="LED3" gate="G$1" pin="A"/>
+<wire x1="228.6" y1="-50.8" x2="236.22" y2="-50.8" width="0.1524" layer="91"/>
+<pinref part="R7" gate="A" pin="2"/>
 </segment>
+</net>
+<net name="AVR_LED3" class="0">
 <segment>
-<pinref part="C9" gate="A" pin="1"/>
-<pinref part="SUPPLY9" gate="GND" pin="GND"/>
-<wire x1="48.26" y1="17.78" x2="48.26" y2="15.24" width="0.1524" layer="91"/>
+<wire x1="208.28" y1="-50.8" x2="203.2" y2="-50.8" width="0.1524" layer="91"/>
+<label x="203.2" y="-50.8" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="R7" gate="A" pin="7"/>
 </segment>
 <segment>
-<pinref part="SUPPLY3" gate="GND" pin="GND"/>
-<wire x1="135.89" y1="0" x2="135.89" y2="-2.54" width="0.1524" layer="91"/>
-<pinref part="ORANGE" gate="G$1" pin="A"/>
+<pinref part="U3" gate="A" pin="(PC!INT5/ADC5)_PA5"/>
+<wire x1="-22.86" y1="93.98" x2="-25.4" y2="93.98" width="0.1524" layer="91"/>
+<label x="-25.4" y="93.98" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
+</net>
+<net name="N$16" class="0">
 <segment>
-<pinref part="C1" gate="A" pin="1"/>
-<pinref part="SUPPLY12" gate="GND" pin="GND"/>
-<wire x1="116.84" y1="17.78" x2="116.84" y2="15.24" width="0.1524" layer="91"/>
+<pinref part="LED4" gate="G$1" pin="A"/>
+<wire x1="228.6" y1="-53.34" x2="231.14" y2="-53.34" width="0.1524" layer="91"/>
+<pinref part="R7" gate="A" pin="1"/>
 </segment>
+</net>
+<net name="AVR_LED4" class="0">
 <segment>
-<pinref part="C6" gate="G$1" pin="P$2"/>
-<pinref part="SUPPLY13" gate="GND" pin="GND"/>
-<wire x1="66.04" y1="-29.21" x2="66.04" y2="-30.48" width="0.1524" layer="91"/>
+<wire x1="208.28" y1="-53.34" x2="203.2" y2="-53.34" width="0.1524" layer="91"/>
+<label x="203.2" y="-53.34" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="R7" gate="A" pin="8"/>
 </segment>
 <segment>
-<pinref part="C4" gate="G$1" pin="P$2"/>
-<pinref part="SUPPLY15" gate="GND" pin="GND"/>
-<wire x1="95.25" y1="-29.21" x2="95.25" y2="-30.48" width="0.1524" layer="91"/>
+<pinref part="U3" gate="A" pin="(PCINT4/ADC4)_PA4"/>
+<wire x1="-22.86" y1="96.52" x2="-25.4" y2="96.52" width="0.1524" layer="91"/>
+<label x="-25.4" y="96.52" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
+</net>
+<net name="AVR_GPIO_1" class="0">
 <segment>
-<pinref part="USB_PWR" gate="G$1" pin="GND"/>
-<wire x1="119.38" y1="-104.14" x2="109.22" y2="-104.14" width="0.1524" layer="91"/>
-<pinref part="SUPPLY58" gate="GND" pin="GND"/>
-<wire x1="109.22" y1="-104.14" x2="109.22" y2="-106.68" width="0.1524" layer="91"/>
+<pinref part="JP5" gate="G$1" pin="2"/>
+<wire x1="231.14" y1="7.62" x2="226.06" y2="7.62" width="0.1524" layer="91"/>
+<label x="226.06" y="7.62" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
 <segment>
-<pinref part="C12" gate="G$1" pin="P$2"/>
-<wire x1="-124.46" y1="5.08" x2="-124.46" y2="0" width="0.1524" layer="91"/>
-<pinref part="SUPPLY5" gate="GND" pin="GND"/>
+<pinref part="U3" gate="A" pin="(PCINT18/ADC18/TOCC2/RXD/INT1)_PC2"/>
+<wire x1="88.9" y1="109.22" x2="93.98" y2="109.22" width="0.1524" layer="91"/>
+<label x="93.98" y="109.22" size="1.27" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="5V" class="0">
+<net name="AVR_GPIO_2" class="0">
 <segment>
-<pinref part="IC2" gate="G$1" pin="V+"/>
-<wire x1="38.1" y1="15.24" x2="40.64" y2="15.24" width="0.1524" layer="91"/>
-<wire x1="40.64" y1="15.24" x2="40.64" y2="17.78" width="0.1524" layer="91"/>
-<pinref part="P+3" gate="VCC" pin="VCC"/>
+<pinref part="JP5" gate="G$1" pin="3"/>
+<wire x1="231.14" y1="5.08" x2="226.06" y2="5.08" width="0.1524" layer="91"/>
+<label x="226.06" y="5.08" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
 <segment>
-<pinref part="IC1" gate="G$1" pin="V+"/>
-<wire x1="106.68" y1="15.24" x2="109.22" y2="15.24" width="0.1524" layer="91"/>
-<wire x1="109.22" y1="15.24" x2="109.22" y2="17.78" width="0.1524" layer="91"/>
-<pinref part="P+4" gate="VCC" pin="VCC"/>
+<pinref part="U3" gate="A" pin="(PCINT19/ADC19/TOCC3/TXD)_PC3"/>
+<wire x1="88.9" y1="106.68" x2="93.98" y2="106.68" width="0.1524" layer="91"/>
+<label x="93.98" y="106.68" size="1.27" layer="95" xref="yes"/>
 </segment>
+</net>
+<net name="AVR_GPIO_3" class="0">
 <segment>
-<label x="-116.84" y="20.32" size="1.778" layer="95"/>
-<pinref part="C12" gate="G$1" pin="P$1"/>
-<wire x1="-124.46" y1="12.7" x2="-124.46" y2="17.78" width="0.1524" layer="91"/>
-<wire x1="-96.52" y1="17.78" x2="-99.06" y2="17.78" width="0.1524" layer="91"/>
-<wire x1="-99.06" y1="17.78" x2="-106.68" y2="17.78" width="0.1524" layer="91"/>
-<junction x="-99.06" y="17.78"/>
-<pinref part="U1" gate="A" pin="VIN"/>
-<pinref part="U1" gate="A" pin="VEN"/>
-<wire x1="-96.52" y1="12.7" x2="-99.06" y2="12.7" width="0.1524" layer="91"/>
-<wire x1="-99.06" y1="12.7" x2="-99.06" y2="17.78" width="0.1524" layer="91"/>
-<pinref part="C10" gate="G$1" pin="P$1"/>
-<wire x1="-106.68" y1="15.24" x2="-106.68" y2="17.78" width="0.1524" layer="91"/>
-<wire x1="-124.46" y1="17.78" x2="-106.68" y2="17.78" width="0.1524" layer="91"/>
-<junction x="-106.68" y="17.78"/>
-<pinref part="L2" gate="G$1" pin="2"/>
-<wire x1="-129.54" y1="17.78" x2="-124.46" y2="17.78" width="0.1524" layer="91"/>
-<junction x="-124.46" y="17.78"/>
+<pinref part="JP5" gate="G$1" pin="4"/>
+<wire x1="231.14" y1="2.54" x2="226.06" y2="2.54" width="0.1524" layer="91"/>
+<label x="226.06" y="2.54" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
-</net>
-<net name="3V3" class="0">
 <segment>
-<label x="-53.34" y="22.86" size="1.778" layer="95" rot="MR0"/>
-<wire x1="-58.42" y1="25.4" x2="-58.42" y2="17.78" width="0.1524" layer="91"/>
-<wire x1="-58.42" y1="17.78" x2="-66.04" y2="17.78" width="0.1524" layer="91"/>
-<junction x="-58.42" y="17.78"/>
-<pinref part="P+2" gate="VCC" pin="VCC"/>
-<pinref part="U1" gate="A" pin="VOUT"/>
-<pinref part="C7" gate="G$1" pin="P$1"/>
-<wire x1="-58.42" y1="16.51" x2="-58.42" y2="17.78" width="0.1524" layer="91"/>
+<pinref part="U3" gate="A" pin="(PCINT20/ADC20/TOCC4)_PC4"/>
+<wire x1="88.9" y1="104.14" x2="93.98" y2="104.14" width="0.1524" layer="91"/>
+<label x="93.98" y="104.14" size="1.27" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="N$8" class="0">
+<net name="AVR_GPIO_4" class="0">
 <segment>
-<pinref part="U1" gate="A" pin="BYPASS"/>
-<pinref part="C8" gate="G$1" pin="2"/>
-<wire x1="-66.04" y1="5.08" x2="-63.5" y2="5.08" width="0.1524" layer="91"/>
-<wire x1="-63.5" y1="5.08" x2="-63.5" y2="0" width="0.1524" layer="91"/>
+<pinref part="JP5" gate="G$1" pin="5"/>
+<wire x1="231.14" y1="0" x2="226.06" y2="0" width="0.1524" layer="91"/>
+<label x="226.06" y="0" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
-</net>
-<net name="MINUS15V" class="0">
 <segment>
-<label x="118.11" y="27.94" size="1.778" layer="95"/>
-<pinref part="R3" gate="G$1" pin="2"/>
-<wire x1="135.89" y1="25.4" x2="139.7" y2="25.4" width="0.1524" layer="91"/>
-<wire x1="135.89" y1="20.32" x2="135.89" y2="25.4" width="0.1524" layer="91"/>
-<junction x="135.89" y="25.4"/>
-<pinref part="IC1" gate="G$1" pin="VOUT"/>
-<pinref part="C1" gate="A" pin="2"/>
-<wire x1="106.68" y1="25.4" x2="116.84" y2="25.4" width="0.1524" layer="91"/>
-<junction x="116.84" y="25.4"/>
-<wire x1="135.89" y1="25.4" x2="116.84" y2="25.4" width="0.1524" layer="91"/>
+<pinref part="U3" gate="A" pin="(PCINT21/ADC21/TOCC5/ICP1/T0)_PC5"/>
+<wire x1="88.9" y1="101.6" x2="93.98" y2="101.6" width="0.1524" layer="91"/>
+<label x="93.98" y="101.6" size="1.27" layer="95" xref="yes"/>
 </segment>
+</net>
+<net name="AVR_GPIO_5" class="0">
 <segment>
-<wire x1="48.26" y1="-16.51" x2="53.34" y2="-16.51" width="0.1524" layer="91"/>
-<pinref part="L1" gate="G$1" pin="1"/>
-<label x="40.64" y="-13.97" size="1.778" layer="95"/>
+<pinref part="JP5" gate="G$1" pin="6"/>
+<wire x1="231.14" y1="-2.54" x2="226.06" y2="-2.54" width="0.1524" layer="91"/>
+<label x="226.06" y="-2.54" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
-</net>
-<net name="N$7" class="0">
 <segment>
-<pinref part="R3" gate="G$1" pin="1"/>
-<wire x1="135.89" y1="7.62" x2="135.89" y2="10.16" width="0.1524" layer="91"/>
-<pinref part="ORANGE" gate="G$1" pin="C"/>
+<pinref part="U3" gate="A" pin="(PCINT22/ADC22/CLKI/TOCC6)_PC6"/>
+<wire x1="88.9" y1="99.06" x2="93.98" y2="99.06" width="0.1524" layer="91"/>
+<label x="93.98" y="99.06" size="1.27" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="N$2" class="0">
+<net name="AVR_GPIO_6" class="0">
 <segment>
-<pinref part="IC2" gate="G$1" pin="CAP-"/>
-<wire x1="10.16" y1="15.24" x2="0" y2="15.24" width="0.1524" layer="91"/>
-<pinref part="C11" gate="A" pin="2"/>
+<pinref part="JP5" gate="G$1" pin="7"/>
+<wire x1="231.14" y1="-5.08" x2="226.06" y2="-5.08" width="0.1524" layer="91"/>
+<label x="226.06" y="-5.08" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
-</net>
-<net name="N$3" class="0">
 <segment>
-<pinref part="IC2" gate="G$1" pin="CAP+"/>
-<wire x1="10.16" y1="20.32" x2="7.62" y2="20.32" width="0.1524" layer="91"/>
-<wire x1="7.62" y1="20.32" x2="7.62" y2="25.4" width="0.1524" layer="91"/>
-<wire x1="7.62" y1="25.4" x2="0" y2="25.4" width="0.1524" layer="91"/>
-<wire x1="0" y1="25.4" x2="0" y2="22.86" width="0.1524" layer="91"/>
-<pinref part="C11" gate="A" pin="1"/>
+<pinref part="U3" gate="A" pin="(PCINT23/ADC23/TOCC7/T1)_PC7"/>
+<wire x1="88.9" y1="96.52" x2="93.98" y2="96.52" width="0.1524" layer="91"/>
+<label x="93.98" y="96.52" size="1.27" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="MINUS5V" class="0">
+<net name="AVR_GPIO_7" class="0">
 <segment>
-<pinref part="IC2" gate="G$1" pin="VOUT"/>
-<pinref part="C9" gate="A" pin="2"/>
-<wire x1="38.1" y1="25.4" x2="48.26" y2="25.4" width="0.1524" layer="91"/>
-<junction x="48.26" y="25.4"/>
-<wire x1="48.26" y1="25.4" x2="60.96" y2="25.4" width="0.1524" layer="91"/>
-<label x="48.26" y="27.94" size="1.778" layer="95"/>
-<wire x1="60.96" y1="-2.54" x2="109.22" y2="-2.54" width="0.1524" layer="91"/>
-<wire x1="109.22" y1="-2.54" x2="109.22" y2="10.16" width="0.1524" layer="91"/>
-<pinref part="IC1" gate="G$1" pin="GND"/>
-<wire x1="109.22" y1="10.16" x2="106.68" y2="10.16" width="0.1524" layer="91"/>
-<wire x1="60.96" y1="-2.54" x2="60.96" y2="25.4" width="0.1524" layer="91"/>
+<pinref part="JP5" gate="G$1" pin="8"/>
+<wire x1="231.14" y1="-7.62" x2="226.06" y2="-7.62" width="0.1524" layer="91"/>
+<label x="226.06" y="-7.62" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
-</net>
-<net name="N$1" class="0">
 <segment>
-<pinref part="IC1" gate="G$1" pin="CAP-"/>
-<wire x1="78.74" y1="15.24" x2="68.58" y2="15.24" width="0.1524" layer="91"/>
-<pinref part="C5" gate="A" pin="2"/>
+<pinref part="U3" gate="A" pin="(PCINT0/ADC0)_PA0"/>
+<wire x1="-22.86" y1="106.68" x2="-25.4" y2="106.68" width="0.1524" layer="91"/>
+<label x="-25.4" y="106.68" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
 </net>
-<net name="N$9" class="0">
+<net name="AVR_GPIO_8" class="0">
 <segment>
-<pinref part="IC1" gate="G$1" pin="CAP+"/>
-<wire x1="78.74" y1="20.32" x2="76.2" y2="20.32" width="0.1524" layer="91"/>
-<wire x1="76.2" y1="20.32" x2="76.2" y2="25.4" width="0.1524" layer="91"/>
-<wire x1="76.2" y1="25.4" x2="68.58" y2="25.4" width="0.1524" layer="91"/>
-<wire x1="68.58" y1="25.4" x2="68.58" y2="22.86" width="0.1524" layer="91"/>
-<pinref part="C5" gate="A" pin="1"/>
+<pinref part="JP5" gate="G$1" pin="9"/>
+<wire x1="231.14" y1="-10.16" x2="226.06" y2="-10.16" width="0.1524" layer="91"/>
+<label x="226.06" y="-10.16" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
-</net>
-<net name="MINUS15V_STABLE" class="0">
 <segment>
-<pinref part="SJ1" gate="G$1" pin="1"/>
-<wire x1="111.76" y1="-16.51" x2="115.57" y2="-16.51" width="0.1524" layer="91"/>
-<label x="115.57" y="-16.51" size="1.778" layer="95" xref="yes"/>
+<pinref part="U3" gate="A" pin="(PCINT1/ADC1/AIN0)_PA1"/>
+<wire x1="-22.86" y1="104.14" x2="-25.4" y2="104.14" width="0.1524" layer="91"/>
+<label x="-25.4" y="104.14" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
 </net>
-<net name="N$11" class="0">
+<net name="AVR_PANIC" class="0">
 <segment>
-<pinref part="C6" gate="G$1" pin="P$1"/>
-<wire x1="66.04" y1="-21.59" x2="66.04" y2="-16.51" width="0.1524" layer="91"/>
-<wire x1="66.04" y1="-16.51" x2="63.5" y2="-16.51" width="0.1524" layer="91"/>
-<pinref part="R6" gate="G$1" pin="2"/>
-<wire x1="78.74" y1="-16.51" x2="66.04" y2="-16.51" width="0.1524" layer="91"/>
-<junction x="66.04" y="-16.51"/>
-<pinref part="L1" gate="G$1" pin="2"/>
+<pinref part="U3" gate="A" pin="(PCINT2/ADC2/AIN1)_PA2"/>
+<wire x1="-22.86" y1="101.6" x2="-25.4" y2="101.6" width="0.1524" layer="91"/>
+<label x="-25.4" y="101.6" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
-</net>
-<net name="N$6" class="0">
 <segment>
-<pinref part="R6" gate="G$1" pin="1"/>
-<pinref part="SJ1" gate="G$1" pin="2"/>
-<wire x1="88.9" y1="-16.51" x2="95.25" y2="-16.51" width="0.1524" layer="91"/>
-<pinref part="C4" gate="G$1" pin="P$1"/>
-<wire x1="95.25" y1="-16.51" x2="101.6" y2="-16.51" width="0.1524" layer="91"/>
-<wire x1="95.25" y1="-21.59" x2="95.25" y2="-16.51" width="0.1524" layer="91"/>
-<junction x="95.25" y="-16.51"/>
+<wire x1="223.52" y1="48.26" x2="218.44" y2="48.26" width="0.1524" layer="91"/>
+<label x="218.44" y="48.26" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U$4" gate="A" pin="A2"/>
 </segment>
-</net>
-<net name="P-5.0V_MAIN" class="0">
 <segment>
-<wire x1="-147.32" y1="10.16" x2="-162.56" y2="10.16" width="0.1524" layer="91"/>
-<label x="-162.56" y="10.16" size="1.778" layer="95" rot="R180" xref="yes"/>
-<pinref part="D2" gate="G$1" pin="A2"/>
-<wire x1="-147.32" y1="10.16" x2="-147.32" y2="12.7" width="0.1524" layer="91"/>
+<wire x1="223.52" y1="68.58" x2="218.44" y2="68.58" width="0.1524" layer="91"/>
+<label x="218.44" y="68.58" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U$4" gate="A" pin="A1"/>
 </segment>
 </net>
-<net name="USB_PWR_VBUS" class="0">
+<net name="3V3" class="0">
 <segment>
-<pinref part="USB_PWR" gate="G$1" pin="VBUS"/>
-<wire x1="119.38" y1="-101.6" x2="109.22" y2="-101.6" width="0.1524" layer="91"/>
-<label x="109.22" y="-101.6" size="1.778" layer="95" rot="R180" xref="yes"/>
+<pinref part="JP6" gate="G$1" pin="1"/>
+<wire x1="231.14" y1="114.3" x2="226.06" y2="114.3" width="0.1524" layer="91"/>
+<pinref part="P+26" gate="VCC" pin="VCC"/>
+<wire x1="226.06" y1="114.3" x2="226.06" y2="119.38" width="0.1524" layer="91"/>
+<label x="226.06" y="124.46" size="1.27" layer="95" rot="R90"/>
 </segment>
+</net>
+<net name="AVR_GPIO_10" class="0">
 <segment>
-<wire x1="-147.32" y1="25.4" x2="-162.56" y2="25.4" width="0.1524" layer="91"/>
-<label x="-162.56" y="25.4" size="1.778" layer="95" rot="R180" xref="yes"/>
-<pinref part="D2" gate="G$1" pin="A1"/>
-<wire x1="-147.32" y1="25.4" x2="-147.32" y2="22.86" width="0.1524" layer="91"/>
+<pinref part="U3" gate="A" pin="PB2_(PCINT10/ADC10)"/>
+<wire x1="-22.86" y1="78.74" x2="-25.4" y2="78.74" width="0.1524" layer="91"/>
+<label x="-25.4" y="78.74" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
 </net>
-<net name="N$14" class="0">
+<net name="AVR_GPIO_11" class="0">
 <segment>
-<pinref part="D2" gate="G$1" pin="CC"/>
-<pinref part="L2" gate="G$1" pin="1"/>
-<wire x1="-144.78" y1="17.78" x2="-139.7" y2="17.78" width="0.1524" layer="91"/>
+<pinref part="U3" gate="A" pin="PB3_(PCINT11/ADC11)"/>
+<wire x1="-22.86" y1="76.2" x2="-25.4" y2="76.2" width="0.1524" layer="91"/>
+<label x="-25.4" y="76.2" size="1.27" layer="95" rot="R180" xref="yes"/>
 </segment>
 </net>
 </nets>
 </sheet>
 <sheet>
-<description>Noise source</description>
+<description>RTC</description>
 <plain>
-<text x="66.04" y="63.5" size="3.81" layer="91">Digitizer</text>
-<text x="-147.32" y="63.5" size="3.81" layer="91">Noise generator</text>
-<text x="-118.11" y="1.27" size="1.778" layer="91" rot="R90">Noisy diode</text>
-<text x="-55.88" y="63.5" size="3.81" layer="91">Amplifier</text>
-<text x="-147.32" y="-35.56" size="1.778" layer="91">AGND is connected to GND on the board using polygons
-(found no other good way) - not visible in schematics.</text>
 </plain>
 <instances>
-<instance part="C13" gate="G$1" x="55.88" y="22.86" smashed="yes" rot="R180">
-<attribute name="NAME" x="53.34" y="20.32" size="1.778" layer="95" rot="R270"/>
-<attribute name="VALUE" x="58.42" y="27.94" size="1.778" layer="96" rot="R270"/>
-</instance>
-<instance part="U2" gate="A" x="81.28" y="30.48"/>
-<instance part="P+1" gate="VCC" x="60.96" y="55.88"/>
-<instance part="SUPPLY4" gate="GND" x="60.96" y="5.08"/>
-<instance part="T3" gate="G$1" x="-114.3" y="6.35" smashed="yes" rot="R180">
-<attribute name="NAME" x="-110.49" y="3.81" size="1.778" layer="95" rot="R180"/>
-<attribute name="VALUE" x="-116.84" y="-1.27" size="1.778" layer="96"/>
-</instance>
-<instance part="T2" gate="G$1" x="-99.06" y="6.35" smashed="yes">
-<attribute name="NAME" x="-96.52" y="8.89" size="1.778" layer="95"/>
-<attribute name="VALUE" x="-96.52" y="6.35" size="1.778" layer="96"/>
-</instance>
-<instance part="C3" gate="G$1" x="-124.46" y="1.27" smashed="yes" rot="R180">
-<attribute name="NAME" x="-127" y="-1.27" size="1.778" layer="95" rot="R270"/>
-<attribute name="VALUE" x="-129.54" y="6.35" size="1.778" layer="96" rot="R270"/>
-</instance>
-<instance part="R5" gate="G$1" x="-106.68" y="21.59" rot="R180"/>
-<instance part="R2" gate="G$1" x="-96.52" y="29.21" rot="R270"/>
-<instance part="SUPPLY6" gate="GND" x="-81.28" y="31.75"/>
-<instance part="TP2" gate="G$1" x="-88.9" y="26.67" smashed="yes">
-<attribute name="NAME" x="-91.44" y="19.05" size="1.778" layer="95"/>
-<attribute name="TP_SIGNAL_NAME" x="-87.63" y="25.4" size="1.778" layer="97"/>
-</instance>
-<instance part="S1" gate="G$1" x="-133.35" y="30.48" smashed="yes">
-<attribute name="NAME" x="-140.97" y="41.91" size="1.778" layer="95"/>
-<attribute name="VALUE" x="-133.35" y="40.64" size="1.778" layer="96"/>
+<instance part="U6" gate="A" x="0" y="0"/>
+<instance part="SUPPLY55" gate="GND" x="-20.32" y="-22.86"/>
+<instance part="P+27" gate="VCC" x="-20.32" y="22.86" smashed="yes">
+<attribute name="VALUE" x="-25.4" y="17.78" size="1.778" layer="96" rot="R90"/>
 </instance>
-<instance part="SUPPLY10" gate="GND" x="-144.78" y="10.16"/>
-<instance part="C2" gate="G$1" x="-30.48" y="20.32" smashed="yes" rot="R90">
-<attribute name="NAME" x="-33.02" y="22.86" size="1.778" layer="95" rot="R180"/>
-<attribute name="VALUE" x="-25.4" y="17.78" size="1.778" layer="96" rot="R180"/>
+<instance part="P+28" gate="VCC" x="-15.24" y="22.86" smashed="yes">
+<attribute name="VALUE" x="-10.16" y="20.32" size="1.778" layer="96" rot="R90"/>
 </instance>
-<instance part="R4" gate="G$1" x="-12.7" y="30.48" smashed="yes">
-<attribute name="NAME" x="-8.89" y="26.8986" size="1.778" layer="95"/>
-<attribute name="VALUE" x="-19.05" y="27.178" size="1.778" layer="96"/>
+<instance part="Q2" gate="G$1" x="-40.64" y="-10.16" smashed="yes">
+<attribute name="NAME" x="-43.18" y="-14.224" size="1.778" layer="95"/>
+<attribute name="VALUE" x="-43.18" y="-17.78" size="1.778" layer="96"/>
 </instance>
-<instance part="T1" gate="G$1" x="-7.62" y="20.32" smashed="yes">
-<attribute name="NAME" x="-5.08" y="20.32" size="1.778" layer="95"/>
-<attribute name="VALUE" x="-2.54" y="17.78" size="1.778" layer="96"/>
+<instance part="C63" gate="G$1" x="-33.02" y="-15.24" smashed="yes" rot="R180">
+<attribute name="NAME" x="-28.956" y="-14.859" size="1.778" layer="95"/>
+<attribute name="VALUE" x="-28.956" y="-12.319" size="1.778" layer="96"/>
 </instance>
-<instance part="R1" gate="G$1" x="-5.08" y="45.72" rot="R90"/>
-<instance part="SUPPLY8" gate="GND" x="-5.08" y="10.16"/>
-<instance part="P+7" gate="VCC" x="-5.08" y="55.88"/>
-<instance part="D1" gate="G$1" x="-12.7" y="35.56" smashed="yes">
-<attribute name="NAME" x="-9.906" y="32.385" size="1.778" layer="95"/>
-<attribute name="VALUE" x="-20.066" y="32.131" size="1.778" layer="96"/>
+<instance part="C64" gate="G$1" x="-48.26" y="-15.24" smashed="yes" rot="R180">
+<attribute name="NAME" x="-52.324" y="-13.081" size="1.778" layer="95" rot="R180"/>
+<attribute name="VALUE" x="-52.324" y="-10.541" size="1.778" layer="96" rot="R180"/>
 </instance>
-<instance part="TP1" gate="G$1" x="7.62" y="38.1"/>
-<instance part="FRAME7" gate="G$1" x="-220.98" y="-111.76"/>
+<instance part="SUPPLY56" gate="GND" x="-48.26" y="-22.86"/>
+<instance part="SUPPLY57" gate="GND" x="-33.02" y="-22.86"/>
+<instance part="FRAME5" gate="G$1" x="-193.04" y="-129.54"/>
 </instances>
 <busses>
 </busses>
 <nets>
-<net name="3V3" class="0">
-<segment>
-<pinref part="U2" gate="A" pin="VCC"/>
-<pinref part="P+1" gate="VCC" pin="VCC"/>
-<wire x1="63.5" y1="35.56" x2="60.96" y2="35.56" width="0.1524" layer="91"/>
-<wire x1="60.96" y1="35.56" x2="60.96" y2="53.34" width="0.1524" layer="91"/>
-<junction x="60.96" y="35.56"/>
-<pinref part="C13" gate="G$1" pin="2"/>
-<wire x1="55.88" y1="35.56" x2="55.88" y2="27.94" width="0.1524" layer="91"/>
-<wire x1="60.96" y1="35.56" x2="55.88" y2="35.56" width="0.1524" layer="91"/>
-</segment>
-<segment>
-<pinref part="R1" gate="G$1" pin="2"/>
-<wire x1="-5.08" y1="50.8" x2="-5.08" y2="53.34" width="0.1524" layer="91"/>
-<pinref part="P+7" gate="VCC" pin="VCC"/>
-</segment>
-</net>
-<net name="AMPLIFIED" class="0">
-<segment>
-<wire x1="63.5" y1="30.48" x2="45.72" y2="30.48" width="0.1524" layer="91"/>
-<label x="45.72" y="30.48" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="U2" gate="A" pin="IN_A"/>
-</segment>
-<segment>
-<wire x1="7.62" y1="30.48" x2="11.43" y2="30.48" width="0.1524" layer="91"/>
-<label x="11.43" y="30.48" size="1.27" layer="95" xref="yes"/>
-<wire x1="-5.08" y1="40.64" x2="-5.08" y2="35.56" width="0.1524" layer="91"/>
-<junction x="-5.08" y="30.48"/>
-<junction x="-5.08" y="30.48"/>
-<pinref part="T1" gate="G$1" pin="C"/>
-<wire x1="-5.08" y1="35.56" x2="-5.08" y2="30.48" width="0.1524" layer="91"/>
-<wire x1="-5.08" y1="30.48" x2="-5.08" y2="25.4" width="0.1524" layer="91"/>
-<pinref part="R1" gate="G$1" pin="1"/>
-<wire x1="-5.08" y1="30.48" x2="7.62" y2="30.48" width="0.1524" layer="91"/>
-<pinref part="R4" gate="G$1" pin="2"/>
-<wire x1="-7.62" y1="30.48" x2="-5.08" y2="30.48" width="0.1524" layer="91"/>
-<pinref part="D1" gate="G$1" pin="C"/>
-<wire x1="-10.16" y1="35.56" x2="-5.08" y2="35.56" width="0.1524" layer="91"/>
-<junction x="-5.08" y="35.56"/>
-<wire x1="7.62" y1="30.48" x2="7.62" y2="35.56" width="0.1524" layer="91"/>
-<pinref part="TP1" gate="G$1" pin="TP"/>
-<junction x="7.62" y="30.48"/>
-</segment>
-</net>
-<net name="DIGITIZED" class="0">
-<segment>
-<label x="111.76" y="35.56" size="1.27" layer="95" xref="yes"/>
-<wire x1="111.76" y1="35.56" x2="99.06" y2="35.56" width="0.1524" layer="91"/>
-<pinref part="U2" gate="A" pin="OUT_Y"/>
-</segment>
-</net>
-<net name="AGND" class="0">
+<net name="3V3_BATT" class="0">
 <segment>
-<pinref part="U2" gate="A" pin="GND"/>
-<pinref part="SUPPLY4" gate="GND" pin="GND"/>
-<wire x1="63.5" y1="20.32" x2="60.96" y2="20.32" width="0.1524" layer="91"/>
-<wire x1="60.96" y1="20.32" x2="60.96" y2="10.16" width="0.1524" layer="91"/>
-<pinref part="C13" gate="G$1" pin="1"/>
-<wire x1="60.96" y1="10.16" x2="60.96" y2="7.62" width="0.1524" layer="91"/>
-<wire x1="55.88" y1="20.32" x2="55.88" y2="10.16" width="0.1524" layer="91"/>
-<wire x1="55.88" y1="10.16" x2="60.96" y2="10.16" width="0.1524" layer="91"/>
-<junction x="60.96" y="10.16"/>
+<wire x1="-20.32" y1="2.54" x2="-20.32" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="P+27" gate="VCC" pin="VCC"/>
+<label x="-22.86" y="17.78" size="1.27" layer="95" rot="R90"/>
+<pinref part="U6" gate="A" pin="VBAT"/>
+<wire x1="-15.24" y1="2.54" x2="-20.32" y2="2.54" width="0.1524" layer="91"/>
 </segment>
+</net>
+<net name="GND" class="1">
 <segment>
-<wire x1="-81.28" y1="36.83" x2="-81.28" y2="34.29" width="0.1524" layer="91"/>
-<pinref part="SUPPLY6" gate="GND" pin="GND"/>
-<pinref part="R2" gate="G$1" pin="1"/>
-<wire x1="-96.52" y1="36.83" x2="-96.52" y2="34.29" width="0.1524" layer="91"/>
-<wire x1="-96.52" y1="36.83" x2="-81.28" y2="36.83" width="0.1524" layer="91"/>
+<pinref part="U6" gate="A" pin="VSS"/>
+<pinref part="SUPPLY55" gate="GND" pin="GND"/>
+<wire x1="-15.24" y1="-10.16" x2="-20.32" y2="-10.16" width="0.1524" layer="91"/>
+<wire x1="-20.32" y1="-10.16" x2="-20.32" y2="-20.32" width="0.1524" layer="91"/>
 </segment>
 <segment>
-<pinref part="SUPPLY10" gate="GND" pin="GND"/>
-<pinref part="S1" gate="G$1" pin="GND"/>
-<wire x1="-143.51" y1="33.02" x2="-144.78" y2="33.02" width="0.1524" layer="91"/>
-<wire x1="-144.78" y1="33.02" x2="-144.78" y2="12.7" width="0.1524" layer="91"/>
+<pinref part="C63" gate="G$1" pin="1"/>
+<pinref part="SUPPLY57" gate="GND" pin="GND"/>
+<wire x1="-33.02" y1="-17.78" x2="-33.02" y2="-20.32" width="0.1524" layer="91"/>
 </segment>
 <segment>
-<pinref part="T1" gate="G$1" pin="E"/>
-<pinref part="SUPPLY8" gate="GND" pin="GND"/>
-<wire x1="-5.08" y1="15.24" x2="-5.08" y2="12.7" width="0.1524" layer="91"/>
+<pinref part="C64" gate="G$1" pin="1"/>
+<pinref part="SUPPLY56" gate="GND" pin="GND"/>
+<wire x1="-48.26" y1="-17.78" x2="-48.26" y2="-20.32" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="NOISE_OUT" class="0">
+<net name="3V3" class="0">
 <segment>
-<pinref part="T3" gate="G$1" pin="B"/>
-<pinref part="T2" gate="G$1" pin="B"/>
-<wire x1="-111.76" y1="6.35" x2="-101.6" y2="6.35" width="0.1524" layer="91"/>
+<pinref part="U6" gate="A" pin="VCC"/>
+<wire x1="-15.24" y1="5.08" x2="-15.24" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="P+28" gate="VCC" pin="VCC"/>
+<label x="-7.62" y="20.32" size="1.27" layer="95" rot="R90"/>
 </segment>
 </net>
-<net name="NOISE_IN" class="0">
+<net name="RTC_X1" class="0">
 <segment>
-<pinref part="R5" gate="G$1" pin="2"/>
-<pinref part="C3" gate="G$1" pin="2"/>
-<wire x1="-124.46" y1="6.35" x2="-124.46" y2="21.59" width="0.1524" layer="91"/>
-<wire x1="-124.46" y1="21.59" x2="-116.84" y2="21.59" width="0.1524" layer="91"/>
-<pinref part="T3" gate="G$1" pin="E"/>
-<wire x1="-116.84" y1="21.59" x2="-111.76" y2="21.59" width="0.1524" layer="91"/>
-<wire x1="-116.84" y1="11.43" x2="-116.84" y2="21.59" width="0.1524" layer="91"/>
-<junction x="-116.84" y="21.59"/>
+<pinref part="U6" gate="A" pin="X1"/>
+<pinref part="Q2" gate="G$1" pin="1"/>
+<pinref part="C64" gate="G$1" pin="2"/>
+<wire x1="-48.26" y1="-10.16" x2="-43.18" y2="-10.16" width="0.1524" layer="91"/>
+<wire x1="-15.24" y1="-2.54" x2="-48.26" y2="-2.54" width="0.1524" layer="91"/>
+<wire x1="-48.26" y1="-2.54" x2="-48.26" y2="-10.16" width="0.1524" layer="91"/>
+<junction x="-48.26" y="-10.16"/>
 </segment>
 </net>
-<net name="RAW_NOISE" class="0">
+<net name="RTC_X2" class="0">
 <segment>
-<pinref part="R5" gate="G$1" pin="1"/>
-<wire x1="-101.6" y1="21.59" x2="-96.52" y2="21.59" width="0.1524" layer="91"/>
-<pinref part="T2" gate="G$1" pin="C"/>
-<wire x1="-96.52" y1="21.59" x2="-96.52" y2="11.43" width="0.1524" layer="91"/>
-<pinref part="R2" gate="G$1" pin="2"/>
-<wire x1="-96.52" y1="21.59" x2="-96.52" y2="24.13" width="0.1524" layer="91"/>
-<label x="-82.55" y="21.59" size="1.27" layer="95" xref="yes"/>
-<junction x="-96.52" y="21.59"/>
-<wire x1="-96.52" y1="21.59" x2="-88.9" y2="21.59" width="0.1524" layer="91"/>
-<pinref part="TP2" gate="G$1" pin="TP"/>
-<wire x1="-88.9" y1="21.59" x2="-82.55" y2="21.59" width="0.1524" layer="91"/>
-<wire x1="-88.9" y1="21.59" x2="-88.9" y2="24.13" width="0.1524" layer="91"/>
-<junction x="-88.9" y="21.59"/>
+<pinref part="U6" gate="A" pin="X2"/>
+<pinref part="Q2" gate="G$1" pin="2"/>
+<pinref part="C63" gate="G$1" pin="2"/>
+<wire x1="-38.1" y1="-10.16" x2="-33.02" y2="-10.16" width="0.1524" layer="91"/>
+<wire x1="-15.24" y1="-5.08" x2="-33.02" y2="-5.08" width="0.1524" layer="91"/>
+<wire x1="-33.02" y1="-5.08" x2="-33.02" y2="-10.16" width="0.1524" layer="91"/>
+<junction x="-33.02" y="-10.16"/>
 </segment>
+</net>
+<net name="RTC_MFP" class="0">
 <segment>
-<pinref part="C2" gate="G$1" pin="1"/>
-<wire x1="-33.02" y1="20.32" x2="-39.37" y2="20.32" width="0.1524" layer="91"/>
-<label x="-39.37" y="20.32" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U6" gate="A" pin="MFP"/>
+<wire x1="15.24" y1="2.54" x2="22.86" y2="2.54" width="0.1524" layer="91"/>
+<label x="22.86" y="2.54" size="1.27" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="MINUS15V_STABLE" class="0">
+<net name="RTC_SCL" class="0">
 <segment>
-<pinref part="C3" gate="G$1" pin="1"/>
-<wire x1="-124.46" y1="-1.27" x2="-124.46" y2="-8.89" width="0.1524" layer="91"/>
-<pinref part="T2" gate="G$1" pin="E"/>
-<wire x1="-124.46" y1="-8.89" x2="-96.52" y2="-8.89" width="0.1524" layer="91"/>
-<wire x1="-96.52" y1="-8.89" x2="-96.52" y2="1.27" width="0.1524" layer="91"/>
-<wire x1="-124.46" y1="-8.89" x2="-137.16" y2="-8.89" width="0.1524" layer="91"/>
-<label x="-137.16" y="-8.89" size="1.778" layer="95" rot="R180" xref="yes"/>
-<junction x="-124.46" y="-8.89"/>
+<pinref part="U6" gate="A" pin="SCL"/>
+<wire x1="15.24" y1="0" x2="22.86" y2="0" width="0.1524" layer="91"/>
+<label x="22.86" y="0" size="1.27" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="AMP_P1" class="0">
+<net name="RTC_SDA" class="0">
 <segment>
-<pinref part="D1" gate="G$1" pin="A"/>
-<wire x1="-15.24" y1="35.56" x2="-22.86" y2="35.56" width="0.1524" layer="91"/>
-<pinref part="C2" gate="G$1" pin="2"/>
-<pinref part="R4" gate="G$1" pin="1"/>
-<wire x1="-25.4" y1="20.32" x2="-22.86" y2="20.32" width="0.1524" layer="91"/>
-<wire x1="-22.86" y1="20.32" x2="-22.86" y2="30.48" width="0.1524" layer="91"/>
-<wire x1="-22.86" y1="30.48" x2="-17.78" y2="30.48" width="0.1524" layer="91"/>
-<label x="-25.4" y="25.4" size="1.778" layer="95" rot="R90"/>
-<pinref part="T1" gate="G$1" pin="B"/>
-<wire x1="-10.16" y1="20.32" x2="-22.86" y2="20.32" width="0.1524" layer="91"/>
-<junction x="-22.86" y="20.32"/>
-<wire x1="-22.86" y1="35.56" x2="-22.86" y2="30.48" width="0.1524" layer="91"/>
-<junction x="-22.86" y="30.48"/>
+<pinref part="U6" gate="A" pin="SDA"/>
+<wire x1="15.24" y1="-2.54" x2="22.86" y2="-2.54" width="0.1524" layer="91"/>
+<label x="22.86" y="-2.54" size="1.27" layer="95" xref="yes"/>
 </segment>
 </net>
 </nets>
 </sheet>
 <sheet>
-<description>ARM Cortex-M4</description>
+<description>Pavel 1-1</description>
 <plain>
-<text x="411.48" y="160.02" size="1.778" layer="91">ST AN8844 §2.2
-One bypass capacitor for every VDD.
-Use 0.1 uF X7R 10v.</text>
-<text x="358.14" y="167.64" size="1.778" layer="91">ST AN8844 §2.2
-One 10uF bypass cap for the package.
-(two used for extra comfort)</text>
-<text x="276.86" y="210.82" size="1.778" layer="91">2*2.2uF LowESR or
-1*4.7uF LowESR
-(ST 4488 §2.2)</text>
-<text x="104.14" y="60.96" size="1.778" layer="91">2*2.2uF LowESR or
-1*4.7uF LowESR
-(ST 4488 §2.2)</text>
-<text x="279.4" y="-53.34" size="1.778" layer="91">ST 4488 §5.1
-BOOT0 to GND boots
-Main Flash Memory</text>
-<text x="355.6" y="53.34" size="1.778" layer="91">ST AN4488 §4.1.2
-suggests 25 MHz for good
-Ethernet, USB OTG and I2C</text>
-<text x="429.26" y="53.34" size="1.778" layer="91">SWD program/debug</text>
-<text x="441.96" y="12.7" size="1.778" layer="91">ST AN4488 §2.3.3
-Reset circuit not needed,
-but pull-down cap
-recommended.</text>
-<text x="276.86" y="20.32" size="1.27" layer="91">Enable internal
-power regulator</text>
-<text x="276.86" y="10.16" size="1.27" layer="91">(routed via
-bottom layer
-in case pull-up
-is needed)</text>
+<text x="-129.54" y="160.02" size="1.778" layer="91">*) Configuration Interface</text>
+<text x="-91.44" y="30.48" size="1.778" layer="91">M[2:0] == 3'b001 => Master SPI</text>
+<text x="-139.7" y="81.28" size="1.778" layer="91">*) Since VCCO is 3.3V, CFGBVS must be tied High.
+
+*) Battery is not used
+
+*) PROG_B is dedicated input -- can be driven by STM32 directly
+
+*) INIT_B is bi-directional open-drain, must be driven with MOSFET to ground</text>
+<text x="-35.56" y="50.8" size="1.778" layer="91">*) "Not DONE" LED, should be of red color</text>
 </plain>
 <instances>
-<instance part="U$1" gate="G$1" x="55.88" y="157.48"/>
-<instance part="U$1" gate="G$2" x="55.88" y="7.62"/>
-<instance part="U$1" gate="G$3" x="228.6" y="154.94"/>
-<instance part="U$1" gate="G$4" x="228.6" y="5.08"/>
-<instance part="Q1" gate="G$1" x="368.3" y="48.26"/>
-<instance part="C14" gate="G$1" x="378.46" y="38.1" smashed="yes" rot="R180">
-<attribute name="NAME" x="382.524" y="38.481" size="1.778" layer="95"/>
-<attribute name="VALUE" x="382.524" y="41.021" size="1.778" layer="96"/>
-</instance>
-<instance part="C15" gate="G$1" x="358.14" y="38.1" smashed="yes" rot="R180">
-<attribute name="NAME" x="354.076" y="40.259" size="1.778" layer="95" rot="R180"/>
-<attribute name="VALUE" x="354.076" y="42.799" size="1.778" layer="96" rot="R180"/>
-</instance>
-<instance part="SUPPLY18" gate="GND" x="358.14" y="30.48"/>
-<instance part="SUPPLY19" gate="GND" x="378.46" y="30.48"/>
-<instance part="U$2" gate="G$1" x="436.88" y="40.64" rot="R180"/>
-<instance part="SUPPLY20" gate="GND" x="226.06" y="88.9"/>
-<instance part="SUPPLY21" gate="GND" x="228.6" y="-58.42"/>
-<instance part="SUPPLY22" gate="GND" x="53.34" y="-55.88"/>
-<instance part="SUPPLY24" gate="GND" x="53.34" y="88.9"/>
-<instance part="P+5" gate="VCC" x="53.34" y="223.52"/>
-<instance part="P+6" gate="VCC" x="226.06" y="224.79"/>
-<instance part="P+8" gate="VCC" x="226.06" y="69.85"/>
-<instance part="P+9" gate="VCC" x="53.34" y="73.66"/>
-<instance part="C16" gate="G$1" x="373.38" y="144.78" smashed="yes">
-<attribute name="NAME" x="369.57" y="147.32" size="1.6764" layer="95" rot="R180"/>
-<attribute name="VALUE" x="370.84" y="152.4" size="1.6764" layer="96" rot="R180"/>
-</instance>
-<instance part="C17" gate="G$1" x="378.46" y="144.78" smashed="yes">
-<attribute name="NAME" x="382.27" y="144.78" size="1.6764" layer="95"/>
-<attribute name="VALUE" x="381" y="142.24" size="1.6764" layer="96"/>
-</instance>
-<instance part="SUPPLY25" gate="GND" x="375.92" y="134.62"/>
-<instance part="P+10" gate="VCC" x="375.92" y="158.75"/>
-<instance part="P+11" gate="VCC" x="403.86" y="161.29"/>
-<instance part="SUPPLY26" gate="GND" x="403.86" y="121.92"/>
-<instance part="C18" gate="G$1" x="449.58" y="147.32" smashed="yes">
-<attribute name="NAME" x="449.58" y="154.94" size="1.27" layer="95" font="vector"/>
-<attribute name="VALUE" x="457.2" y="149.86" size="1.27" layer="96" font="vector"/>
-</instance>
-<instance part="C19" gate="G$1" x="444.5" y="147.32" smashed="yes">
-<attribute name="NAME" x="444.5" y="154.94" size="1.27" layer="95" font="vector"/>
-</instance>
-<instance part="C20" gate="G$1" x="439.42" y="147.32" smashed="yes">
-<attribute name="NAME" x="439.42" y="154.94" size="1.27" layer="95" font="vector"/>
-</instance>
-<instance part="C21" gate="G$1" x="434.34" y="147.32" smashed="yes">
-<attribute name="NAME" x="434.34" y="154.94" size="1.27" layer="95" font="vector"/>
-</instance>
-<instance part="C22" gate="G$1" x="429.26" y="147.32" smashed="yes">
-<attribute name="NAME" x="429.26" y="154.94" size="1.27" layer="95" font="vector"/>
-</instance>
-<instance part="C23" gate="G$1" x="424.18" y="147.32" smashed="yes">
-<attribute name="NAME" x="424.18" y="154.94" size="1.27" layer="95" font="vector"/>
-</instance>
-<instance part="C24" gate="G$1" x="419.1" y="147.32" smashed="yes">
-<attribute name="NAME" x="419.1" y="154.94" size="1.27" layer="95" font="vector"/>
-</instance>
-<instance part="C25" gate="G$1" x="414.02" y="147.32" smashed="yes">
-<attribute name="NAME" x="414.02" y="154.94" size="1.27" layer="95" font="vector"/>
-</instance>
-<instance part="C26" gate="G$1" x="414.02" y="134.62" smashed="yes">
-<attribute name="NAME" x="411.48" y="129.54" size="1.27" layer="95" font="vector"/>
-</instance>
-<instance part="C27" gate="G$1" x="408.94" y="134.62" smashed="yes">
-<attribute name="NAME" x="406.4" y="129.54" size="1.27" layer="95" font="vector"/>
+<instance part="U7" gate="B0" x="-111.76" y="132.08"/>
+<instance part="SUPPLY59" gate="GND" x="-101.6" y="106.68"/>
+<instance part="R21" gate="G$1" x="-119.38" y="30.48" rot="R90">
+<attribute name="TOLERANCE" x="-119.38" y="30.48" size="1.778" layer="96" rot="R90" display="off"/>
 </instance>
-<instance part="C28" gate="G$1" x="408.94" y="147.32" smashed="yes">
-<attribute name="NAME" x="408.94" y="154.94" size="1.27" layer="95" font="vector"/>
-</instance>
-<instance part="C29" gate="G$1" x="403.86" y="147.32" smashed="yes">
-<attribute name="NAME" x="403.86" y="154.94" size="1.27" layer="95" font="vector"/>
-</instance>
-<instance part="C31" gate="G$1" x="449.58" y="134.62" smashed="yes">
-<attribute name="NAME" x="447.04" y="129.54" size="1.27" layer="95" font="vector"/>
-<attribute name="VALUE" x="454.66" y="134.62" size="1.27" layer="96" font="vector"/>
+<instance part="SUPPLY150" gate="GND" x="-119.38" y="17.78"/>
+<instance part="SUPPLY151" gate="GND" x="-99.06" y="17.78"/>
+<instance part="FRAME8" gate="G$1" x="-149.86" y="-2.54"/>
+<instance part="R23" gate="G$1" x="-99.06" y="30.48" rot="R90">
+<attribute name="TOLERANCE" x="-99.06" y="30.48" size="1.778" layer="96" rot="R90" display="off"/>
 </instance>
-<instance part="C32" gate="G$1" x="444.5" y="134.62" smashed="yes">
-<attribute name="NAME" x="441.96" y="129.54" size="1.27" layer="95" font="vector"/>
+<instance part="R24" gate="G$1" x="-78.74" y="50.8" rot="R90">
+<attribute name="TOLERANCE" x="-78.74" y="50.8" size="1.778" layer="96" rot="R90" display="off"/>
 </instance>
-<instance part="C33" gate="G$1" x="439.42" y="134.62" smashed="yes">
-<attribute name="NAME" x="436.88" y="129.54" size="1.27" layer="95" font="vector"/>
+<instance part="R25" gate="G$1" x="0" y="149.86" rot="R90">
+<attribute name="TOLERANCE" x="0" y="149.86" size="1.778" layer="96" rot="R90" display="off"/>
 </instance>
-<instance part="C34" gate="G$1" x="434.34" y="134.62" smashed="yes">
-<attribute name="NAME" x="431.8" y="129.54" size="1.27" layer="95" font="vector"/>
+<instance part="R26" gate="G$1" x="-10.16" y="149.86" rot="R90">
+<attribute name="TOLERANCE" x="-10.16" y="149.86" size="1.778" layer="96" rot="R90" display="off"/>
 </instance>
-<instance part="C35" gate="G$1" x="429.26" y="134.62" smashed="yes">
-<attribute name="NAME" x="426.72" y="129.54" size="1.27" layer="95" font="vector"/>
+<instance part="Q6" gate="G$1" x="0" y="129.54" rot="MR0"/>
+<instance part="SUPPLY161" gate="GND" x="-10.16" y="104.14"/>
+<instance part="R29" gate="G$1" x="10.16" y="116.84" rot="R90">
+<attribute name="TOLERANCE" x="10.16" y="116.84" size="1.778" layer="96" rot="R90" display="off"/>
 </instance>
-<instance part="C36" gate="G$1" x="424.18" y="134.62" smashed="yes">
-<attribute name="NAME" x="421.64" y="129.54" size="1.27" layer="95" font="vector"/>
+<instance part="SUPPLY162" gate="GND" x="10.16" y="104.14"/>
+<instance part="LED15" gate="G$1" x="-10.16" y="66.04"/>
+<instance part="R33" gate="G$1" x="-10.16" y="76.2" rot="R90">
+<attribute name="TOLERANCE" x="-10.16" y="76.2" size="1.778" layer="96" rot="R90" display="off"/>
 </instance>
-<instance part="C37" gate="G$1" x="419.1" y="134.62" smashed="yes">
-<attribute name="NAME" x="416.56" y="129.54" size="1.27" layer="95" font="vector"/>
+<instance part="R34" gate="G$1" x="2.54" y="58.42" rot="R180">
+<attribute name="TOLERANCE" x="2.54" y="58.42" size="1.778" layer="96" rot="R180" display="off"/>
 </instance>
-<instance part="P+12" gate="VCC" x="81.28" y="222.25"/>
-<instance part="C30" gate="G$1" x="96.52" y="208.28" smashed="yes">
-<attribute name="NAME" x="99.06" y="210.82" size="1.27" layer="95" font="vector"/>
-<attribute name="VALUE" x="99.06" y="208.28" size="1.27" layer="96" font="vector"/>
+</instances>
+<busses>
+</busses>
+<nets>
+<net name="GND" class="1">
+<segment>
+<pinref part="SUPPLY59" gate="GND" pin="GND"/>
+<wire x1="-101.6" y1="109.22" x2="-101.6" y2="149.86" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B0" pin="VCCBATT_0"/>
+<wire x1="-101.6" y1="149.86" x2="-106.68" y2="149.86" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="R21" gate="G$1" pin="1"/>
+<pinref part="SUPPLY150" gate="GND" pin="GND"/>
+<wire x1="-119.38" y1="25.4" x2="-119.38" y2="20.32" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<wire x1="-99.06" y1="25.4" x2="-99.06" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="SUPPLY151" gate="GND" pin="GND"/>
+<pinref part="R23" gate="G$1" pin="1"/>
+</segment>
+<segment>
+<pinref part="Q6" gate="G$1" pin="S"/>
+<pinref part="SUPPLY161" gate="GND" pin="GND"/>
+<wire x1="-5.08" y1="127" x2="-10.16" y2="127" width="0.1524" layer="91"/>
+<wire x1="-10.16" y1="127" x2="-10.16" y2="106.68" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="R29" gate="G$1" pin="1"/>
+<pinref part="SUPPLY162" gate="GND" pin="GND"/>
+<wire x1="10.16" y1="111.76" x2="10.16" y2="106.68" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FPGA_VCCO_3V3" class="0">
+<segment>
+<pinref part="U7" gate="B0" pin="VCCO_0 at 0"/>
+<wire x1="-106.68" y1="147.32" x2="-96.52" y2="147.32" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B0" pin="VCCO_0 at 1"/>
+<wire x1="-96.52" y1="147.32" x2="-76.2" y2="147.32" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="144.78" x2="-96.52" y2="144.78" width="0.1524" layer="91"/>
+<wire x1="-96.52" y1="144.78" x2="-96.52" y2="147.32" width="0.1524" layer="91"/>
+<junction x="-96.52" y="147.32"/>
+<label x="-93.98" y="147.32" size="1.778" layer="95"/>
+<pinref part="U7" gate="B0" pin="CFGBVS_0"/>
+<wire x1="-106.68" y1="142.24" x2="-96.52" y2="142.24" width="0.1524" layer="91"/>
+<wire x1="-96.52" y1="142.24" x2="-96.52" y2="144.78" width="0.1524" layer="91"/>
+<junction x="-96.52" y="144.78"/>
+</segment>
+<segment>
+<pinref part="R25" gate="G$1" pin="2"/>
+<wire x1="-10.16" y1="160.02" x2="0" y2="160.02" width="0.1524" layer="91"/>
+<wire x1="0" y1="154.94" x2="0" y2="160.02" width="0.1524" layer="91"/>
+<junction x="0" y="160.02"/>
+<pinref part="R26" gate="G$1" pin="2"/>
+<wire x1="-10.16" y1="154.94" x2="-10.16" y2="160.02" width="0.1524" layer="91"/>
+<junction x="-10.16" y="160.02"/>
+<label x="35.56" y="160.02" size="1.778" layer="95" xref="yes"/>
+<wire x1="0" y1="160.02" x2="35.56" y2="160.02" width="0.1524" layer="91"/>
+<wire x1="-10.16" y1="160.02" x2="-35.56" y2="160.02" width="0.1524" layer="91"/>
+<label x="-35.56" y="160.02" size="1.778" layer="95"/>
+</segment>
+<segment>
+<wire x1="-35.56" y1="83.82" x2="-10.16" y2="83.82" width="0.1524" layer="91"/>
+<label x="-35.56" y="83.82" size="1.778" layer="95"/>
+<pinref part="R33" gate="G$1" pin="2"/>
+<wire x1="-10.16" y1="83.82" x2="35.56" y2="83.82" width="0.1524" layer="91"/>
+<wire x1="-10.16" y1="81.28" x2="-10.16" y2="83.82" width="0.1524" layer="91"/>
+<junction x="-10.16" y="83.82"/>
+</segment>
+</net>
+<net name="FPGA_PROM_SCLK" class="0">
+<segment>
+<pinref part="U7" gate="B0" pin="CCLK_0"/>
+<wire x1="-106.68" y1="132.08" x2="-71.12" y2="132.08" width="0.1524" layer="91"/>
+<label x="-93.98" y="132.08" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_M2" class="0">
+<segment>
+<pinref part="U7" gate="B0" pin="M2_0"/>
+<wire x1="-106.68" y1="124.46" x2="-71.12" y2="124.46" width="0.1524" layer="91"/>
+<label x="-93.98" y="124.46" size="1.778" layer="95"/>
+</segment>
+<segment>
+<pinref part="R21" gate="G$1" pin="2"/>
+<wire x1="-119.38" y1="35.56" x2="-119.38" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="-119.38" y1="40.64" x2="-134.62" y2="40.64" width="0.1524" layer="91"/>
+<label x="-132.08" y="40.64" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_JTAG_TCK" class="0">
+<segment>
+<pinref part="U7" gate="B0" pin="TCK_0"/>
+<wire x1="-106.68" y1="121.92" x2="-71.12" y2="121.92" width="0.1524" layer="91"/>
+<label x="-93.98" y="121.92" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_JTAG_TDI" class="0">
+<segment>
+<pinref part="U7" gate="B0" pin="TDI_0"/>
+<wire x1="-106.68" y1="119.38" x2="-71.12" y2="119.38" width="0.1524" layer="91"/>
+<label x="-93.98" y="119.38" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_JTAG_TDO" class="0">
+<segment>
+<pinref part="U7" gate="B0" pin="TDO_0"/>
+<wire x1="-106.68" y1="116.84" x2="-71.12" y2="116.84" width="0.1524" layer="91"/>
+<label x="-93.98" y="116.84" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_JTAG_TMS" class="0">
+<segment>
+<pinref part="U7" gate="B0" pin="TMS_0"/>
+<wire x1="-106.68" y1="114.3" x2="-71.12" y2="114.3" width="0.1524" layer="91"/>
+<label x="-93.98" y="114.3" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_PROGRAM_B" class="0">
+<segment>
+<pinref part="U7" gate="B0" pin="PROGRAM_B_0"/>
+<wire x1="-106.68" y1="134.62" x2="-71.12" y2="134.62" width="0.1524" layer="91"/>
+<label x="-93.98" y="134.62" size="1.778" layer="95"/>
+</segment>
+<segment>
+<pinref part="R25" gate="G$1" pin="1"/>
+<wire x1="0" y1="144.78" x2="0" y2="139.7" width="0.1524" layer="91"/>
+<wire x1="0" y1="139.7" x2="35.56" y2="139.7" width="0.1524" layer="91"/>
+<label x="35.56" y="139.7" size="1.778" layer="95" xref="yes"/>
+</segment>
+</net>
+<net name="FPGA_DONE_INT" class="0">
+<segment>
+<pinref part="U7" gate="B0" pin="DONE_0"/>
+<wire x1="-106.68" y1="139.7" x2="-71.12" y2="139.7" width="0.1524" layer="91"/>
+<label x="-93.98" y="139.7" size="1.778" layer="95"/>
+</segment>
+<segment>
+<pinref part="LED15" gate="G$1" pin="C"/>
+<wire x1="-10.16" y1="60.96" x2="-10.16" y2="58.42" width="0.1524" layer="91"/>
+<wire x1="-10.16" y1="58.42" x2="-35.56" y2="58.42" width="0.1524" layer="91"/>
+<pinref part="R34" gate="G$1" pin="2"/>
+<wire x1="-10.16" y1="58.42" x2="-2.54" y2="58.42" width="0.1524" layer="91"/>
+<junction x="-10.16" y="58.42"/>
+<label x="-35.56" y="58.42" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_M0" class="0">
+<segment>
+<pinref part="U7" gate="B0" pin="M0_0"/>
+<wire x1="-106.68" y1="129.54" x2="-71.12" y2="129.54" width="0.1524" layer="91"/>
+<label x="-93.98" y="129.54" size="1.778" layer="95"/>
+</segment>
+<segment>
+<wire x1="-93.98" y1="40.64" x2="-78.74" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="-78.74" y1="40.64" x2="-78.74" y2="45.72" width="0.1524" layer="91"/>
+<label x="-91.44" y="40.64" size="1.778" layer="95"/>
+<pinref part="R24" gate="G$1" pin="1"/>
+</segment>
+</net>
+<net name="FPGA_M1" class="0">
+<segment>
+<pinref part="U7" gate="B0" pin="M1_0"/>
+<wire x1="-106.68" y1="127" x2="-71.12" y2="127" width="0.1524" layer="91"/>
+<label x="-93.98" y="127" size="1.778" layer="95"/>
+</segment>
+<segment>
+<wire x1="-114.3" y1="40.64" x2="-99.06" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="-99.06" y1="40.64" x2="-99.06" y2="35.56" width="0.1524" layer="91"/>
+<label x="-101.6" y="43.18" size="1.778" layer="95" rot="R180"/>
+<pinref part="R23" gate="G$1" pin="2"/>
+</segment>
+</net>
+<net name="VPGA_VCCO_3V3" class="0">
+<segment>
+<wire x1="-78.74" y1="55.88" x2="-78.74" y2="60.96" width="0.1524" layer="91"/>
+<wire x1="-78.74" y1="60.96" x2="-93.98" y2="60.96" width="0.1524" layer="91"/>
+<label x="-96.52" y="60.96" size="1.778" layer="95"/>
+<pinref part="R24" gate="G$1" pin="2"/>
+</segment>
+</net>
+<net name="FPGA_INIT_B_INT" class="0">
+<segment>
+<pinref part="U7" gate="B0" pin="INIT_B_0"/>
+<wire x1="-106.68" y1="137.16" x2="-71.12" y2="137.16" width="0.1524" layer="91"/>
+<label x="-93.98" y="137.16" size="1.778" layer="95"/>
+</segment>
+<segment>
+<pinref part="R26" gate="G$1" pin="1"/>
+<wire x1="-10.16" y1="144.78" x2="-10.16" y2="132.08" width="0.1524" layer="91"/>
+<wire x1="-10.16" y1="132.08" x2="-35.56" y2="132.08" width="0.1524" layer="91"/>
+<pinref part="Q6" gate="G$1" pin="D"/>
+<wire x1="-5.08" y1="132.08" x2="-10.16" y2="132.08" width="0.1524" layer="91"/>
+<junction x="-10.16" y="132.08"/>
+<label x="-35.56" y="132.08" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_INIT_B" class="0">
+<segment>
+<label x="35.56" y="127" size="1.778" layer="95" xref="yes"/>
+<pinref part="Q6" gate="G$1" pin="G"/>
+<wire x1="5.08" y1="127" x2="10.16" y2="127" width="0.1524" layer="91"/>
+<pinref part="R29" gate="G$1" pin="2"/>
+<wire x1="10.16" y1="127" x2="10.16" y2="121.92" width="0.1524" layer="91"/>
+<junction x="10.16" y="127"/>
+<wire x1="10.16" y1="127" x2="35.56" y2="127" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$34" class="0">
+<segment>
+<pinref part="R33" gate="G$1" pin="1"/>
+<pinref part="LED15" gate="G$1" pin="A"/>
+<wire x1="-10.16" y1="71.12" x2="-10.16" y2="68.58" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FPGA_DONE" class="0">
+<segment>
+<pinref part="R34" gate="G$1" pin="1"/>
+<wire x1="7.62" y1="58.42" x2="35.56" y2="58.42" width="0.1524" layer="91"/>
+<label x="35.56" y="58.42" size="1.778" layer="95" xref="yes"/>
+</segment>
+</net>
+</nets>
+</sheet>
+<sheet>
+<description>Pavel 1-2</description>
+<plain>
+<text x="22.86" y="78.74" size="1.778" layer="91">*) Temperature Sensor [NOT USED]</text>
+<text x="-35.56" y="78.74" size="1.778" layer="91">*) XADC [NOT USED]</text>
+<text x="-139.7" y="81.28" size="1.778" layer="91">*) Transceivers [NOT USED]</text>
+</plain>
+<instances>
+<instance part="U7" gate="B216" x="-119.38" y="-12.7"/>
+<instance part="U7" gate="BMGTAVCC" x="-119.38" y="60.96"/>
+<instance part="U7" gate="BMGTAVTT" x="-119.38" y="35.56"/>
+<instance part="U7" gate="BTDIODE" x="43.18" y="68.58"/>
+<instance part="U7" gate="BXADC" x="-33.02" y="63.5"/>
+<instance part="SUPPLY60" gate="GND" x="53.34" y="58.42"/>
+<instance part="SUPPLY61" gate="GND" x="-22.86" y="48.26"/>
+<instance part="SUPPLY62" gate="GND" x="-12.7" y="48.26"/>
+<instance part="FRAME9" gate="G$1" x="-160.02" y="-81.28"/>
+<instance part="C70" gate="G$1" x="-12.7" y="60.96">
+<attribute name="DIELECTRIC" x="-12.7" y="60.96" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-12.7" y="60.96" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-12.7" y="60.96" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="SUPPLY27" gate="GND" x="96.52" y="200.66"/>
-<instance part="P+13" gate="VCC" x="274.32" y="219.71"/>
-<instance part="C38" gate="G$1" x="274.32" y="205.74" smashed="yes">
-<attribute name="NAME" x="276.86" y="208.28" size="1.27" layer="95" font="vector"/>
-<attribute name="VALUE" x="276.86" y="205.74" size="1.27" layer="96" font="vector"/>
+</instances>
+<busses>
+</busses>
+<nets>
+<net name="GND" class="1">
+<segment>
+<pinref part="U7" gate="BXADC" pin="GNDADC_0"/>
+<wire x1="-27.94" y1="55.88" x2="-22.86" y2="55.88" width="0.1524" layer="91"/>
+<pinref part="SUPPLY61" gate="GND" pin="GND"/>
+<wire x1="-22.86" y1="55.88" x2="-22.86" y2="50.8" width="0.1524" layer="91"/>
+<pinref part="U7" gate="BXADC" pin="VREFN_0"/>
+<wire x1="-27.94" y1="58.42" x2="-22.86" y2="58.42" width="0.1524" layer="91"/>
+<wire x1="-22.86" y1="58.42" x2="-22.86" y2="55.88" width="0.1524" layer="91"/>
+<junction x="-22.86" y="55.88"/>
+<pinref part="U7" gate="BXADC" pin="VREFP_0"/>
+<wire x1="-27.94" y1="60.96" x2="-22.86" y2="60.96" width="0.1524" layer="91"/>
+<wire x1="-22.86" y1="60.96" x2="-22.86" y2="58.42" width="0.1524" layer="91"/>
+<junction x="-22.86" y="58.42"/>
+</segment>
+<segment>
+<pinref part="SUPPLY62" gate="GND" pin="GND"/>
+<wire x1="-12.7" y1="55.88" x2="-12.7" y2="50.8" width="0.1524" layer="91"/>
+<pinref part="C70" gate="G$1" pin="2"/>
+</segment>
+<segment>
+<pinref part="U7" gate="BTDIODE" pin="DXN_0"/>
+<wire x1="48.26" y1="66.04" x2="53.34" y2="66.04" width="0.1524" layer="91"/>
+<pinref part="SUPPLY60" gate="GND" pin="GND"/>
+<wire x1="53.34" y1="66.04" x2="53.34" y2="60.96" width="0.1524" layer="91"/>
+<pinref part="U7" gate="BTDIODE" pin="DXP_0"/>
+<wire x1="48.26" y1="68.58" x2="53.34" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="53.34" y1="68.58" x2="53.34" y2="66.04" width="0.1524" layer="91"/>
+<junction x="53.34" y="66.04"/>
+</segment>
+</net>
+<net name="FPGA_VCCAUX_1V8" class="0">
+<segment>
+<pinref part="U7" gate="BXADC" pin="VCCADC_0"/>
+<wire x1="-27.94" y1="68.58" x2="-12.7" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="-12.7" y1="68.58" x2="-12.7" y2="63.5" width="0.1524" layer="91"/>
+<wire x1="-12.7" y1="68.58" x2="-2.54" y2="68.58" width="0.1524" layer="91"/>
+<junction x="-12.7" y="68.58"/>
+<label x="-22.86" y="68.58" size="1.778" layer="95"/>
+<pinref part="C70" gate="G$1" pin="1"/>
+</segment>
+</net>
+</nets>
+</sheet>
+<sheet>
+<description>Pavel 1-3</description>
+<plain>
+<text x="-20.32" y="50.8" size="1.778" layer="91">*) HOLD feature not used
+
+*) PROM is write-protected by default, to disable
+write protection (such as during firmware update),
+jumper must be inserted</text>
+</plain>
+<instances>
+<instance part="IC3" gate="A" x="-50.8" y="36.83"/>
+<instance part="SUPPLY147" gate="GND" x="-73.66" y="15.24"/>
+<instance part="R9" gate="G$1" x="-73.66" y="53.34" rot="R90">
+<attribute name="TOLERANCE" x="-73.66" y="53.34" size="1.778" layer="96" rot="R90" display="off"/>
 </instance>
-<instance part="P+14" gate="VCC" x="101.6" y="74.93"/>
-<instance part="C39" gate="G$1" x="101.6" y="60.96" smashed="yes">
-<attribute name="NAME" x="104.14" y="58.42" size="1.27" layer="95" font="vector"/>
-<attribute name="VALUE" x="104.14" y="55.88" size="1.27" layer="96" font="vector"/>
+<instance part="JP7" gate="A" x="-83.82" y="53.34"/>
+<instance part="R20" gate="G$1" x="-83.82" y="27.94" rot="R90">
+<attribute name="TOLERANCE" x="-83.82" y="27.94" size="1.778" layer="96" rot="R90" display="off"/>
 </instance>
-<instance part="P+15" gate="VCC" x="104.14" y="166.37"/>
-<instance part="SUPPLY28" gate="GND" x="274.32" y="-58.42"/>
-<instance part="R10" gate="G$1" x="274.32" y="-48.26" rot="R90"/>
-<instance part="C40" gate="G$1" x="436.88" y="22.86" smashed="yes"/>
-<instance part="SUPPLY29" gate="GND" x="436.88" y="15.24"/>
-<instance part="R12" gate="G$1" x="365.76" y="33.02" rot="R90"/>
-<instance part="SUPPLY42" gate="GND" x="421.64" y="15.24"/>
-<instance part="P+16" gate="VCC" x="421.64" y="52.07"/>
-<instance part="FRAME3" gate="G$1" x="-53.34" y="-116.84"/>
-<instance part="FRAME3" gate="G$2" x="398.78" y="-116.84"/>
-<instance part="P+17" gate="VCC" x="274.32" y="22.86"/>
-<instance part="C56" gate="G$1" x="96.52" y="60.96" smashed="yes">
-<attribute name="NAME" x="93.98" y="63.5" size="1.27" layer="95" font="vector" rot="R90"/>
-<attribute name="VALUE" x="91.44" y="60.96" size="1.27" layer="96" font="vector" rot="R90"/>
+<instance part="SUPPLY148" gate="GND" x="-83.82" y="15.24"/>
+<instance part="SUPPLY149" gate="GND" x="0" y="15.24"/>
+<instance part="FRAME10" gate="G$1" x="-129.54" y="-91.44"/>
+<instance part="Q5" gate="G$1" x="-45.72" y="-33.02"/>
+<instance part="C110" gate="G$1" x="-76.2" y="-35.56">
+<attribute name="DIELECTRIC" x="-76.2" y="-35.56" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-76.2" y="-35.56" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-76.2" y="-35.56" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="C57" gate="G$1" x="269.24" y="205.74" smashed="yes">
-<attribute name="NAME" x="266.7" y="208.28" size="1.27" layer="95" font="vector" rot="R90"/>
-<attribute name="VALUE" x="264.16" y="208.28" size="1.27" layer="96" font="vector" rot="R90"/>
+<instance part="SUPPLY159" gate="GND" x="-60.96" y="-48.26"/>
+<instance part="SUPPLY160" gate="GND" x="-76.2" y="-48.26"/>
+<instance part="R28" gate="G$1" x="-45.72" y="-17.78" rot="R180"/>
+<instance part="SV3" gate="1" x="99.06" y="12.7" rot="R180"/>
+<instance part="SUPPLY163" gate="GND" x="86.36" y="-5.08"/>
+<instance part="R35" gate="G$1" x="63.5" y="55.88" rot="R90">
+<attribute name="TOLERANCE" x="63.5" y="55.88" size="1.778" layer="96" rot="R90" display="off"/>
 </instance>
-<instance part="LED5" gate="G$1" x="434.34" y="-20.32" smashed="yes" rot="R90">
-<attribute name="VALUE" x="438.912" y="-14.605" size="1.778" layer="96" rot="R180"/>
+<instance part="R36" gate="G$1" x="73.66" y="55.88" rot="R90">
+<attribute name="TOLERANCE" x="73.66" y="55.88" size="1.778" layer="96" rot="R90" display="off"/>
 </instance>
-<instance part="LED6" gate="G$1" x="429.26" y="-22.86" smashed="yes" rot="R90">
-<attribute name="VALUE" x="433.832" y="-17.145" size="1.778" layer="96" rot="R180"/>
+<instance part="R37" gate="G$1" x="83.82" y="55.88" rot="R90">
+<attribute name="TOLERANCE" x="83.82" y="55.88" size="1.778" layer="96" rot="R90" display="off"/>
 </instance>
-<instance part="LED7" gate="G$1" x="434.34" y="-25.4" smashed="yes" rot="R90">
-<attribute name="VALUE" x="438.912" y="-19.685" size="1.778" layer="96" rot="R180"/>
+<instance part="SUPPLY164" gate="GND" x="60.96" y="-5.08"/>
+<instance part="C133" gate="G$1" x="60.96" y="10.16">
+<attribute name="DIELECTRIC" x="60.96" y="10.16" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="60.96" y="10.16" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="60.96" y="10.16" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="LED8" gate="G$1" x="429.26" y="-27.94" smashed="yes" rot="R90">
-<attribute name="VALUE" x="433.832" y="-22.225" size="1.778" layer="96" rot="R180"/>
+<instance part="C134" gate="G$1" x="0" y="30.48">
+<attribute name="DIELECTRIC" x="0" y="30.48" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="0" y="30.48" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="0" y="30.48" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="R8" gate="A" x="414.02" y="-27.94" rot="R180"/>
-<instance part="SUPPLY43" gate="GND" x="447.04" y="-27.94" rot="R90"/>
 </instances>
 <busses>
-<bus name="FMC_D[0..31],FMC_A[0..19],FMC_NE1,FMC_NOE,FMC_NWE,FMC_NL,FMC_NWAIT">
+</busses>
+<nets>
+<net name="GND" class="1">
 <segment>
-<wire x1="165.1" y1="45.72" x2="165.1" y2="-35.56" width="0.762" layer="92"/>
+<pinref part="SUPPLY147" gate="GND" pin="GND"/>
+<wire x1="-73.66" y1="17.78" x2="-73.66" y2="35.56" width="0.1524" layer="91"/>
+<pinref part="IC3" gate="A" pin="VSS"/>
+<wire x1="-73.66" y1="35.56" x2="-68.58" y2="35.56" width="0.1524" layer="91"/>
 </segment>
 <segment>
-<wire x1="165.1" y1="195.58" x2="165.1" y2="114.3" width="0.762" layer="92"/>
+<pinref part="SUPPLY148" gate="GND" pin="GND"/>
+<pinref part="R20" gate="G$1" pin="1"/>
+<wire x1="-83.82" y1="17.78" x2="-83.82" y2="22.86" width="0.1524" layer="91"/>
 </segment>
 <segment>
-<wire x1="294.64" y1="195.58" x2="294.64" y2="114.3" width="0.762" layer="92"/>
-<label x="299.72" y="205.74" size="1.778" layer="95" rot="R270"/>
+<pinref part="SUPPLY149" gate="GND" pin="GND"/>
+<wire x1="0" y1="17.78" x2="0" y2="25.4" width="0.1524" layer="91"/>
+<pinref part="C134" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<wire x1="294.64" y1="43.18" x2="294.64" y2="-38.1" width="0.762" layer="92"/>
-<label x="299.72" y="55.88" size="1.778" layer="95" rot="R270"/>
+<pinref part="SUPPLY159" gate="GND" pin="GND"/>
+<wire x1="-60.96" y1="-45.72" x2="-60.96" y2="-38.1" width="0.1524" layer="91"/>
+<pinref part="Q5" gate="G$1" pin="GND"/>
+<wire x1="-60.96" y1="-38.1" x2="-58.42" y2="-38.1" width="0.1524" layer="91"/>
 </segment>
 <segment>
-<wire x1="-7.62" y1="185.42" x2="-7.62" y2="121.92" width="0.762" layer="92"/>
-<label x="-12.7" y="210.82" size="1.778" layer="95" rot="R270"/>
+<pinref part="C110" gate="G$1" pin="2"/>
+<pinref part="SUPPLY160" gate="GND" pin="GND"/>
+<wire x1="-76.2" y1="-40.64" x2="-76.2" y2="-45.72" width="0.1524" layer="91"/>
 </segment>
 <segment>
-<wire x1="119.38" y1="185.42" x2="119.38" y2="121.92" width="0.762" layer="92"/>
+<pinref part="SUPPLY163" gate="GND" pin="GND"/>
+<wire x1="86.36" y1="-2.54" x2="86.36" y2="2.54" width="0.1524" layer="91"/>
+<pinref part="SV3" gate="1" pin="8"/>
+<wire x1="86.36" y1="2.54" x2="91.44" y2="2.54" width="0.1524" layer="91"/>
+<pinref part="SV3" gate="1" pin="7"/>
+<wire x1="91.44" y1="5.08" x2="86.36" y2="5.08" width="0.1524" layer="91"/>
+<wire x1="86.36" y1="5.08" x2="86.36" y2="2.54" width="0.1524" layer="91"/>
+<junction x="86.36" y="2.54"/>
+<pinref part="SV3" gate="1" pin="6"/>
+<wire x1="91.44" y1="7.62" x2="86.36" y2="7.62" width="0.1524" layer="91"/>
+<wire x1="86.36" y1="7.62" x2="86.36" y2="5.08" width="0.1524" layer="91"/>
+<junction x="86.36" y="5.08"/>
 </segment>
 <segment>
-<wire x1="116.84" y1="45.72" x2="116.84" y2="-35.56" width="0.762" layer="92"/>
+<pinref part="SUPPLY164" gate="GND" pin="GND"/>
+<wire x1="60.96" y1="-2.54" x2="60.96" y2="5.08" width="0.1524" layer="91"/>
+<pinref part="C133" gate="G$1" pin="2"/>
+</segment>
+</net>
+<net name="FPGA_VCCO_3V3" class="0">
+<segment>
+<pinref part="R9" gate="G$1" pin="2"/>
+<wire x1="-73.66" y1="58.42" x2="-73.66" y2="63.5" width="0.1524" layer="91"/>
+<wire x1="-73.66" y1="63.5" x2="-83.82" y2="63.5" width="0.1524" layer="91"/>
+<label x="-96.52" y="63.5" size="1.778" layer="95"/>
+<pinref part="IC3" gate="A" pin="VCC"/>
+<wire x1="-83.82" y1="63.5" x2="-99.06" y2="63.5" width="0.1524" layer="91"/>
+<wire x1="-31.75" y1="43.18" x2="-25.4" y2="43.18" width="0.1524" layer="91"/>
+<wire x1="-25.4" y1="43.18" x2="-25.4" y2="63.5" width="0.1524" layer="91"/>
+<wire x1="-25.4" y1="63.5" x2="-73.66" y2="63.5" width="0.1524" layer="91"/>
+<junction x="-73.66" y="63.5"/>
+<pinref part="IC3" gate="A" pin="!HOLD!/DQ3"/>
+<wire x1="-31.75" y1="40.64" x2="-25.4" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="-25.4" y1="40.64" x2="-25.4" y2="43.18" width="0.1524" layer="91"/>
+<junction x="-25.4" y="43.18"/>
+<pinref part="JP7" gate="A" pin="2"/>
+<wire x1="-83.82" y1="60.96" x2="-83.82" y2="63.5" width="0.1524" layer="91"/>
+<junction x="-83.82" y="63.5"/>
+<wire x1="0" y1="40.64" x2="0" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="-25.4" y1="40.64" x2="0" y2="40.64" width="0.1524" layer="91"/>
+<junction x="-25.4" y="40.64"/>
+<pinref part="C134" gate="G$1" pin="1"/>
+</segment>
+<segment>
+<pinref part="C110" gate="G$1" pin="1"/>
+<wire x1="-76.2" y1="-33.02" x2="-76.2" y2="-27.94" width="0.1524" layer="91"/>
+<pinref part="Q5" gate="G$1" pin="VCC"/>
+<wire x1="-76.2" y1="-27.94" x2="-60.96" y2="-27.94" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-27.94" x2="-58.42" y2="-27.94" width="0.1524" layer="91"/>
+<wire x1="-76.2" y1="-27.94" x2="-81.28" y2="-27.94" width="0.1524" layer="91"/>
+<junction x="-76.2" y="-27.94"/>
+<label x="-81.28" y="-27.94" size="1.778" layer="95"/>
+<pinref part="R28" gate="G$1" pin="2"/>
+<wire x1="-50.8" y1="-17.78" x2="-60.96" y2="-17.78" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-17.78" x2="-60.96" y2="-27.94" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-27.94"/>
+</segment>
+<segment>
+<pinref part="SV3" gate="1" pin="1"/>
+<wire x1="91.44" y1="20.32" x2="60.96" y2="20.32" width="0.1524" layer="91"/>
+<wire x1="60.96" y1="20.32" x2="55.88" y2="20.32" width="0.1524" layer="91"/>
+<wire x1="60.96" y1="12.7" x2="60.96" y2="20.32" width="0.1524" layer="91"/>
+<junction x="60.96" y="20.32"/>
+<label x="55.88" y="20.32" size="1.778" layer="95"/>
+<pinref part="C133" gate="G$1" pin="1"/>
+</segment>
+<segment>
+<pinref part="R35" gate="G$1" pin="2"/>
+<wire x1="63.5" y1="60.96" x2="63.5" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="63.5" y1="66.04" x2="73.66" y2="66.04" width="0.1524" layer="91"/>
+<pinref part="R37" gate="G$1" pin="2"/>
+<wire x1="73.66" y1="66.04" x2="83.82" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="83.82" y1="66.04" x2="83.82" y2="60.96" width="0.1524" layer="91"/>
+<junction x="83.82" y="66.04"/>
+<wire x1="83.82" y1="66.04" x2="109.22" y2="66.04" width="0.1524" layer="91"/>
+<label x="86.36" y="66.04" size="1.778" layer="95"/>
+<pinref part="R36" gate="G$1" pin="2"/>
+<wire x1="73.66" y1="60.96" x2="73.66" y2="66.04" width="0.1524" layer="91"/>
+<junction x="73.66" y="66.04"/>
 </segment>
+</net>
+<net name="FPGA_PROM_SCLK" class="0">
 <segment>
-<wire x1="-7.62" y1="45.72" x2="-7.62" y2="-35.56" width="0.762" layer="92"/>
-<label x="-12.7" y="55.88" size="1.778" layer="95" rot="R270"/>
+<pinref part="IC3" gate="A" pin="C"/>
+<wire x1="-31.75" y1="38.1" x2="-10.16" y2="38.1" width="0.1524" layer="91"/>
+<label x="-30.48" y="38.1" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_PROM_MOSI" class="0">
+<segment>
+<pinref part="IC3" gate="A" pin="DQ0"/>
+<wire x1="-31.75" y1="35.56" x2="-10.16" y2="35.56" width="0.1524" layer="91"/>
+<label x="-30.48" y="35.56" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_PROM_CS_N" class="0">
+<segment>
+<pinref part="IC3" gate="A" pin="!S"/>
+<wire x1="-68.58" y1="43.18" x2="-73.66" y2="43.18" width="0.1524" layer="91"/>
+<label x="-109.22" y="43.18" size="1.778" layer="95"/>
+<pinref part="R9" gate="G$1" pin="1"/>
+<wire x1="-73.66" y1="43.18" x2="-109.22" y2="43.18" width="0.1524" layer="91"/>
+<wire x1="-73.66" y1="43.18" x2="-73.66" y2="48.26" width="0.1524" layer="91"/>
+<junction x="-73.66" y="43.18"/>
+</segment>
+</net>
+<net name="FPGA_PROM_MISO" class="0">
+<segment>
+<pinref part="IC3" gate="A" pin="DQ1"/>
+<wire x1="-68.58" y1="40.64" x2="-109.22" y2="40.64" width="0.1524" layer="91"/>
+<label x="-109.22" y="40.64" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_PROM_W_N" class="0">
+<segment>
+<pinref part="IC3" gate="A" pin="!W!/VPP/DQ2"/>
+<wire x1="-68.58" y1="38.1" x2="-83.82" y2="38.1" width="0.1524" layer="91"/>
+<label x="-109.22" y="38.1" size="1.778" layer="95"/>
+<pinref part="R20" gate="G$1" pin="2"/>
+<wire x1="-83.82" y1="38.1" x2="-109.22" y2="38.1" width="0.1524" layer="91"/>
+<wire x1="-83.82" y1="33.02" x2="-83.82" y2="38.1" width="0.1524" layer="91"/>
+<junction x="-83.82" y="38.1"/>
+<pinref part="JP7" gate="A" pin="1"/>
+<wire x1="-83.82" y1="45.72" x2="-83.82" y2="38.1" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="FPGA_GCLK" class="0">
+<segment>
+<wire x1="-33.02" y1="-33.02" x2="-2.54" y2="-33.02" width="0.1524" layer="91"/>
+<label x="-30.48" y="-33.02" size="1.778" layer="95"/>
+<pinref part="Q5" gate="G$1" pin="FO"/>
+</segment>
+</net>
+<net name="FPGA_JTAG_TCK" class="0">
+<segment>
+<pinref part="SV3" gate="1" pin="2"/>
+<wire x1="91.44" y1="17.78" x2="71.12" y2="17.78" width="0.1524" layer="91"/>
+<label x="71.12" y="17.78" size="1.778" layer="95"/>
+</segment>
+<segment>
+<pinref part="R37" gate="G$1" pin="1"/>
+<wire x1="83.82" y1="50.8" x2="83.82" y2="45.72" width="0.1524" layer="91"/>
+<wire x1="83.82" y1="45.72" x2="109.22" y2="45.72" width="0.1524" layer="91"/>
+<label x="88.9" y="45.72" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_JTAG_TDI" class="0">
+<segment>
+<pinref part="SV3" gate="1" pin="4"/>
+<wire x1="91.44" y1="12.7" x2="71.12" y2="12.7" width="0.1524" layer="91"/>
+<label x="71.12" y="12.7" size="1.778" layer="95"/>
+</segment>
+<segment>
+<pinref part="R35" gate="G$1" pin="1"/>
+<wire x1="63.5" y1="50.8" x2="63.5" y2="35.56" width="0.1524" layer="91"/>
+<wire x1="63.5" y1="35.56" x2="109.22" y2="35.56" width="0.1524" layer="91"/>
+<label x="88.9" y="35.56" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_JTAG_TDO" class="0">
+<segment>
+<pinref part="SV3" gate="1" pin="5"/>
+<wire x1="91.44" y1="10.16" x2="71.12" y2="10.16" width="0.1524" layer="91"/>
+<label x="71.12" y="10.16" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_JTAG_TMS" class="0">
+<segment>
+<pinref part="SV3" gate="1" pin="3"/>
+<wire x1="91.44" y1="15.24" x2="71.12" y2="15.24" width="0.1524" layer="91"/>
+<label x="71.12" y="15.24" size="1.778" layer="95"/>
+</segment>
+<segment>
+<pinref part="R36" gate="G$1" pin="1"/>
+<wire x1="73.66" y1="50.8" x2="73.66" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="73.66" y1="40.64" x2="109.22" y2="40.64" width="0.1524" layer="91"/>
+<label x="88.9" y="40.64" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="N$33" class="0">
+<segment>
+<pinref part="Q5" gate="G$1" pin="OE"/>
+<wire x1="-33.02" y1="-27.94" x2="-30.48" y2="-27.94" width="0.1524" layer="91"/>
+<wire x1="-30.48" y1="-27.94" x2="-30.48" y2="-17.78" width="0.1524" layer="91"/>
+<pinref part="R28" gate="G$1" pin="1"/>
+<wire x1="-30.48" y1="-17.78" x2="-40.64" y2="-17.78" width="0.1524" layer="91"/>
+</segment>
+</net>
+</nets>
+</sheet>
+<sheet>
+<description>Pavel 2-1</description>
+<plain>
+<text x="-119.38" y="83.82" size="1.778" layer="91">*) Middle Right Bank</text>
+<text x="-35.56" y="86.36" size="1.778" layer="91">*) Upper Left Bank</text>
+<text x="-96.52" y="66.04" size="1.778" layer="91">*) Completely unused banks
+still must be powered</text>
+<text x="-7.62" y="68.58" size="1.778" layer="91">*) Completely unused banks
+still must be powered</text>
+</plain>
+<instances>
+<instance part="U7" gate="B15" x="-109.22" y="5.08"/>
+<instance part="U7" gate="B35" x="-20.32" y="7.62"/>
+<instance part="FRAME13" gate="G$1" x="-147.32" y="-81.28"/>
+</instances>
+<busses>
+</busses>
+<nets>
+<net name="FPGA_VCCO_3V3" class="0">
+<segment>
+<wire x1="-104.14" y1="73.66" x2="-99.06" y2="73.66" width="0.1524" layer="91"/>
+<wire x1="-99.06" y1="73.66" x2="-99.06" y2="71.12" width="0.1524" layer="91"/>
+<wire x1="-99.06" y1="71.12" x2="-99.06" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="-99.06" y1="68.58" x2="-99.06" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="-104.14" y1="66.04" x2="-99.06" y2="66.04" width="0.1524" layer="91"/>
+<junction x="-99.06" y="66.04"/>
+<wire x1="-104.14" y1="68.58" x2="-99.06" y2="68.58" width="0.1524" layer="91"/>
+<junction x="-99.06" y="68.58"/>
+<wire x1="-104.14" y1="71.12" x2="-99.06" y2="71.12" width="0.1524" layer="91"/>
+<junction x="-99.06" y="71.12"/>
+<junction x="-99.06" y="73.66"/>
+<wire x1="-99.06" y1="73.66" x2="-73.66" y2="73.66" width="0.1524" layer="91"/>
+<label x="-96.52" y="73.66" size="1.778" layer="95"/>
+<pinref part="U7" gate="B15" pin="VCCO_15 at 5"/>
+<wire x1="-104.14" y1="60.96" x2="-99.06" y2="60.96" width="0.1524" layer="91"/>
+<wire x1="-99.06" y1="60.96" x2="-99.06" y2="63.5" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B15" pin="VCCO_15 at 4"/>
+<wire x1="-99.06" y1="63.5" x2="-99.06" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="-104.14" y1="63.5" x2="-99.06" y2="63.5" width="0.1524" layer="91"/>
+<junction x="-99.06" y="63.5"/>
+<pinref part="U7" gate="B15" pin="VCCO_15 at 0"/>
+<pinref part="U7" gate="B15" pin="VCCO_15 at 1"/>
+<pinref part="U7" gate="B15" pin="VCCO_15 at 2"/>
+<pinref part="U7" gate="B15" pin="VCCO_15 at 3"/>
+</segment>
+<segment>
+<wire x1="-15.24" y1="76.2" x2="-10.16" y2="76.2" width="0.1524" layer="91"/>
+<wire x1="-10.16" y1="76.2" x2="-10.16" y2="73.66" width="0.1524" layer="91"/>
+<wire x1="-10.16" y1="73.66" x2="-10.16" y2="71.12" width="0.1524" layer="91"/>
+<wire x1="-10.16" y1="71.12" x2="-10.16" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="-15.24" y1="68.58" x2="-10.16" y2="68.58" width="0.1524" layer="91"/>
+<junction x="-10.16" y="68.58"/>
+<wire x1="-15.24" y1="71.12" x2="-10.16" y2="71.12" width="0.1524" layer="91"/>
+<junction x="-10.16" y="71.12"/>
+<wire x1="-15.24" y1="73.66" x2="-10.16" y2="73.66" width="0.1524" layer="91"/>
+<junction x="-10.16" y="73.66"/>
+<junction x="-10.16" y="76.2"/>
+<wire x1="-10.16" y1="76.2" x2="15.24" y2="76.2" width="0.1524" layer="91"/>
+<label x="-7.62" y="76.2" size="1.778" layer="95"/>
+<wire x1="-15.24" y1="63.5" x2="-10.16" y2="63.5" width="0.1524" layer="91"/>
+<wire x1="-10.16" y1="63.5" x2="-10.16" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="-10.16" y1="66.04" x2="-10.16" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="-15.24" y1="66.04" x2="-10.16" y2="66.04" width="0.1524" layer="91"/>
+<junction x="-10.16" y="66.04"/>
+<pinref part="U7" gate="B35" pin="VCCO_35 at 0"/>
+<pinref part="U7" gate="B35" pin="VCCO_35 at 1"/>
+<pinref part="U7" gate="B35" pin="VCCO_35 at 2"/>
+<pinref part="U7" gate="B35" pin="VCCO_35 at 3"/>
+<pinref part="U7" gate="B35" pin="VCCO_35 at 4"/>
+<pinref part="U7" gate="B35" pin="VCCO_35 at 5"/>
+</segment>
+</net>
+</nets>
+</sheet>
+<sheet>
+<description>Pavel 2-2</description>
+<plain>
+<text x="30.48" y="63.5" size="1.778" layer="91">*) Bottom Bank</text>
+<text x="-106.68" y="73.66" size="1.778" layer="91">*) Lower Left Bank</text>
+<text x="81.28" y="38.1" size="1.778" layer="91"><-- FMC_A[...] signals can be swapped</text>
+<text x="81.28" y="-30.48" size="1.778" layer="91"><-- FMC_CLK signal _MUST_ go
+into either W11 or V13 (i.e. into
+one of the two positive (master)
+sides of the two available
+MRCC differential pairs)</text>
+<text x="-53.34" y="45.72" size="1.778" layer="91"><-- FMC_D[...] signals can be swapped</text>
+<text x="-38.1" y="-35.56" size="1.778" layer="91"><-- FMC_* control signals can be swapped</text>
+</plain>
+<instances>
+<instance part="U7" gate="B13" x="43.18" y="2.54"/>
+<instance part="U7" gate="B34" x="-91.44" y="-7.62"/>
+<instance part="FRAME12" gate="G$1" x="-124.46" y="-93.98"/>
+</instances>
+<busses>
+<bus name="FPGA_FMC_A[0..25]">
+<segment>
+<wire x1="78.74" y1="43.18" x2="93.98" y2="43.18" width="0.762" layer="92"/>
+<wire x1="78.74" y1="43.18" x2="78.74" y2="-27.94" width="0.762" layer="92"/>
+<label x="78.74" y="43.18" size="1.778" layer="95"/>
 </segment>
 </bus>
-<bus name="FMC_A[20..21],DIGITIZED">
+<bus name="FPGA_FMC_D[0..31]">
 <segment>
-<wire x1="7.62" y1="180.34" x2="7.62" y2="175.26" width="0.762" layer="92"/>
+<wire x1="-55.88" y1="-33.02" x2="-55.88" y2="50.8" width="0.762" layer="92"/>
+<wire x1="-55.88" y1="50.8" x2="-40.64" y2="50.8" width="0.762" layer="92"/>
+<label x="-55.88" y="50.8" size="1.778" layer="95"/>
 </segment>
 </bus>
 </busses>
 <nets>
-<net name="GND" class="1">
+<net name="FPGA_VCCO_3V3" class="0">
+<segment>
+<pinref part="U7" gate="B34" pin="VCCO_34 at 5"/>
+<wire x1="-86.36" y1="48.26" x2="-81.28" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="-81.28" y1="48.26" x2="-81.28" y2="50.8" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="VCCO_34 at 0"/>
+<wire x1="-81.28" y1="50.8" x2="-81.28" y2="53.34" width="0.1524" layer="91"/>
+<wire x1="-81.28" y1="53.34" x2="-81.28" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="-81.28" y1="55.88" x2="-81.28" y2="58.42" width="0.1524" layer="91"/>
+<wire x1="-81.28" y1="58.42" x2="-81.28" y2="60.96" width="0.1524" layer="91"/>
+<wire x1="-81.28" y1="60.96" x2="-86.36" y2="60.96" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="VCCO_34 at 1"/>
+<wire x1="-86.36" y1="58.42" x2="-81.28" y2="58.42" width="0.1524" layer="91"/>
+<junction x="-81.28" y="58.42"/>
+<pinref part="U7" gate="B34" pin="VCCO_34 at 2"/>
+<wire x1="-86.36" y1="55.88" x2="-81.28" y2="55.88" width="0.1524" layer="91"/>
+<junction x="-81.28" y="55.88"/>
+<pinref part="U7" gate="B34" pin="VCCO_34 at 3"/>
+<wire x1="-86.36" y1="53.34" x2="-81.28" y2="53.34" width="0.1524" layer="91"/>
+<junction x="-81.28" y="53.34"/>
+<pinref part="U7" gate="B34" pin="VCCO_34 at 4"/>
+<wire x1="-86.36" y1="50.8" x2="-81.28" y2="50.8" width="0.1524" layer="91"/>
+<junction x="-81.28" y="50.8"/>
+<junction x="-81.28" y="60.96"/>
+<wire x1="-81.28" y1="60.96" x2="-55.88" y2="60.96" width="0.1524" layer="91"/>
+<label x="-78.74" y="60.96" size="1.778" layer="95"/>
+</segment>
+<segment>
+<wire x1="48.26" y1="50.8" x2="53.34" y2="50.8" width="0.1524" layer="91"/>
+<label x="53.34" y="50.8" size="1.778" layer="95"/>
+<pinref part="U7" gate="B13" pin="VCCO_13 at 0"/>
+<pinref part="U7" gate="B13" pin="VCCO_13 at 1"/>
+<wire x1="53.34" y1="50.8" x2="78.74" y2="50.8" width="0.1524" layer="91"/>
+<wire x1="48.26" y1="48.26" x2="53.34" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="53.34" y1="48.26" x2="53.34" y2="50.8" width="0.1524" layer="91"/>
+<junction x="53.34" y="50.8"/>
+<pinref part="U7" gate="B13" pin="VCCO_13 at 2"/>
+<wire x1="48.26" y1="45.72" x2="53.34" y2="45.72" width="0.1524" layer="91"/>
+<wire x1="53.34" y1="45.72" x2="53.34" y2="48.26" width="0.1524" layer="91"/>
+<junction x="53.34" y="48.26"/>
+<pinref part="U7" gate="B13" pin="VCCO_13 at 3"/>
+<wire x1="48.26" y1="43.18" x2="53.34" y2="43.18" width="0.1524" layer="91"/>
+<wire x1="53.34" y1="43.18" x2="53.34" y2="45.72" width="0.1524" layer="91"/>
+<junction x="53.34" y="45.72"/>
+<pinref part="U7" gate="B13" pin="VCCO_13 at 4"/>
+<wire x1="48.26" y1="40.64" x2="53.34" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="53.34" y1="40.64" x2="53.34" y2="43.18" width="0.1524" layer="91"/>
+<junction x="53.34" y="43.18"/>
+</segment>
+</net>
+<net name="FPGA_FMC_A0" class="0">
+<segment>
+<pinref part="U7" gate="B13" pin="IO_0_13"/>
+<wire x1="48.26" y1="38.1" x2="78.74" y2="38.1" width="0.1524" layer="91"/>
+<label x="53.34" y="38.1" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_FMC_A1" class="0">
+<segment>
+<pinref part="U7" gate="B13" pin="IO_L1P_T0_13"/>
+<wire x1="48.26" y1="35.56" x2="78.74" y2="35.56" width="0.1524" layer="91"/>
+<label x="53.34" y="35.56" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_FMC_A2" class="0">
+<segment>
+<pinref part="U7" gate="B13" pin="IO_L1N_T0_13"/>
+<wire x1="48.26" y1="33.02" x2="78.74" y2="33.02" width="0.1524" layer="91"/>
+<label x="53.34" y="33.02" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_FMC_A3" class="0">
+<segment>
+<pinref part="U7" gate="B13" pin="IO_L2P_T0_13"/>
+<wire x1="48.26" y1="30.48" x2="78.74" y2="30.48" width="0.1524" layer="91"/>
+<label x="53.34" y="30.48" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_FMC_A4" class="0">
+<segment>
+<pinref part="U7" gate="B13" pin="IO_L2N_T0_13"/>
+<wire x1="48.26" y1="27.94" x2="78.74" y2="27.94" width="0.1524" layer="91"/>
+<label x="53.34" y="27.94" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_FMC_A5" class="0">
+<segment>
+<pinref part="U7" gate="B13" pin="IO_L3P_T0_DQS_13"/>
+<wire x1="48.26" y1="25.4" x2="78.74" y2="25.4" width="0.1524" layer="91"/>
+<label x="53.34" y="25.4" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_FMC_A6" class="0">
+<segment>
+<pinref part="U7" gate="B13" pin="IO_L3N_T0_DQS_13"/>
+<wire x1="48.26" y1="22.86" x2="78.74" y2="22.86" width="0.1524" layer="91"/>
+<label x="53.34" y="22.86" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_FMC_A7" class="0">
+<segment>
+<pinref part="U7" gate="B13" pin="IO_L4P_T0_13"/>
+<wire x1="48.26" y1="20.32" x2="78.74" y2="20.32" width="0.1524" layer="91"/>
+<label x="53.34" y="20.32" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_FMC_A8" class="0">
+<segment>
+<pinref part="U7" gate="B13" pin="IO_L4N_T0_13"/>
+<wire x1="48.26" y1="17.78" x2="78.74" y2="17.78" width="0.1524" layer="91"/>
+<label x="53.34" y="17.78" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_FMC_A9" class="0">
+<segment>
+<pinref part="U7" gate="B13" pin="IO_L5P_T0_13"/>
+<wire x1="48.26" y1="15.24" x2="78.74" y2="15.24" width="0.1524" layer="91"/>
+<label x="53.34" y="15.24" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_FMC_A10" class="0">
+<segment>
+<pinref part="U7" gate="B13" pin="IO_L5N_T0_13"/>
+<wire x1="48.26" y1="12.7" x2="78.74" y2="12.7" width="0.1524" layer="91"/>
+<label x="53.34" y="12.7" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_FMC_A11" class="0">
+<segment>
+<pinref part="U7" gate="B13" pin="IO_L6P_T0_13"/>
+<wire x1="48.26" y1="10.16" x2="78.74" y2="10.16" width="0.1524" layer="91"/>
+<label x="53.34" y="10.16" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_FMC_A12" class="0">
+<segment>
+<pinref part="U7" gate="B13" pin="IO_L6N_T0_VREF_13"/>
+<wire x1="48.26" y1="7.62" x2="78.74" y2="7.62" width="0.1524" layer="91"/>
+<label x="53.34" y="7.62" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_FMC_A13" class="0">
+<segment>
+<pinref part="U7" gate="B13" pin="IO_L7P_T1_13"/>
+<wire x1="48.26" y1="5.08" x2="78.74" y2="5.08" width="0.1524" layer="91"/>
+<label x="53.34" y="5.08" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_FMC_A14" class="0">
+<segment>
+<pinref part="U7" gate="B13" pin="IO_L7N_T1_13"/>
+<wire x1="48.26" y1="2.54" x2="78.74" y2="2.54" width="0.1524" layer="91"/>
+<label x="53.34" y="2.54" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_FMC_A15" class="0">
+<segment>
+<pinref part="U7" gate="B13" pin="IO_L8P_T1_13"/>
+<wire x1="48.26" y1="0" x2="78.74" y2="0" width="0.1524" layer="91"/>
+<label x="53.34" y="0" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_FMC_A16" class="0">
 <segment>
-<pinref part="C15" gate="G$1" pin="1"/>
-<wire x1="358.14" y1="35.56" x2="358.14" y2="33.02" width="0.1524" layer="91"/>
-<pinref part="SUPPLY18" gate="GND" pin="GND"/>
+<pinref part="U7" gate="B13" pin="IO_L8N_T1_13"/>
+<wire x1="48.26" y1="-2.54" x2="78.74" y2="-2.54" width="0.1524" layer="91"/>
+<label x="53.34" y="-2.54" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_A17" class="0">
 <segment>
-<wire x1="378.46" y1="35.56" x2="378.46" y2="33.02" width="0.1524" layer="91"/>
-<pinref part="SUPPLY19" gate="GND" pin="GND"/>
-<pinref part="C14" gate="G$1" pin="1"/>
+<pinref part="U7" gate="B13" pin="IO_L9P_T1_DQS_13"/>
+<wire x1="48.26" y1="-5.08" x2="78.74" y2="-5.08" width="0.1524" layer="91"/>
+<label x="53.34" y="-5.08" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_A18" class="0">
 <segment>
-<pinref part="U$1" gate="G$2" pin="VSS at 60"/>
-<wire x1="40.64" y1="-48.26" x2="40.64" y2="-53.34" width="0.1524" layer="91"/>
-<pinref part="U$1" gate="G$2" pin="VSS at 93"/>
-<wire x1="40.64" y1="-53.34" x2="45.72" y2="-53.34" width="0.1524" layer="91"/>
-<wire x1="45.72" y1="-53.34" x2="53.34" y2="-53.34" width="0.1524" layer="91"/>
-<wire x1="53.34" y1="-53.34" x2="60.96" y2="-53.34" width="0.1524" layer="91"/>
-<wire x1="60.96" y1="-53.34" x2="66.04" y2="-53.34" width="0.1524" layer="91"/>
-<wire x1="66.04" y1="-53.34" x2="66.04" y2="-48.26" width="0.1524" layer="91"/>
-<pinref part="U$1" gate="G$2" pin="VSS at 82"/>
-<wire x1="60.96" y1="-48.26" x2="60.96" y2="-53.34" width="0.1524" layer="91"/>
-<junction x="60.96" y="-53.34"/>
-<pinref part="U$1" gate="G$2" pin="VSS at 72"/>
-<wire x1="45.72" y1="-48.26" x2="45.72" y2="-53.34" width="0.1524" layer="91"/>
-<junction x="45.72" y="-53.34"/>
-<pinref part="SUPPLY22" gate="GND" pin="GND"/>
-<junction x="53.34" y="-53.34"/>
+<pinref part="U7" gate="B13" pin="IO_L9N_T1_DQS_13"/>
+<wire x1="48.26" y1="-7.62" x2="78.74" y2="-7.62" width="0.1524" layer="91"/>
+<label x="53.34" y="-7.62" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_A19" class="0">
 <segment>
-<pinref part="U$1" gate="G$4" pin="VSS at 170"/>
-<pinref part="SUPPLY21" gate="GND" pin="GND"/>
-<wire x1="218.44" y1="-50.8" x2="218.44" y2="-55.88" width="0.1524" layer="91"/>
-<wire x1="218.44" y1="-55.88" x2="228.6" y2="-55.88" width="0.1524" layer="91"/>
-<pinref part="U$1" gate="G$4" pin="VSS at 202"/>
-<wire x1="228.6" y1="-55.88" x2="233.68" y2="-55.88" width="0.1524" layer="91"/>
-<wire x1="233.68" y1="-55.88" x2="238.76" y2="-55.88" width="0.1524" layer="91"/>
-<wire x1="238.76" y1="-55.88" x2="238.76" y2="-50.8" width="0.1524" layer="91"/>
-<junction x="228.6" y="-55.88"/>
-<pinref part="U$1" gate="G$4" pin="VSS at 184"/>
-<wire x1="233.68" y1="-50.8" x2="233.68" y2="-55.88" width="0.1524" layer="91"/>
-<junction x="233.68" y="-55.88"/>
+<pinref part="U7" gate="B13" pin="IO_L10P_T1_13"/>
+<wire x1="48.26" y1="-10.16" x2="78.74" y2="-10.16" width="0.1524" layer="91"/>
+<label x="53.34" y="-10.16" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_A20" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="VSS at 149"/>
-<pinref part="SUPPLY20" gate="GND" pin="GND"/>
-<wire x1="238.76" y1="99.06" x2="238.76" y2="91.44" width="0.1524" layer="91"/>
-<wire x1="238.76" y1="91.44" x2="233.68" y2="91.44" width="0.1524" layer="91"/>
-<pinref part="U$1" gate="G$3" pin="VSS at 136"/>
-<wire x1="233.68" y1="91.44" x2="226.06" y2="91.44" width="0.1524" layer="91"/>
-<wire x1="233.68" y1="99.06" x2="233.68" y2="91.44" width="0.1524" layer="91"/>
-<junction x="233.68" y="91.44"/>
-<pinref part="U$1" gate="G$3" pin="VSS at 125"/>
-<wire x1="218.44" y1="99.06" x2="218.44" y2="91.44" width="0.1524" layer="91"/>
-<wire x1="218.44" y1="91.44" x2="226.06" y2="91.44" width="0.1524" layer="91"/>
-<junction x="226.06" y="91.44"/>
-<pinref part="U$1" gate="G$3" pin="VSS at 114"/>
-<wire x1="213.36" y1="99.06" x2="213.36" y2="91.44" width="0.1524" layer="91"/>
-<wire x1="213.36" y1="91.44" x2="218.44" y2="91.44" width="0.1524" layer="91"/>
-<junction x="218.44" y="91.44"/>
+<pinref part="U7" gate="B13" pin="IO_L10N_T1_13"/>
+<wire x1="48.26" y1="-12.7" x2="78.74" y2="-12.7" width="0.1524" layer="91"/>
+<label x="53.34" y="-12.7" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_A21" class="0">
 <segment>
-<pinref part="U$1" gate="G$1" pin="VSS at 14"/>
-<pinref part="SUPPLY24" gate="GND" pin="GND"/>
-<wire x1="40.64" y1="99.06" x2="40.64" y2="91.44" width="0.1524" layer="91"/>
-<wire x1="40.64" y1="91.44" x2="45.72" y2="91.44" width="0.1524" layer="91"/>
-<pinref part="U$1" gate="G$1" pin="VSS at 25"/>
-<wire x1="45.72" y1="91.44" x2="53.34" y2="91.44" width="0.1524" layer="91"/>
-<wire x1="45.72" y1="99.06" x2="45.72" y2="91.44" width="0.1524" layer="91"/>
-<junction x="45.72" y="91.44"/>
-<pinref part="U$1" gate="G$1" pin="VSSA at 40"/>
-<wire x1="60.96" y1="99.06" x2="60.96" y2="91.44" width="0.1524" layer="91"/>
-<wire x1="60.96" y1="91.44" x2="53.34" y2="91.44" width="0.1524" layer="91"/>
-<junction x="53.34" y="91.44"/>
-<pinref part="U$1" gate="G$1" pin="VSS at 51"/>
-<wire x1="66.04" y1="99.06" x2="66.04" y2="91.44" width="0.1524" layer="91"/>
-<wire x1="66.04" y1="91.44" x2="60.96" y2="91.44" width="0.1524" layer="91"/>
-<junction x="60.96" y="91.44"/>
+<pinref part="U7" gate="B13" pin="IO_L11P_T1_SRCC_13"/>
+<wire x1="48.26" y1="-15.24" x2="78.74" y2="-15.24" width="0.1524" layer="91"/>
+<label x="53.34" y="-15.24" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_A22" class="0">
 <segment>
-<pinref part="C16" gate="G$1" pin="P$2"/>
-<wire x1="373.38" y1="142.24" x2="373.38" y2="139.7" width="0.1524" layer="91"/>
-<wire x1="373.38" y1="139.7" x2="375.92" y2="139.7" width="0.1524" layer="91"/>
-<pinref part="SUPPLY25" gate="GND" pin="GND"/>
-<wire x1="375.92" y1="139.7" x2="375.92" y2="137.16" width="0.1524" layer="91"/>
-<pinref part="C17" gate="G$1" pin="P$2"/>
-<wire x1="378.46" y1="142.24" x2="378.46" y2="139.7" width="0.1524" layer="91"/>
-<wire x1="378.46" y1="139.7" x2="375.92" y2="139.7" width="0.1524" layer="91"/>
-<junction x="375.92" y="139.7"/>
+<pinref part="U7" gate="B13" pin="IO_L11N_T1_SRCC_13"/>
+<wire x1="48.26" y1="-17.78" x2="78.74" y2="-17.78" width="0.1524" layer="91"/>
+<label x="53.34" y="-17.78" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_A25" class="0">
 <segment>
-<pinref part="C18" gate="G$1" pin="P$2"/>
-<pinref part="C29" gate="G$1" pin="P$2"/>
-<wire x1="449.58" y1="144.78" x2="444.5" y2="144.78" width="0.1524" layer="91"/>
-<pinref part="SUPPLY26" gate="GND" pin="GND"/>
-<wire x1="444.5" y1="144.78" x2="439.42" y2="144.78" width="0.1524" layer="91"/>
-<wire x1="439.42" y1="144.78" x2="434.34" y2="144.78" width="0.1524" layer="91"/>
-<wire x1="434.34" y1="144.78" x2="429.26" y2="144.78" width="0.1524" layer="91"/>
-<wire x1="429.26" y1="144.78" x2="424.18" y2="144.78" width="0.1524" layer="91"/>
-<wire x1="424.18" y1="144.78" x2="419.1" y2="144.78" width="0.1524" layer="91"/>
-<wire x1="419.1" y1="144.78" x2="414.02" y2="144.78" width="0.1524" layer="91"/>
-<wire x1="414.02" y1="144.78" x2="408.94" y2="144.78" width="0.1524" layer="91"/>
-<wire x1="408.94" y1="144.78" x2="403.86" y2="144.78" width="0.1524" layer="91"/>
-<wire x1="403.86" y1="144.78" x2="403.86" y2="132.08" width="0.1524" layer="91"/>
-<junction x="403.86" y="144.78"/>
-<wire x1="403.86" y1="132.08" x2="403.86" y2="124.46" width="0.1524" layer="91"/>
-<junction x="403.86" y="132.08"/>
-<pinref part="C19" gate="G$1" pin="P$2"/>
-<junction x="444.5" y="144.78"/>
-<pinref part="C20" gate="G$1" pin="P$2"/>
-<junction x="439.42" y="144.78"/>
-<pinref part="C21" gate="G$1" pin="P$2"/>
-<junction x="434.34" y="144.78"/>
-<pinref part="C22" gate="G$1" pin="P$2"/>
-<junction x="429.26" y="144.78"/>
-<pinref part="C23" gate="G$1" pin="P$2"/>
-<junction x="424.18" y="144.78"/>
-<pinref part="C24" gate="G$1" pin="P$2"/>
-<junction x="419.1" y="144.78"/>
-<pinref part="C25" gate="G$1" pin="P$2"/>
-<junction x="414.02" y="144.78"/>
-<pinref part="C28" gate="G$1" pin="P$2"/>
-<junction x="408.94" y="144.78"/>
-<pinref part="C31" gate="G$1" pin="P$2"/>
-<wire x1="449.58" y1="132.08" x2="444.5" y2="132.08" width="0.1524" layer="91"/>
-<pinref part="C32" gate="G$1" pin="P$2"/>
-<junction x="444.5" y="132.08"/>
-<wire x1="444.5" y1="132.08" x2="439.42" y2="132.08" width="0.1524" layer="91"/>
-<pinref part="C33" gate="G$1" pin="P$2"/>
-<junction x="439.42" y="132.08"/>
-<wire x1="439.42" y1="132.08" x2="434.34" y2="132.08" width="0.1524" layer="91"/>
-<pinref part="C34" gate="G$1" pin="P$2"/>
-<junction x="434.34" y="132.08"/>
-<wire x1="434.34" y1="132.08" x2="429.26" y2="132.08" width="0.1524" layer="91"/>
-<pinref part="C35" gate="G$1" pin="P$2"/>
-<junction x="429.26" y="132.08"/>
-<wire x1="429.26" y1="132.08" x2="424.18" y2="132.08" width="0.1524" layer="91"/>
-<pinref part="C36" gate="G$1" pin="P$2"/>
-<junction x="424.18" y="132.08"/>
-<wire x1="424.18" y1="132.08" x2="419.1" y2="132.08" width="0.1524" layer="91"/>
-<pinref part="C37" gate="G$1" pin="P$2"/>
-<junction x="419.1" y="132.08"/>
-<wire x1="419.1" y1="132.08" x2="414.02" y2="132.08" width="0.1524" layer="91"/>
-<pinref part="C26" gate="G$1" pin="P$2"/>
-<junction x="414.02" y="132.08"/>
-<wire x1="414.02" y1="132.08" x2="408.94" y2="132.08" width="0.1524" layer="91"/>
-<pinref part="C27" gate="G$1" pin="P$2"/>
-<junction x="408.94" y="132.08"/>
-<wire x1="408.94" y1="132.08" x2="403.86" y2="132.08" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B13" pin="IO_L13N_T2_MRCC_13"/>
+<wire x1="48.26" y1="-27.94" x2="78.74" y2="-27.94" width="0.1524" layer="91"/>
+<label x="53.34" y="-27.94" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_A23" class="0">
 <segment>
-<pinref part="SUPPLY27" gate="GND" pin="GND"/>
-<pinref part="C30" gate="G$1" pin="P$2"/>
-<wire x1="96.52" y1="203.2" x2="96.52" y2="205.74" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B13" pin="IO_L12N_T1_MRCC_13"/>
+<wire x1="48.26" y1="-22.86" x2="78.74" y2="-22.86" width="0.1524" layer="91"/>
+<label x="53.34" y="-22.86" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_A24" class="0">
 <segment>
-<pinref part="R10" gate="G$1" pin="1"/>
-<pinref part="SUPPLY28" gate="GND" pin="GND"/>
-<wire x1="274.32" y1="-53.34" x2="274.32" y2="-55.88" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B13" pin="IO_L13P_T2_MRCC_13"/>
+<wire x1="48.26" y1="-25.4" x2="78.74" y2="-25.4" width="0.1524" layer="91"/>
+<label x="53.34" y="-25.4" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_CLK" class="0">
 <segment>
-<pinref part="SUPPLY29" gate="GND" pin="GND"/>
-<pinref part="C40" gate="G$1" pin="P$2"/>
-<wire x1="436.88" y1="17.78" x2="436.88" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B13" pin="IO_L12P_T1_MRCC_13"/>
+<wire x1="48.26" y1="-20.32" x2="73.66" y2="-20.32" width="0.1524" layer="91"/>
+<label x="53.34" y="-20.32" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_D0" class="0">
 <segment>
-<pinref part="U$2" gate="G$1" pin="GND"/>
-<pinref part="SUPPLY42" gate="GND" pin="GND"/>
-<wire x1="436.88" y1="40.64" x2="421.64" y2="40.64" width="0.1524" layer="91"/>
-<wire x1="421.64" y1="40.64" x2="421.64" y2="17.78" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_0_34"/>
+<wire x1="-86.36" y1="45.72" x2="-55.88" y2="45.72" width="0.1524" layer="91"/>
+<label x="-81.28" y="45.72" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_D1" class="0">
 <segment>
-<pinref part="LED5" gate="G$1" pin="C"/>
-<wire x1="439.42" y1="-20.32" x2="441.96" y2="-20.32" width="0.1524" layer="91"/>
-<wire x1="441.96" y1="-22.86" x2="441.96" y2="-20.32" width="0.1524" layer="91"/>
-<pinref part="LED6" gate="G$1" pin="C"/>
-<wire x1="434.34" y1="-22.86" x2="441.96" y2="-22.86" width="0.1524" layer="91"/>
-<junction x="441.96" y="-22.86"/>
-<wire x1="441.96" y1="-25.4" x2="441.96" y2="-22.86" width="0.1524" layer="91"/>
-<pinref part="LED7" gate="G$1" pin="C"/>
-<wire x1="439.42" y1="-25.4" x2="441.96" y2="-25.4" width="0.1524" layer="91"/>
-<junction x="441.96" y="-25.4"/>
-<pinref part="LED8" gate="G$1" pin="C"/>
-<wire x1="434.34" y1="-27.94" x2="441.96" y2="-27.94" width="0.1524" layer="91"/>
-<wire x1="441.96" y1="-27.94" x2="441.96" y2="-25.4" width="0.1524" layer="91"/>
-<pinref part="SUPPLY43" gate="GND" pin="GND"/>
-<wire x1="444.5" y1="-27.94" x2="441.96" y2="-27.94" width="0.1524" layer="91"/>
-<junction x="441.96" y="-27.94"/>
+<pinref part="U7" gate="B34" pin="IO_L1P_T0_34"/>
+<wire x1="-86.36" y1="43.18" x2="-55.88" y2="43.18" width="0.1524" layer="91"/>
+<label x="-81.28" y="43.18" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="3V3" class="0">
+<net name="FPGA_FMC_D2" class="0">
 <segment>
-<pinref part="U$1" gate="G$4" pin="VDD at 158"/>
-<wire x1="205.74" y1="58.42" x2="205.74" y2="66.04" width="0.1524" layer="91"/>
-<wire x1="205.74" y1="66.04" x2="210.82" y2="66.04" width="0.1524" layer="91"/>
-<wire x1="210.82" y1="66.04" x2="226.06" y2="66.04" width="0.1524" layer="91"/>
-<pinref part="U$1" gate="G$4" pin="VDD at 204"/>
-<wire x1="226.06" y1="67.31" x2="226.06" y2="66.04" width="0.1524" layer="91"/>
-<wire x1="246.38" y1="58.42" x2="246.38" y2="66.04" width="0.1524" layer="91"/>
-<wire x1="246.38" y1="66.04" x2="241.3" y2="66.04" width="0.1524" layer="91"/>
-<junction x="226.06" y="66.04"/>
-<pinref part="U$1" gate="G$4" pin="VDD at 185"/>
-<wire x1="241.3" y1="66.04" x2="226.06" y2="66.04" width="0.1524" layer="91"/>
-<wire x1="241.3" y1="58.42" x2="241.3" y2="66.04" width="0.1524" layer="91"/>
-<junction x="241.3" y="66.04"/>
-<pinref part="U$1" gate="G$4" pin="VDD at 171"/>
-<wire x1="210.82" y1="58.42" x2="210.82" y2="66.04" width="0.1524" layer="91"/>
-<junction x="210.82" y="66.04"/>
-<pinref part="P+8" gate="VCC" pin="VCC"/>
+<pinref part="U7" gate="B34" pin="IO_L1N_T0_34"/>
+<wire x1="-86.36" y1="40.64" x2="-55.88" y2="40.64" width="0.1524" layer="91"/>
+<label x="-81.28" y="40.64" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_D3" class="0">
 <segment>
-<pinref part="C29" gate="G$1" pin="P$1"/>
-<wire x1="403.86" y1="157.48" x2="403.86" y2="158.75" width="0.1524" layer="91"/>
-<pinref part="C18" gate="G$1" pin="P$1"/>
-<wire x1="403.86" y1="158.75" x2="403.86" y2="152.4" width="0.1524" layer="91"/>
-<wire x1="403.86" y1="152.4" x2="408.94" y2="152.4" width="0.1524" layer="91"/>
-<junction x="403.86" y="152.4"/>
-<wire x1="408.94" y1="152.4" x2="414.02" y2="152.4" width="0.1524" layer="91"/>
-<wire x1="414.02" y1="152.4" x2="419.1" y2="152.4" width="0.1524" layer="91"/>
-<wire x1="419.1" y1="152.4" x2="424.18" y2="152.4" width="0.1524" layer="91"/>
-<wire x1="424.18" y1="152.4" x2="429.26" y2="152.4" width="0.1524" layer="91"/>
-<wire x1="429.26" y1="152.4" x2="434.34" y2="152.4" width="0.1524" layer="91"/>
-<wire x1="434.34" y1="152.4" x2="439.42" y2="152.4" width="0.1524" layer="91"/>
-<wire x1="439.42" y1="152.4" x2="444.5" y2="152.4" width="0.1524" layer="91"/>
-<wire x1="444.5" y1="152.4" x2="449.58" y2="152.4" width="0.1524" layer="91"/>
-<wire x1="449.58" y1="152.4" x2="454.66" y2="152.4" width="0.1524" layer="91"/>
-<junction x="449.58" y="152.4"/>
-<wire x1="454.66" y1="152.4" x2="454.66" y2="139.7" width="0.1524" layer="91"/>
-<pinref part="C27" gate="G$1" pin="P$1"/>
-<wire x1="454.66" y1="139.7" x2="449.58" y2="139.7" width="0.1524" layer="91"/>
-<pinref part="C28" gate="G$1" pin="P$1"/>
-<junction x="408.94" y="152.4"/>
-<pinref part="C25" gate="G$1" pin="P$1"/>
-<junction x="414.02" y="152.4"/>
-<pinref part="C24" gate="G$1" pin="P$1"/>
-<junction x="419.1" y="152.4"/>
-<pinref part="C23" gate="G$1" pin="P$1"/>
-<junction x="424.18" y="152.4"/>
-<pinref part="C22" gate="G$1" pin="P$1"/>
-<junction x="429.26" y="152.4"/>
-<pinref part="C21" gate="G$1" pin="P$1"/>
-<junction x="434.34" y="152.4"/>
-<pinref part="C20" gate="G$1" pin="P$1"/>
-<junction x="439.42" y="152.4"/>
-<pinref part="C19" gate="G$1" pin="P$1"/>
-<junction x="444.5" y="152.4"/>
-<pinref part="C26" gate="G$1" pin="P$1"/>
-<junction x="414.02" y="139.7"/>
-<wire x1="449.58" y1="139.7" x2="444.5" y2="139.7" width="0.1524" layer="91"/>
-<wire x1="444.5" y1="139.7" x2="439.42" y2="139.7" width="0.1524" layer="91"/>
-<wire x1="439.42" y1="139.7" x2="434.34" y2="139.7" width="0.1524" layer="91"/>
-<wire x1="434.34" y1="139.7" x2="429.26" y2="139.7" width="0.1524" layer="91"/>
-<wire x1="429.26" y1="139.7" x2="424.18" y2="139.7" width="0.1524" layer="91"/>
-<wire x1="424.18" y1="139.7" x2="419.1" y2="139.7" width="0.1524" layer="91"/>
-<wire x1="419.1" y1="139.7" x2="414.02" y2="139.7" width="0.1524" layer="91"/>
-<wire x1="414.02" y1="139.7" x2="408.94" y2="139.7" width="0.1524" layer="91"/>
-<pinref part="C37" gate="G$1" pin="P$1"/>
-<junction x="419.1" y="139.7"/>
-<pinref part="C36" gate="G$1" pin="P$1"/>
-<junction x="424.18" y="139.7"/>
-<pinref part="C35" gate="G$1" pin="P$1"/>
-<junction x="429.26" y="139.7"/>
-<pinref part="C34" gate="G$1" pin="P$1"/>
-<junction x="434.34" y="139.7"/>
-<pinref part="C33" gate="G$1" pin="P$1"/>
-<junction x="439.42" y="139.7"/>
-<pinref part="C32" gate="G$1" pin="P$1"/>
-<junction x="444.5" y="139.7"/>
-<pinref part="C31" gate="G$1" pin="P$1"/>
-<junction x="449.58" y="139.7"/>
-<pinref part="P+11" gate="VCC" pin="VCC"/>
-<junction x="403.86" y="158.75"/>
+<pinref part="U7" gate="B34" pin="IO_L2P_T0_34"/>
+<wire x1="-86.36" y1="38.1" x2="-55.88" y2="38.1" width="0.1524" layer="91"/>
+<label x="-81.28" y="38.1" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_D4" class="0">
 <segment>
-<pinref part="U$1" gate="G$2" pin="VDD at 59"/>
-<wire x1="33.02" y1="60.96" x2="33.02" y2="68.58" width="0.1524" layer="91"/>
-<wire x1="33.02" y1="68.58" x2="38.1" y2="68.58" width="0.1524" layer="91"/>
-<wire x1="38.1" y1="68.58" x2="53.34" y2="68.58" width="0.1524" layer="91"/>
-<wire x1="53.34" y1="68.58" x2="53.34" y2="71.12" width="0.1524" layer="91"/>
-<pinref part="U$1" gate="G$2" pin="VDD at 103"/>
-<wire x1="76.2" y1="60.96" x2="76.2" y2="68.58" width="0.1524" layer="91"/>
-<wire x1="76.2" y1="68.58" x2="71.12" y2="68.58" width="0.1524" layer="91"/>
-<junction x="53.34" y="68.58"/>
-<pinref part="U$1" gate="G$2" pin="VDD at 94"/>
-<wire x1="71.12" y1="68.58" x2="66.04" y2="68.58" width="0.1524" layer="91"/>
-<wire x1="66.04" y1="68.58" x2="53.34" y2="68.58" width="0.1524" layer="91"/>
-<wire x1="71.12" y1="60.96" x2="71.12" y2="68.58" width="0.1524" layer="91"/>
-<junction x="71.12" y="68.58"/>
-<pinref part="U$1" gate="G$2" pin="VDD at 83"/>
-<wire x1="66.04" y1="60.96" x2="66.04" y2="68.58" width="0.1524" layer="91"/>
-<junction x="66.04" y="68.58"/>
-<pinref part="U$1" gate="G$2" pin="VDD at 73"/>
-<wire x1="38.1" y1="60.96" x2="38.1" y2="68.58" width="0.1524" layer="91"/>
-<junction x="38.1" y="68.58"/>
-<pinref part="P+9" gate="VCC" pin="VCC"/>
+<pinref part="U7" gate="B34" pin="IO_L2N_T0_34"/>
+<wire x1="-86.36" y1="35.56" x2="-55.88" y2="35.56" width="0.1524" layer="91"/>
+<label x="-81.28" y="35.56" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_D5" class="0">
 <segment>
-<pinref part="U$1" gate="G$1" pin="VBAT at 6"/>
-<wire x1="27.94" y1="208.28" x2="27.94" y2="215.9" width="0.1524" layer="91"/>
-<wire x1="27.94" y1="215.9" x2="35.56" y2="215.9" width="0.1524" layer="91"/>
-<wire x1="35.56" y1="215.9" x2="40.64" y2="215.9" width="0.1524" layer="91"/>
-<wire x1="40.64" y1="215.9" x2="53.34" y2="215.9" width="0.1524" layer="91"/>
-<wire x1="53.34" y1="215.9" x2="53.34" y2="220.98" width="0.1524" layer="91"/>
-<pinref part="U$1" gate="G$1" pin="VDD at 52"/>
-<wire x1="73.66" y1="208.28" x2="73.66" y2="215.9" width="0.1524" layer="91"/>
-<junction x="53.34" y="215.9"/>
-<wire x1="73.66" y1="215.9" x2="68.58" y2="215.9" width="0.1524" layer="91"/>
-<wire x1="68.58" y1="215.9" x2="53.34" y2="215.9" width="0.1524" layer="91"/>
-<pinref part="U$1" gate="G$1" pin="VDD at 39"/>
-<wire x1="68.58" y1="208.28" x2="68.58" y2="215.9" width="0.1524" layer="91"/>
-<junction x="68.58" y="215.9"/>
-<pinref part="U$1" gate="G$1" pin="VDD at 26"/>
-<wire x1="40.64" y1="208.28" x2="40.64" y2="215.9" width="0.1524" layer="91"/>
-<junction x="40.64" y="215.9"/>
-<pinref part="U$1" gate="G$1" pin="VDD at 15"/>
-<wire x1="35.56" y1="208.28" x2="35.56" y2="215.9" width="0.1524" layer="91"/>
-<junction x="35.56" y="215.9"/>
-<pinref part="P+5" gate="VCC" pin="VCC"/>
+<pinref part="U7" gate="B34" pin="IO_L3P_T0_DQS_34"/>
+<wire x1="-86.36" y1="33.02" x2="-55.88" y2="33.02" width="0.1524" layer="91"/>
+<label x="-81.28" y="33.02" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_D6" class="0">
 <segment>
-<pinref part="U$1" gate="G$1" pin="VDDA at 42"/>
-<wire x1="81.28" y1="208.28" x2="81.28" y2="215.9" width="0.1524" layer="91"/>
-<wire x1="81.28" y1="215.9" x2="81.28" y2="219.71" width="0.1524" layer="91"/>
-<wire x1="81.28" y1="215.9" x2="96.52" y2="215.9" width="0.1524" layer="91"/>
-<wire x1="96.52" y1="215.9" x2="96.52" y2="213.36" width="0.1524" layer="91"/>
-<pinref part="C30" gate="G$1" pin="P$1"/>
-<junction x="81.28" y="215.9"/>
-<pinref part="P+12" gate="VCC" pin="VCC"/>
+<pinref part="U7" gate="B34" pin="IO_L3N_T0_DQS_34"/>
+<wire x1="-86.36" y1="30.48" x2="-55.88" y2="30.48" width="0.1524" layer="91"/>
+<label x="-81.28" y="30.48" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_D7" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="VDD at 115"/>
-<wire x1="205.74" y1="208.28" x2="205.74" y2="215.9" width="0.1524" layer="91"/>
-<wire x1="205.74" y1="215.9" x2="210.82" y2="215.9" width="0.1524" layer="91"/>
-<wire x1="210.82" y1="215.9" x2="226.06" y2="215.9" width="0.1524" layer="91"/>
-<wire x1="226.06" y1="215.9" x2="226.06" y2="222.25" width="0.1524" layer="91"/>
-<pinref part="U$1" gate="G$3" pin="VDD at 150"/>
-<wire x1="226.06" y1="222.25" x2="226.06" y2="220.98" width="0.1524" layer="91"/>
-<wire x1="246.38" y1="208.28" x2="246.38" y2="215.9" width="0.1524" layer="91"/>
-<wire x1="246.38" y1="215.9" x2="241.3" y2="215.9" width="0.1524" layer="91"/>
-<junction x="226.06" y="215.9"/>
-<pinref part="U$1" gate="G$3" pin="VDD at 137"/>
-<wire x1="241.3" y1="215.9" x2="226.06" y2="215.9" width="0.1524" layer="91"/>
-<wire x1="241.3" y1="208.28" x2="241.3" y2="215.9" width="0.1524" layer="91"/>
-<junction x="241.3" y="215.9"/>
-<pinref part="U$1" gate="G$3" pin="VDD at 124"/>
-<wire x1="210.82" y1="208.28" x2="210.82" y2="215.9" width="0.1524" layer="91"/>
-<junction x="210.82" y="215.9"/>
-<pinref part="P+6" gate="VCC" pin="VCC"/>
-<junction x="226.06" y="222.25"/>
+<pinref part="U7" gate="B34" pin="IO_L4P_T0_34"/>
+<wire x1="-86.36" y1="27.94" x2="-55.88" y2="27.94" width="0.1524" layer="91"/>
+<label x="-81.28" y="27.94" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_D8" class="0">
 <segment>
-<pinref part="C38" gate="G$1" pin="P$1"/>
-<wire x1="274.32" y1="210.82" x2="274.32" y2="213.36" width="0.1524" layer="91"/>
-<pinref part="P+13" gate="VCC" pin="VCC"/>
-<wire x1="274.32" y1="213.36" x2="274.32" y2="217.17" width="0.1524" layer="91"/>
-<wire x1="274.32" y1="217.17" x2="274.32" y2="218.44" width="0.1524" layer="91"/>
-<junction x="274.32" y="217.17"/>
-<pinref part="C57" gate="G$1" pin="P$1"/>
-<wire x1="269.24" y1="210.82" x2="269.24" y2="213.36" width="0.1524" layer="91"/>
-<wire x1="269.24" y1="213.36" x2="274.32" y2="213.36" width="0.1524" layer="91"/>
-<junction x="274.32" y="213.36"/>
+<pinref part="U7" gate="B34" pin="IO_L4N_T0_34"/>
+<wire x1="-86.36" y1="25.4" x2="-55.88" y2="25.4" width="0.1524" layer="91"/>
+<label x="-81.28" y="25.4" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_D9" class="0">
 <segment>
-<pinref part="C39" gate="G$1" pin="P$1"/>
-<wire x1="101.6" y1="66.04" x2="101.6" y2="68.58" width="0.1524" layer="91"/>
-<pinref part="P+14" gate="VCC" pin="VCC"/>
-<wire x1="101.6" y1="68.58" x2="101.6" y2="72.39" width="0.1524" layer="91"/>
-<wire x1="101.6" y1="72.39" x2="101.6" y2="73.66" width="0.1524" layer="91"/>
-<junction x="101.6" y="72.39"/>
-<pinref part="C56" gate="G$1" pin="P$1"/>
-<wire x1="96.52" y1="66.04" x2="96.52" y2="68.58" width="0.1524" layer="91"/>
-<wire x1="96.52" y1="68.58" x2="101.6" y2="68.58" width="0.1524" layer="91"/>
-<junction x="101.6" y="68.58"/>
+<pinref part="U7" gate="B34" pin="IO_L5P_T0_34"/>
+<wire x1="-86.36" y1="22.86" x2="-55.88" y2="22.86" width="0.1524" layer="91"/>
+<label x="-81.28" y="22.86" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_D10" class="0">
 <segment>
-<pinref part="U$1" gate="G$1" pin="VREF+ at 41"/>
-<wire x1="96.52" y1="160.02" x2="104.14" y2="160.02" width="0.1524" layer="91"/>
-<pinref part="P+15" gate="VCC" pin="VCC"/>
-<wire x1="104.14" y1="163.83" x2="104.14" y2="160.02" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_L5N_T0_34"/>
+<wire x1="-86.36" y1="20.32" x2="-55.88" y2="20.32" width="0.1524" layer="91"/>
+<label x="-81.28" y="20.32" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_D11" class="0">
 <segment>
-<pinref part="C16" gate="G$1" pin="P$1"/>
-<wire x1="373.38" y1="149.86" x2="373.38" y2="152.4" width="0.1524" layer="91"/>
-<wire x1="373.38" y1="152.4" x2="375.92" y2="152.4" width="0.1524" layer="91"/>
-<wire x1="375.92" y1="152.4" x2="375.92" y2="156.21" width="0.1524" layer="91"/>
-<pinref part="C17" gate="G$1" pin="P$1"/>
-<wire x1="375.92" y1="156.21" x2="375.92" y2="157.48" width="0.1524" layer="91"/>
-<wire x1="378.46" y1="149.86" x2="378.46" y2="152.4" width="0.1524" layer="91"/>
-<wire x1="378.46" y1="152.4" x2="375.92" y2="152.4" width="0.1524" layer="91"/>
-<junction x="375.92" y="152.4"/>
-<pinref part="P+10" gate="VCC" pin="VCC"/>
-<junction x="375.92" y="156.21"/>
+<pinref part="U7" gate="B34" pin="IO_L6P_T0_34"/>
+<wire x1="-86.36" y1="17.78" x2="-55.88" y2="17.78" width="0.1524" layer="91"/>
+<label x="-81.28" y="17.78" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_D12" class="0">
 <segment>
-<pinref part="U$2" gate="G$1" pin="VCC"/>
-<wire x1="436.88" y1="43.18" x2="421.64" y2="43.18" width="0.1524" layer="91"/>
-<wire x1="421.64" y1="43.18" x2="421.64" y2="49.53" width="0.1524" layer="91"/>
-<pinref part="P+16" gate="VCC" pin="VCC"/>
-<wire x1="421.64" y1="49.53" x2="421.64" y2="50.8" width="0.1524" layer="91"/>
-<junction x="421.64" y="49.53"/>
+<pinref part="U7" gate="B34" pin="IO_L6N_T0_VREF_34"/>
+<wire x1="-86.36" y1="15.24" x2="-55.88" y2="15.24" width="0.1524" layer="91"/>
+<label x="-81.28" y="15.24" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_FMC_D13" class="0">
 <segment>
-<pinref part="U$1" gate="G$4" pin="PDR_ON at 203"/>
-<wire x1="269.24" y1="17.78" x2="274.32" y2="17.78" width="0.1524" layer="91"/>
-<wire x1="274.32" y1="17.78" x2="274.32" y2="20.32" width="0.1524" layer="91"/>
-<pinref part="P+17" gate="VCC" pin="VCC"/>
+<pinref part="U7" gate="B34" pin="IO_L7P_T1_34"/>
+<wire x1="-86.36" y1="12.7" x2="-55.88" y2="12.7" width="0.1524" layer="91"/>
+<label x="-81.28" y="12.7" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_CLK" class="0">
+<net name="FPGA_FMC_D14" class="0">
 <segment>
-<pinref part="U$1" gate="G$4" pin="PD3/FMC_CLK"/>
-<wire x1="187.96" y1="10.16" x2="180.34" y2="10.16" width="0.1524" layer="91"/>
-<label x="180.34" y="10.16" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U7" gate="B34" pin="IO_L7N_T1_34"/>
+<wire x1="-86.36" y1="10.16" x2="-55.88" y2="10.16" width="0.1524" layer="91"/>
+<label x="-81.28" y="10.16" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_D0" class="2">
+<net name="FPGA_FMC_D15" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="PD14/FMC_D0"/>
-<wire x1="187.96" y1="157.48" x2="165.1" y2="157.48" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_L8P_T1_34"/>
+<wire x1="-86.36" y1="7.62" x2="-55.88" y2="7.62" width="0.1524" layer="91"/>
+<label x="-81.28" y="7.62" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_D1" class="2">
+<net name="FPGA_FMC_D16" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="PD15/FMC_D1"/>
-<wire x1="187.96" y1="154.94" x2="165.1" y2="154.94" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_L8N_T1_34"/>
+<wire x1="-86.36" y1="5.08" x2="-55.88" y2="5.08" width="0.1524" layer="91"/>
+<label x="-81.28" y="5.08" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_D13" class="2">
+<net name="FPGA_FMC_D17" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="PD8/FMC_D13"/>
-<wire x1="187.96" y1="177.8" x2="165.1" y2="177.8" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_L9P_T1_DQS_34"/>
+<wire x1="-86.36" y1="2.54" x2="-55.88" y2="2.54" width="0.1524" layer="91"/>
+<label x="-81.28" y="2.54" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_D14" class="2">
+<net name="FPGA_FMC_D18" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="PD9/FMC_D14"/>
-<wire x1="187.96" y1="175.26" x2="165.1" y2="175.26" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_L9N_T1_DQS_34"/>
+<wire x1="-86.36" y1="0" x2="-55.88" y2="0" width="0.1524" layer="91"/>
+<label x="-81.28" y="0" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_D15" class="2">
+<net name="FPGA_FMC_D19" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="PD10/FMC_D15"/>
-<wire x1="187.96" y1="172.72" x2="165.1" y2="172.72" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_L10P_T1_34"/>
+<wire x1="-86.36" y1="-2.54" x2="-55.88" y2="-2.54" width="0.1524" layer="91"/>
+<label x="-81.28" y="-2.54" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_D22" class="2">
+<net name="FPGA_FMC_D20" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="FMC_D22/PH14"/>
-<wire x1="294.64" y1="172.72" x2="266.7" y2="172.72" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_L10N_T1_34"/>
+<wire x1="-86.36" y1="-5.08" x2="-55.88" y2="-5.08" width="0.1524" layer="91"/>
+<label x="-81.28" y="-5.08" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_D23" class="2">
+<net name="FPGA_FMC_D21" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="FMC_D23/PH15"/>
-<wire x1="294.64" y1="175.26" x2="266.7" y2="175.26" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_L11P_T1_SRCC_34"/>
+<wire x1="-86.36" y1="-7.62" x2="-55.88" y2="-7.62" width="0.1524" layer="91"/>
+<label x="-81.28" y="-7.62" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_D24" class="2">
+<net name="FPGA_FMC_D22" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="FMC_D24/PI0"/>
-<wire x1="294.64" y1="177.8" x2="266.7" y2="177.8" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_L11N_T1_SRCC_34"/>
+<wire x1="-86.36" y1="-10.16" x2="-55.88" y2="-10.16" width="0.1524" layer="91"/>
+<label x="-81.28" y="-10.16" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_D25" class="2">
+<net name="FPGA_FMC_D23" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="FMC_D25/PI1"/>
-<wire x1="294.64" y1="180.34" x2="266.7" y2="180.34" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_L12P_T1_MRCC_34"/>
+<wire x1="-86.36" y1="-12.7" x2="-55.88" y2="-12.7" width="0.1524" layer="91"/>
+<label x="-81.28" y="-12.7" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_D26" class="2">
+<net name="FPGA_FMC_D24" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="FMC_D26/PI2"/>
-<wire x1="294.64" y1="182.88" x2="266.7" y2="182.88" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_L12N_T1_MRCC_34"/>
+<wire x1="-86.36" y1="-15.24" x2="-55.88" y2="-15.24" width="0.1524" layer="91"/>
+<label x="-81.28" y="-15.24" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_A12" class="3">
+<net name="FPGA_FMC_D25" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="PG2/FMC_A12"/>
-<wire x1="187.96" y1="124.46" x2="165.1" y2="124.46" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_L13P_T2_MRCC_34"/>
+<wire x1="-86.36" y1="-17.78" x2="-55.88" y2="-17.78" width="0.1524" layer="91"/>
+<label x="-81.28" y="-17.78" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_A13" class="3">
+<net name="FPGA_FMC_D26" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="PG3/FMC_A13"/>
-<wire x1="187.96" y1="121.92" x2="165.1" y2="121.92" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_L13N_T2_MRCC_34"/>
+<wire x1="-86.36" y1="-20.32" x2="-55.88" y2="-20.32" width="0.1524" layer="91"/>
+<label x="-81.28" y="-20.32" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_A14" class="3">
+<net name="FPGA_FMC_D27" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="PG4/FMC_A14"/>
-<wire x1="187.96" y1="119.38" x2="165.1" y2="119.38" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_L14P_T2_SRCC_34"/>
+<wire x1="-86.36" y1="-22.86" x2="-55.88" y2="-22.86" width="0.1524" layer="91"/>
+<label x="-81.28" y="-22.86" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_A16" class="3">
+<net name="FPGA_FMC_D28" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="PD11/FMC_A16"/>
-<wire x1="187.96" y1="170.18" x2="165.1" y2="170.18" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_L14N_T2_SRCC_34"/>
+<wire x1="-86.36" y1="-25.4" x2="-55.88" y2="-25.4" width="0.1524" layer="91"/>
+<label x="-81.28" y="-25.4" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_A17" class="3">
+<net name="FPGA_FMC_D29" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="PD12/FMC_A17"/>
-<wire x1="187.96" y1="167.64" x2="165.1" y2="167.64" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_L15P_T2_DQS_34"/>
+<wire x1="-86.36" y1="-27.94" x2="-55.88" y2="-27.94" width="0.1524" layer="91"/>
+<label x="-81.28" y="-27.94" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_A18" class="3">
+<net name="FPGA_FMC_D30" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="PD13/FMC_A18"/>
-<wire x1="187.96" y1="165.1" x2="165.1" y2="165.1" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_L15N_T2_DQS_34"/>
+<wire x1="-86.36" y1="-30.48" x2="-55.88" y2="-30.48" width="0.1524" layer="91"/>
+<label x="-81.28" y="-30.48" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_NL" class="0">
+<net name="FPGA_FMC_D31" class="0">
 <segment>
-<pinref part="U$1" gate="G$4" pin="FMC_NL/PB7"/>
-<wire x1="294.64" y1="0" x2="266.7" y2="0" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_L16P_T2_34"/>
+<wire x1="-86.36" y1="-33.02" x2="-55.88" y2="-33.02" width="0.1524" layer="91"/>
+<label x="-81.28" y="-33.02" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_D28" class="2">
+<net name="FPGA_FMC_NE1" class="0">
 <segment>
-<pinref part="U$1" gate="G$4" pin="FMC_D28/PI6"/>
-<wire x1="294.64" y1="27.94" x2="266.7" y2="27.94" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B34" pin="IO_L16N_T2_34"/>
+<wire x1="-86.36" y1="-35.56" x2="-60.96" y2="-35.56" width="0.1524" layer="91"/>
+<label x="-60.96" y="-35.56" size="1.778" layer="95" xref="yes"/>
+</segment>
+</net>
+<net name="FPGA_FMC_NL" class="0">
+<segment>
+<pinref part="U7" gate="B34" pin="IO_L17P_T2_34"/>
+<wire x1="-86.36" y1="-38.1" x2="-60.96" y2="-38.1" width="0.1524" layer="91"/>
+<label x="-60.96" y="-38.1" size="1.778" layer="95" xref="yes"/>
+</segment>
+</net>
+<net name="FPGA_FMC_NOE" class="0">
+<segment>
+<pinref part="U7" gate="B34" pin="IO_L17N_T2_34"/>
+<wire x1="-86.36" y1="-40.64" x2="-60.96" y2="-40.64" width="0.1524" layer="91"/>
+<label x="-60.96" y="-40.64" size="1.778" layer="95" xref="yes"/>
+</segment>
+</net>
+<net name="FPGA_FMC_NWAIT" class="0">
+<segment>
+<pinref part="U7" gate="B34" pin="IO_L18P_T2_34"/>
+<wire x1="-86.36" y1="-43.18" x2="-60.96" y2="-43.18" width="0.1524" layer="91"/>
+<label x="-60.96" y="-43.18" size="1.778" layer="95" xref="yes"/>
+</segment>
+</net>
+<net name="FPGA_FMC_NWE" class="0">
+<segment>
+<pinref part="U7" gate="B34" pin="IO_L18N_T2_34"/>
+<wire x1="-86.36" y1="-45.72" x2="-60.96" y2="-45.72" width="0.1524" layer="91"/>
+<label x="-60.96" y="-45.72" size="1.778" layer="95" xref="yes"/>
+</segment>
+</net>
+</nets>
+</sheet>
+<sheet>
+<description>Pavel 2-3</description>
+<plain>
+<text x="-27.94" y="83.82" size="1.778" layer="91">*) FPGA Power Subsystem -- AUX and I/O</text>
+<text x="58.42" y="58.42" size="1.778" layer="91">*) VCCAUX = 0.75V x (1 + 205 / 147) = 1.796V
+
+*) VCCO = 0.75V x (1 + 205 / 59) = 3.356
+
+*) Minimal load current is 2 mA:
+1.8V / 470 Ohm = ~4mA
+3.3V /  470 Ohm = ~7mA
+
+*) Light-load mode is enabled
+</text>
+</plain>
+<instances>
+<instance part="FRAME11" gate="G$1" x="-139.7" y="-83.82"/>
+<instance part="SUPPLY165" gate="GND" x="-73.66" y="15.24"/>
+<instance part="SUPPLY166" gate="GND" x="-63.5" y="15.24"/>
+<instance part="SUPPLY167" gate="GND" x="-93.98" y="15.24"/>
+<instance part="C87" gate="G$1" x="-119.38" y="55.88">
+<attribute name="DIELECTRIC" x="-119.38" y="55.88" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-119.38" y="55.88" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-119.38" y="55.88" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="SUPPLY168" gate="GND" x="-119.38" y="43.18"/>
+<instance part="R38" gate="G$1" x="-104.14" y="25.4" rot="R90">
+<attribute name="TOLERANCE" x="-104.14" y="25.4" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="SUPPLY169" gate="GND" x="-104.14" y="15.24"/>
+<instance part="R39" gate="G$1" x="-106.68" y="55.88" rot="R90">
+<attribute name="TOLERANCE" x="-106.68" y="55.88" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="R40" gate="G$1" x="-38.1" y="58.42" rot="R90">
+<attribute name="TOLERANCE" x="-38.1" y="58.42" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="R41" gate="G$1" x="-38.1" y="43.18" rot="R90">
+<attribute name="TOLERANCE" x="-38.1" y="43.18" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="U$5" gate="G$1" x="-68.58" y="48.26"/>
+<instance part="SUPPLY170" gate="GND" x="-38.1" y="33.02"/>
+<instance part="SUPPLY171" gate="GND" x="-20.32" y="33.02"/>
+<instance part="R42" gate="G$1" x="-7.62" y="45.72" rot="R90">
+<attribute name="TOLERANCE" x="-7.62" y="45.72" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="SUPPLY172" gate="GND" x="-7.62" y="33.02"/>
+<instance part="R43" gate="G$1" x="0" y="66.04"/>
+<instance part="SUPPLY173" gate="GND" x="-73.66" y="-66.04"/>
+<instance part="SUPPLY174" gate="GND" x="-63.5" y="-66.04"/>
+<instance part="SUPPLY175" gate="GND" x="-93.98" y="-66.04"/>
+<instance part="C91" gate="G$1" x="-119.38" y="-25.4">
+<attribute name="DIELECTRIC" x="-119.38" y="-25.4" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-119.38" y="-25.4" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-119.38" y="-25.4" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="SUPPLY176" gate="GND" x="-119.38" y="-38.1"/>
+<instance part="R44" gate="G$1" x="-104.14" y="-55.88" rot="R90">
+<attribute name="TOLERANCE" x="-104.14" y="-55.88" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="SUPPLY177" gate="GND" x="-104.14" y="-66.04"/>
+<instance part="R45" gate="G$1" x="-106.68" y="-25.4" rot="R90">
+<attribute name="TOLERANCE" x="-106.68" y="-25.4" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="R46" gate="G$1" x="-38.1" y="-22.86" rot="R90">
+<attribute name="TOLERANCE" x="-38.1" y="-22.86" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="R47" gate="G$1" x="-38.1" y="-38.1" rot="R90">
+<attribute name="TOLERANCE" x="-38.1" y="-38.1" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="U$6" gate="G$1" x="-68.58" y="-33.02"/>
+<instance part="SUPPLY178" gate="GND" x="-38.1" y="-48.26"/>
+<instance part="SUPPLY179" gate="GND" x="-20.32" y="-48.26"/>
+<instance part="R48" gate="G$1" x="-7.62" y="-35.56" rot="R90">
+<attribute name="TOLERANCE" x="-7.62" y="-35.56" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="SUPPLY180" gate="GND" x="-7.62" y="-48.26"/>
+<instance part="R49" gate="G$1" x="0" y="-15.24"/>
+<instance part="C115" gate="G$1" x="-93.98" y="25.4">
+<attribute name="RATED_VOLTAGE" x="-93.98" y="25.4" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-93.98" y="25.4" size="1.778" layer="96" display="off"/>
+<attribute name="DIELECTRIC" x="-93.98" y="25.4" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C116" gate="G$1" x="-93.98" y="-55.88">
+<attribute name="RATED_VOLTAGE" x="-93.98" y="-55.88" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-93.98" y="-55.88" size="1.778" layer="96" display="off"/>
+<attribute name="DIELECTRIC" x="-93.98" y="-55.88" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C131" gate="G$1" x="-30.48" y="-20.32">
+<attribute name="DIELECTRIC" x="-30.48" y="-20.32" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-30.48" y="-20.32" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-30.48" y="-20.32" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C132" gate="G$1" x="-30.48" y="60.96">
+<attribute name="DIELECTRIC" x="-30.48" y="60.96" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-30.48" y="60.96" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-30.48" y="60.96" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C174" gate="G$1" x="-20.32" y="48.26">
+<attribute name="DIELECTRIC" x="-20.32" y="48.26" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-20.32" y="48.26" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-20.32" y="48.26" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C175" gate="G$1" x="-20.32" y="-33.02">
+<attribute name="DIELECTRIC" x="-20.32" y="-33.02" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-20.32" y="-33.02" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-20.32" y="-33.02" size="1.778" layer="96" display="off"/>
+</instance>
+</instances>
+<busses>
+</busses>
+<nets>
+<net name="GND" class="1">
+<segment>
+<pinref part="SUPPLY165" gate="GND" pin="GND"/>
+<wire x1="-73.66" y1="17.78" x2="-73.66" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="U$5" gate="G$1" pin="AGND"/>
+</segment>
+<segment>
+<pinref part="SUPPLY166" gate="GND" pin="GND"/>
+<wire x1="-63.5" y1="17.78" x2="-63.5" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="U$5" gate="G$1" pin="PGND"/>
+</segment>
+<segment>
+<pinref part="SUPPLY167" gate="GND" pin="GND"/>
+<wire x1="-93.98" y1="20.32" x2="-93.98" y2="17.78" width="0.1524" layer="91"/>
+<pinref part="C115" gate="G$1" pin="2"/>
+</segment>
+<segment>
+<pinref part="C87" gate="G$1" pin="2"/>
+<pinref part="SUPPLY168" gate="GND" pin="GND"/>
+<wire x1="-119.38" y1="50.8" x2="-119.38" y2="45.72" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="SUPPLY169" gate="GND" pin="GND"/>
+<pinref part="R38" gate="G$1" pin="1"/>
+<wire x1="-104.14" y1="17.78" x2="-104.14" y2="20.32" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="SUPPLY170" gate="GND" pin="GND"/>
+<pinref part="R41" gate="G$1" pin="1"/>
+<wire x1="-38.1" y1="35.56" x2="-38.1" y2="38.1" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="SUPPLY171" gate="GND" pin="GND"/>
+<wire x1="-20.32" y1="35.56" x2="-20.32" y2="43.18" width="0.1524" layer="91"/>
+<pinref part="C174" gate="G$1" pin="2"/>
+</segment>
+<segment>
+<pinref part="SUPPLY172" gate="GND" pin="GND"/>
+<pinref part="R42" gate="G$1" pin="1"/>
+<wire x1="-7.62" y1="35.56" x2="-7.62" y2="40.64" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="SUPPLY173" gate="GND" pin="GND"/>
+<wire x1="-73.66" y1="-63.5" x2="-73.66" y2="-60.96" width="0.1524" layer="91"/>
+<pinref part="U$6" gate="G$1" pin="AGND"/>
+</segment>
+<segment>
+<pinref part="SUPPLY174" gate="GND" pin="GND"/>
+<wire x1="-63.5" y1="-63.5" x2="-63.5" y2="-60.96" width="0.1524" layer="91"/>
+<pinref part="U$6" gate="G$1" pin="PGND"/>
+</segment>
+<segment>
+<pinref part="SUPPLY175" gate="GND" pin="GND"/>
+<wire x1="-93.98" y1="-60.96" x2="-93.98" y2="-63.5" width="0.1524" layer="91"/>
+<pinref part="C116" gate="G$1" pin="2"/>
+</segment>
+<segment>
+<pinref part="C91" gate="G$1" pin="2"/>
+<pinref part="SUPPLY176" gate="GND" pin="GND"/>
+<wire x1="-119.38" y1="-30.48" x2="-119.38" y2="-35.56" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="SUPPLY177" gate="GND" pin="GND"/>
+<pinref part="R44" gate="G$1" pin="1"/>
+<wire x1="-104.14" y1="-63.5" x2="-104.14" y2="-60.96" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="SUPPLY178" gate="GND" pin="GND"/>
+<pinref part="R47" gate="G$1" pin="1"/>
+<wire x1="-38.1" y1="-45.72" x2="-38.1" y2="-43.18" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="SUPPLY179" gate="GND" pin="GND"/>
+<wire x1="-20.32" y1="-45.72" x2="-20.32" y2="-38.1" width="0.1524" layer="91"/>
+<pinref part="C175" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="FMC_D29" class="2">
 <segment>
-<pinref part="U$1" gate="G$4" pin="FMC_D29/PI7"/>
-<wire x1="266.7" y1="30.48" x2="294.64" y2="30.48" width="0.1524" layer="91"/>
+<pinref part="SUPPLY180" gate="GND" pin="GND"/>
+<pinref part="R48" gate="G$1" pin="1"/>
+<wire x1="-7.62" y1="-45.72" x2="-7.62" y2="-40.64" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="FMC_D27" class="2">
+<net name="FPGA_VCCAUX_1V8" class="0">
 <segment>
-<pinref part="U$1" gate="G$4" pin="PI3/FMC_D27"/>
-<wire x1="187.96" y1="35.56" x2="165.1" y2="35.56" width="0.1524" layer="91"/>
+<pinref part="R43" gate="G$1" pin="2"/>
+<wire x1="5.08" y1="66.04" x2="30.48" y2="66.04" width="0.1524" layer="91"/>
+<label x="7.62" y="66.04" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_D3" class="2">
+<net name="FPGA_VCCO_3V3" class="0">
 <segment>
-<pinref part="U$1" gate="G$4" pin="PD1/FMC_D3"/>
-<wire x1="187.96" y1="15.24" x2="165.1" y2="15.24" width="0.1524" layer="91"/>
+<pinref part="R49" gate="G$1" pin="2"/>
+<wire x1="5.08" y1="-15.24" x2="30.48" y2="-15.24" width="0.1524" layer="91"/>
+<label x="7.62" y="-15.24" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_NOE" class="0">
+<net name="N$35" class="0">
 <segment>
-<pinref part="U$1" gate="G$4" pin="PD4/FMC_NOE"/>
-<wire x1="187.96" y1="7.62" x2="165.1" y2="7.62" width="0.1524" layer="91"/>
+<wire x1="-93.98" y1="27.94" x2="-93.98" y2="30.48" width="0.1524" layer="91"/>
+<wire x1="-93.98" y1="30.48" x2="-88.9" y2="30.48" width="0.1524" layer="91"/>
+<pinref part="U$5" gate="G$1" pin="SS"/>
+<pinref part="C115" gate="G$1" pin="1"/>
 </segment>
 </net>
-<net name="FMC_NWE" class="0">
-<segment>
-<pinref part="U$1" gate="G$4" pin="PD5/FMC_NWE"/>
-<wire x1="187.96" y1="5.08" x2="165.1" y2="5.08" width="0.1524" layer="91"/>
+<net name="VCC_5V0" class="0">
+<segment>
+<wire x1="-88.9" y1="66.04" x2="-93.98" y2="66.04" width="0.1524" layer="91"/>
+<label x="-124.46" y="66.04" size="1.778" layer="95"/>
+<wire x1="-93.98" y1="66.04" x2="-106.68" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="66.04" x2="-119.38" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="-119.38" y1="66.04" x2="-124.46" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="-88.9" y1="60.96" x2="-93.98" y2="60.96" width="0.1524" layer="91"/>
+<wire x1="-93.98" y1="60.96" x2="-93.98" y2="66.04" width="0.1524" layer="91"/>
+<junction x="-93.98" y="66.04"/>
+<pinref part="C87" gate="G$1" pin="1"/>
+<wire x1="-119.38" y1="58.42" x2="-119.38" y2="66.04" width="0.1524" layer="91"/>
+<junction x="-119.38" y="66.04"/>
+<pinref part="R39" gate="G$1" pin="2"/>
+<wire x1="-106.68" y1="60.96" x2="-106.68" y2="66.04" width="0.1524" layer="91"/>
+<junction x="-106.68" y="66.04"/>
+<pinref part="U$5" gate="G$1" pin="PVIN"/>
+<pinref part="U$5" gate="G$1" pin="AVIN"/>
+</segment>
+<segment>
+<wire x1="-88.9" y1="-15.24" x2="-93.98" y2="-15.24" width="0.1524" layer="91"/>
+<label x="-124.46" y="-15.24" size="1.778" layer="95"/>
+<wire x1="-93.98" y1="-15.24" x2="-106.68" y2="-15.24" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="-15.24" x2="-119.38" y2="-15.24" width="0.1524" layer="91"/>
+<wire x1="-119.38" y1="-15.24" x2="-124.46" y2="-15.24" width="0.1524" layer="91"/>
+<wire x1="-88.9" y1="-20.32" x2="-93.98" y2="-20.32" width="0.1524" layer="91"/>
+<wire x1="-93.98" y1="-20.32" x2="-93.98" y2="-15.24" width="0.1524" layer="91"/>
+<junction x="-93.98" y="-15.24"/>
+<pinref part="C91" gate="G$1" pin="1"/>
+<wire x1="-119.38" y1="-22.86" x2="-119.38" y2="-15.24" width="0.1524" layer="91"/>
+<junction x="-119.38" y="-15.24"/>
+<pinref part="R45" gate="G$1" pin="2"/>
+<wire x1="-106.68" y1="-20.32" x2="-106.68" y2="-15.24" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-15.24"/>
+<pinref part="U$6" gate="G$1" pin="PVIN"/>
+<pinref part="U$6" gate="G$1" pin="AVIN"/>
 </segment>
 </net>
-<net name="FMC_NWAIT" class="0">
+<net name="PWR_ENA_VCCAUX" class="0">
 <segment>
-<pinref part="U$1" gate="G$4" pin="PD6/FMC_NWAIT"/>
-<wire x1="187.96" y1="-2.54" x2="165.1" y2="-2.54" width="0.1524" layer="91"/>
+<wire x1="-88.9" y1="55.88" x2="-99.06" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="-99.06" y1="55.88" x2="-99.06" y2="76.2" width="0.1524" layer="91"/>
+<wire x1="-99.06" y1="76.2" x2="-124.46" y2="76.2" width="0.1524" layer="91"/>
+<label x="-124.46" y="76.2" size="1.778" layer="95"/>
+<pinref part="U$5" gate="G$1" pin="ENABLE"/>
 </segment>
 </net>
-<net name="FMC_A19" class="3">
+<net name="N$36" class="0">
 <segment>
-<pinref part="U$1" gate="G$1" pin="PE3/FMC_A19"/>
-<wire x1="15.24" y1="182.88" x2="-7.62" y2="182.88" width="0.1524" layer="91"/>
+<pinref part="R38" gate="G$1" pin="2"/>
+<wire x1="-104.14" y1="30.48" x2="-104.14" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="-104.14" y1="40.64" x2="-88.9" y2="40.64" width="0.1524" layer="91"/>
+<pinref part="U$5" gate="G$1" pin="RLLM"/>
 </segment>
 </net>
-<net name="FMC_A20" class="0">
+<net name="N$37" class="0">
 <segment>
-<pinref part="U$1" gate="G$1" pin="PE4/FMC_A20"/>
-<wire x1="15.24" y1="180.34" x2="7.62" y2="180.34" width="0.1524" layer="91"/>
+<wire x1="-88.9" y1="45.72" x2="-106.68" y2="45.72" width="0.1524" layer="91"/>
+<pinref part="R39" gate="G$1" pin="1"/>
+<wire x1="-106.68" y1="45.72" x2="-106.68" y2="50.8" width="0.1524" layer="91"/>
+<pinref part="U$5" gate="G$1" pin="LLM/SYNC"/>
 </segment>
 </net>
-<net name="FMC_A21" class="0">
-<segment>
-<pinref part="U$1" gate="G$1" pin="PE5/FMC_A21"/>
-<wire x1="15.24" y1="177.8" x2="7.62" y2="177.8" width="0.1524" layer="91"/>
+<net name="N$38" class="0">
+<segment>
+<pinref part="U$5" gate="G$1" pin="VOUT"/>
+<wire x1="-48.26" y1="66.04" x2="-38.1" y2="66.04" width="0.1524" layer="91"/>
+<pinref part="R40" gate="G$1" pin="2"/>
+<wire x1="-38.1" y1="66.04" x2="-38.1" y2="63.5" width="0.1524" layer="91"/>
+<wire x1="-30.48" y1="63.5" x2="-30.48" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="-30.48" y1="66.04" x2="-38.1" y2="66.04" width="0.1524" layer="91"/>
+<junction x="-38.1" y="66.04"/>
+<wire x1="-20.32" y1="50.8" x2="-20.32" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="-20.32" y1="66.04" x2="-30.48" y2="66.04" width="0.1524" layer="91"/>
+<junction x="-30.48" y="66.04"/>
+<pinref part="R42" gate="G$1" pin="2"/>
+<wire x1="-7.62" y1="50.8" x2="-7.62" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="-7.62" y1="66.04" x2="-20.32" y2="66.04" width="0.1524" layer="91"/>
+<junction x="-20.32" y="66.04"/>
+<pinref part="R43" gate="G$1" pin="1"/>
+<wire x1="-5.08" y1="66.04" x2="-7.62" y2="66.04" width="0.1524" layer="91"/>
+<junction x="-7.62" y="66.04"/>
+<pinref part="C132" gate="G$1" pin="1"/>
+<pinref part="C174" gate="G$1" pin="1"/>
 </segment>
 </net>
-<net name="FMC_D30" class="2">
-<segment>
-<pinref part="U$1" gate="G$1" pin="PI9/FMC_D30"/>
-<wire x1="15.24" y1="160.02" x2="-7.62" y2="160.02" width="0.1524" layer="91"/>
+<net name="N$39" class="0">
+<segment>
+<pinref part="R40" gate="G$1" pin="1"/>
+<wire x1="-38.1" y1="53.34" x2="-38.1" y2="50.8" width="0.1524" layer="91"/>
+<pinref part="U$5" gate="G$1" pin="VFB"/>
+<wire x1="-38.1" y1="50.8" x2="-48.26" y2="50.8" width="0.1524" layer="91"/>
+<wire x1="-30.48" y1="55.88" x2="-30.48" y2="50.8" width="0.1524" layer="91"/>
+<wire x1="-30.48" y1="50.8" x2="-38.1" y2="50.8" width="0.1524" layer="91"/>
+<junction x="-38.1" y="50.8"/>
+<pinref part="R41" gate="G$1" pin="2"/>
+<wire x1="-38.1" y1="48.26" x2="-38.1" y2="50.8" width="0.1524" layer="91"/>
+<pinref part="C132" gate="G$1" pin="2"/>
 </segment>
 </net>
-<net name="FMC_D31" class="2">
+<net name="N$40" class="0">
 <segment>
-<pinref part="U$1" gate="G$1" pin="PI10/FMC_D31"/>
-<wire x1="15.24" y1="157.48" x2="-7.62" y2="157.48" width="0.1524" layer="91"/>
+<wire x1="-93.98" y1="-53.34" x2="-93.98" y2="-50.8" width="0.1524" layer="91"/>
+<wire x1="-93.98" y1="-50.8" x2="-88.9" y2="-50.8" width="0.1524" layer="91"/>
+<pinref part="U$6" gate="G$1" pin="SS"/>
+<pinref part="C116" gate="G$1" pin="1"/>
 </segment>
 </net>
-<net name="FMC_A0" class="3">
+<net name="N$41" class="0">
 <segment>
-<pinref part="U$1" gate="G$1" pin="PF0/FMC_A0"/>
-<wire x1="15.24" y1="147.32" x2="-7.62" y2="147.32" width="0.1524" layer="91"/>
+<pinref part="R44" gate="G$1" pin="2"/>
+<wire x1="-104.14" y1="-50.8" x2="-104.14" y2="-40.64" width="0.1524" layer="91"/>
+<wire x1="-104.14" y1="-40.64" x2="-88.9" y2="-40.64" width="0.1524" layer="91"/>
+<pinref part="U$6" gate="G$1" pin="RLLM"/>
 </segment>
 </net>
-<net name="FMC_A1" class="3">
+<net name="N$42" class="0">
 <segment>
-<pinref part="U$1" gate="G$1" pin="PF1/FMC_A1"/>
-<wire x1="15.24" y1="144.78" x2="-7.62" y2="144.78" width="0.1524" layer="91"/>
+<wire x1="-88.9" y1="-35.56" x2="-106.68" y2="-35.56" width="0.1524" layer="91"/>
+<pinref part="R45" gate="G$1" pin="1"/>
+<wire x1="-106.68" y1="-35.56" x2="-106.68" y2="-30.48" width="0.1524" layer="91"/>
+<pinref part="U$6" gate="G$1" pin="LLM/SYNC"/>
 </segment>
 </net>
-<net name="FMC_A2" class="3">
-<segment>
-<pinref part="U$1" gate="G$1" pin="PF2/FMC_A2"/>
-<wire x1="15.24" y1="142.24" x2="-7.62" y2="142.24" width="0.1524" layer="91"/>
+<net name="N$43" class="0">
+<segment>
+<pinref part="U$6" gate="G$1" pin="VOUT"/>
+<wire x1="-48.26" y1="-15.24" x2="-38.1" y2="-15.24" width="0.1524" layer="91"/>
+<pinref part="R46" gate="G$1" pin="2"/>
+<wire x1="-38.1" y1="-15.24" x2="-38.1" y2="-17.78" width="0.1524" layer="91"/>
+<wire x1="-30.48" y1="-17.78" x2="-30.48" y2="-15.24" width="0.1524" layer="91"/>
+<wire x1="-30.48" y1="-15.24" x2="-38.1" y2="-15.24" width="0.1524" layer="91"/>
+<junction x="-38.1" y="-15.24"/>
+<wire x1="-20.32" y1="-30.48" x2="-20.32" y2="-15.24" width="0.1524" layer="91"/>
+<wire x1="-20.32" y1="-15.24" x2="-30.48" y2="-15.24" width="0.1524" layer="91"/>
+<junction x="-30.48" y="-15.24"/>
+<pinref part="R48" gate="G$1" pin="2"/>
+<wire x1="-7.62" y1="-30.48" x2="-7.62" y2="-15.24" width="0.1524" layer="91"/>
+<wire x1="-7.62" y1="-15.24" x2="-20.32" y2="-15.24" width="0.1524" layer="91"/>
+<junction x="-20.32" y="-15.24"/>
+<pinref part="R49" gate="G$1" pin="1"/>
+<wire x1="-5.08" y1="-15.24" x2="-7.62" y2="-15.24" width="0.1524" layer="91"/>
+<junction x="-7.62" y="-15.24"/>
+<pinref part="C131" gate="G$1" pin="1"/>
+<pinref part="C175" gate="G$1" pin="1"/>
 </segment>
 </net>
-<net name="FMC_A3" class="3">
-<segment>
-<pinref part="U$1" gate="G$1" pin="PF3/FMC_A3"/>
-<wire x1="15.24" y1="132.08" x2="-7.62" y2="132.08" width="0.1524" layer="91"/>
+<net name="N$44" class="0">
+<segment>
+<pinref part="R46" gate="G$1" pin="1"/>
+<wire x1="-38.1" y1="-27.94" x2="-38.1" y2="-30.48" width="0.1524" layer="91"/>
+<pinref part="U$6" gate="G$1" pin="VFB"/>
+<wire x1="-38.1" y1="-30.48" x2="-48.26" y2="-30.48" width="0.1524" layer="91"/>
+<wire x1="-30.48" y1="-25.4" x2="-30.48" y2="-30.48" width="0.1524" layer="91"/>
+<wire x1="-30.48" y1="-30.48" x2="-38.1" y2="-30.48" width="0.1524" layer="91"/>
+<junction x="-38.1" y="-30.48"/>
+<pinref part="R47" gate="G$1" pin="2"/>
+<wire x1="-38.1" y1="-33.02" x2="-38.1" y2="-30.48" width="0.1524" layer="91"/>
+<pinref part="C131" gate="G$1" pin="2"/>
 </segment>
 </net>
-<net name="FMC_A4" class="3">
+<net name="PWR_ENA_VCCO" class="0">
 <segment>
-<pinref part="U$1" gate="G$1" pin="PF4/FMC_A4"/>
-<wire x1="15.24" y1="129.54" x2="-7.62" y2="129.54" width="0.1524" layer="91"/>
+<wire x1="-88.9" y1="-25.4" x2="-99.06" y2="-25.4" width="0.1524" layer="91"/>
+<wire x1="-99.06" y1="-25.4" x2="-99.06" y2="-5.08" width="0.1524" layer="91"/>
+<wire x1="-99.06" y1="-5.08" x2="-124.46" y2="-5.08" width="0.1524" layer="91"/>
+<label x="-124.46" y="-5.08" size="1.778" layer="95"/>
+<pinref part="U$6" gate="G$1" pin="ENABLE"/>
 </segment>
 </net>
-<net name="FMC_A5" class="3">
+<net name="POK_VCCAUX" class="0">
 <segment>
-<pinref part="U$1" gate="G$1" pin="PF5/FMC_A5"/>
-<wire x1="15.24" y1="127" x2="-7.62" y2="127" width="0.1524" layer="91"/>
+<pinref part="U$5" gate="G$1" pin="POK"/>
+<wire x1="-48.26" y1="30.48" x2="-45.72" y2="30.48" width="0.1524" layer="91"/>
+<wire x1="-45.72" y1="30.48" x2="-45.72" y2="45.72" width="0.1524" layer="91"/>
+<label x="-45.72" y="33.02" size="1.778" layer="95" rot="R90"/>
 </segment>
 </net>
-<net name="FMC_A6" class="3">
+<net name="POK_VCCO" class="0">
 <segment>
-<pinref part="U$1" gate="G$2" pin="PF12/FMC_A6"/>
-<wire x1="15.24" y1="-7.62" x2="-7.62" y2="-7.62" width="0.1524" layer="91"/>
+<pinref part="U$6" gate="G$1" pin="POK"/>
+<wire x1="-48.26" y1="-50.8" x2="-45.72" y2="-50.8" width="0.1524" layer="91"/>
+<wire x1="-45.72" y1="-50.8" x2="-45.72" y2="-35.56" width="0.1524" layer="91"/>
+<label x="-45.72" y="-48.26" size="1.778" layer="95" rot="R90"/>
 </segment>
 </net>
-<net name="FMC_A7" class="3">
+</nets>
+</sheet>
+<sheet>
+<description>Pavel 3-1</description>
+<plain>
+<text x="-81.28" y="96.52" size="1.778" layer="91">*) Upper Right Bank</text>
+<text x="-55.88" y="5.08" size="1.778" layer="91">*) FPGA_GCLK signal _MUST_ go into either D17 or C18
+(i.e. into one of the two positive (master) sides
+of the two available MRCC differential pairs)</text>
+<text x="-55.88" y="0" size="1.778" layer="91">*) FPGA_GPIO_* and FPGA_IRQ_N_* signals can be swapped</text>
+<text x="83.82" y="99.06" size="1.778" layer="91">*) Signals, that are allowed to be swapped, can be be swapped
+with each other and/or moved to different pins within their bank.</text>
+</plain>
+<instances>
+<instance part="U7" gate="B16" x="-63.5" y="20.32"/>
+<instance part="FRAME14" gate="G$1" x="-99.06" y="-68.58"/>
+<instance part="SV1" gate="G$1" x="116.84" y="73.66" rot="R180"/>
+<instance part="SUPPLY153" gate="GND" x="76.2" y="55.88"/>
+<instance part="SUPPLY154" gate="GND" x="106.68" y="55.88"/>
+<instance part="SUPPLY155" gate="GND" x="127" y="55.88"/>
+<instance part="SV2" gate="G$1" x="116.84" y="30.48" rot="R180"/>
+<instance part="SUPPLY156" gate="GND" x="76.2" y="12.7"/>
+<instance part="SUPPLY157" gate="GND" x="106.68" y="12.7"/>
+<instance part="SUPPLY158" gate="GND" x="127" y="12.7"/>
+<instance part="C135" gate="G$1" x="76.2" y="71.12">
+<attribute name="DIELECTRIC" x="76.2" y="71.12" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="76.2" y="71.12" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="76.2" y="71.12" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C136" gate="G$1" x="76.2" y="27.94">
+<attribute name="DIELECTRIC" x="76.2" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="76.2" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="76.2" y="27.94" size="1.778" layer="96" display="off"/>
+</instance>
+</instances>
+<busses>
+</busses>
+<nets>
+<net name="GND" class="1">
 <segment>
-<pinref part="U$1" gate="G$2" pin="PF13/FMC_A7"/>
-<wire x1="15.24" y1="-15.24" x2="-7.62" y2="-15.24" width="0.1524" layer="91"/>
+<pinref part="SUPPLY153" gate="GND" pin="GND"/>
+<wire x1="76.2" y1="58.42" x2="76.2" y2="66.04" width="0.1524" layer="91"/>
+<pinref part="C135" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="FMC_A8" class="3">
 <segment>
-<pinref part="U$1" gate="G$2" pin="PF14/FMC_A8"/>
-<wire x1="15.24" y1="-17.78" x2="-7.62" y2="-17.78" width="0.1524" layer="91"/>
+<pinref part="SUPPLY154" gate="GND" pin="GND"/>
+<wire x1="106.68" y1="58.42" x2="106.68" y2="68.58" width="0.1524" layer="91"/>
+<pinref part="SV1" gate="G$1" pin="11"/>
+<wire x1="106.68" y1="68.58" x2="109.22" y2="68.58" width="0.1524" layer="91"/>
+<pinref part="SV1" gate="G$1" pin="5"/>
+<wire x1="109.22" y1="76.2" x2="106.68" y2="76.2" width="0.1524" layer="91"/>
+<wire x1="106.68" y1="76.2" x2="106.68" y2="68.58" width="0.1524" layer="91"/>
+<junction x="106.68" y="68.58"/>
 </segment>
-</net>
-<net name="FMC_A9" class="3">
 <segment>
-<pinref part="U$1" gate="G$2" pin="PF15/FMC_A9"/>
-<wire x1="15.24" y1="-20.32" x2="-7.62" y2="-20.32" width="0.1524" layer="91"/>
+<pinref part="SV1" gate="G$1" pin="12"/>
+<wire x1="124.46" y1="68.58" x2="127" y2="68.58" width="0.1524" layer="91"/>
+<pinref part="SUPPLY155" gate="GND" pin="GND"/>
+<wire x1="127" y1="68.58" x2="127" y2="58.42" width="0.1524" layer="91"/>
+<pinref part="SV1" gate="G$1" pin="6"/>
+<wire x1="124.46" y1="76.2" x2="127" y2="76.2" width="0.1524" layer="91"/>
+<wire x1="127" y1="76.2" x2="127" y2="68.58" width="0.1524" layer="91"/>
+<junction x="127" y="68.58"/>
 </segment>
-</net>
-<net name="FMC_A10" class="3">
 <segment>
-<pinref part="U$1" gate="G$2" pin="PG0/FMC_A10"/>
-<wire x1="15.24" y1="-22.86" x2="-7.62" y2="-22.86" width="0.1524" layer="91"/>
+<pinref part="SUPPLY156" gate="GND" pin="GND"/>
+<wire x1="76.2" y1="15.24" x2="76.2" y2="22.86" width="0.1524" layer="91"/>
+<pinref part="C136" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="FMC_A11" class="3">
 <segment>
-<pinref part="U$1" gate="G$2" pin="PG1/FMC_A11"/>
-<wire x1="15.24" y1="-25.4" x2="-7.62" y2="-25.4" width="0.1524" layer="91"/>
+<pinref part="SUPPLY157" gate="GND" pin="GND"/>
+<wire x1="106.68" y1="15.24" x2="106.68" y2="25.4" width="0.1524" layer="91"/>
+<pinref part="SV2" gate="G$1" pin="11"/>
+<wire x1="106.68" y1="25.4" x2="109.22" y2="25.4" width="0.1524" layer="91"/>
+<pinref part="SV2" gate="G$1" pin="5"/>
+<wire x1="109.22" y1="33.02" x2="106.68" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="106.68" y1="33.02" x2="106.68" y2="25.4" width="0.1524" layer="91"/>
+<junction x="106.68" y="25.4"/>
 </segment>
-</net>
-<net name="FMC_D4" class="2">
 <segment>
-<pinref part="U$1" gate="G$2" pin="PE7/FMC_D4"/>
-<wire x1="15.24" y1="-27.94" x2="-7.62" y2="-27.94" width="0.1524" layer="91"/>
+<pinref part="SV2" gate="G$1" pin="12"/>
+<wire x1="124.46" y1="25.4" x2="127" y2="25.4" width="0.1524" layer="91"/>
+<pinref part="SUPPLY158" gate="GND" pin="GND"/>
+<wire x1="127" y1="25.4" x2="127" y2="15.24" width="0.1524" layer="91"/>
+<pinref part="SV2" gate="G$1" pin="6"/>
+<wire x1="124.46" y1="33.02" x2="127" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="127" y1="33.02" x2="127" y2="25.4" width="0.1524" layer="91"/>
+<junction x="127" y="25.4"/>
 </segment>
 </net>
-<net name="FMC_D20" class="2">
-<segment>
-<pinref part="U$1" gate="G$2" pin="FMC_D20/PH12"/>
-<wire x1="93.98" y1="30.48" x2="116.84" y2="30.48" width="0.1524" layer="91"/>
+<net name="FPGA_VCCO_3V3" class="0">
+<segment>
+<wire x1="-58.42" y1="88.9" x2="-53.34" y2="88.9" width="0.1524" layer="91"/>
+<wire x1="-53.34" y1="88.9" x2="-53.34" y2="86.36" width="0.1524" layer="91"/>
+<wire x1="-53.34" y1="86.36" x2="-53.34" y2="83.82" width="0.1524" layer="91"/>
+<wire x1="-53.34" y1="83.82" x2="-53.34" y2="81.28" width="0.1524" layer="91"/>
+<wire x1="-53.34" y1="81.28" x2="-53.34" y2="78.74" width="0.1524" layer="91"/>
+<wire x1="-53.34" y1="78.74" x2="-58.42" y2="78.74" width="0.1524" layer="91"/>
+<wire x1="-58.42" y1="81.28" x2="-53.34" y2="81.28" width="0.1524" layer="91"/>
+<junction x="-53.34" y="81.28"/>
+<wire x1="-58.42" y1="83.82" x2="-53.34" y2="83.82" width="0.1524" layer="91"/>
+<junction x="-53.34" y="83.82"/>
+<wire x1="-58.42" y1="86.36" x2="-53.34" y2="86.36" width="0.1524" layer="91"/>
+<junction x="-53.34" y="86.36"/>
+<junction x="-53.34" y="88.9"/>
+<wire x1="-53.34" y1="88.9" x2="-27.94" y2="88.9" width="0.1524" layer="91"/>
+<label x="-50.8" y="88.9" size="1.778" layer="95"/>
+<pinref part="U7" gate="B16" pin="VCCO_16 at 5"/>
+<wire x1="-58.42" y1="76.2" x2="-53.34" y2="76.2" width="0.1524" layer="91"/>
+<wire x1="-53.34" y1="76.2" x2="-53.34" y2="78.74" width="0.1524" layer="91"/>
+<junction x="-53.34" y="78.74"/>
+<pinref part="U7" gate="B16" pin="VCCO_16 at 4"/>
+<pinref part="U7" gate="B16" pin="VCCO_16 at 3"/>
+<pinref part="U7" gate="B16" pin="VCCO_16 at 2"/>
+<pinref part="U7" gate="B16" pin="VCCO_16 at 1"/>
+<pinref part="U7" gate="B16" pin="VCCO_16 at 0"/>
+</segment>
+<segment>
+<label x="71.12" y="86.36" size="1.778" layer="95"/>
+<wire x1="106.68" y1="86.36" x2="76.2" y2="86.36" width="0.1524" layer="91"/>
+<wire x1="76.2" y1="86.36" x2="71.12" y2="86.36" width="0.1524" layer="91"/>
+<wire x1="76.2" y1="73.66" x2="76.2" y2="86.36" width="0.1524" layer="91"/>
+<junction x="76.2" y="86.36"/>
+<pinref part="SV1" gate="G$1" pin="3"/>
+<wire x1="109.22" y1="78.74" x2="106.68" y2="78.74" width="0.1524" layer="91"/>
+<wire x1="106.68" y1="78.74" x2="106.68" y2="81.28" width="0.1524" layer="91"/>
+<junction x="106.68" y="86.36"/>
+<pinref part="SV1" gate="G$1" pin="2"/>
+<wire x1="106.68" y1="81.28" x2="106.68" y2="86.36" width="0.1524" layer="91"/>
+<wire x1="124.46" y1="81.28" x2="127" y2="81.28" width="0.1524" layer="91"/>
+<wire x1="127" y1="81.28" x2="127" y2="86.36" width="0.1524" layer="91"/>
+<wire x1="127" y1="86.36" x2="106.68" y2="86.36" width="0.1524" layer="91"/>
+<pinref part="SV1" gate="G$1" pin="4"/>
+<wire x1="124.46" y1="78.74" x2="127" y2="78.74" width="0.1524" layer="91"/>
+<wire x1="127" y1="78.74" x2="127" y2="81.28" width="0.1524" layer="91"/>
+<junction x="127" y="81.28"/>
+<pinref part="SV1" gate="G$1" pin="1"/>
+<wire x1="109.22" y1="81.28" x2="106.68" y2="81.28" width="0.1524" layer="91"/>
+<junction x="106.68" y="81.28"/>
+<pinref part="C135" gate="G$1" pin="1"/>
+</segment>
+<segment>
+<label x="71.12" y="43.18" size="1.778" layer="95"/>
+<wire x1="106.68" y1="43.18" x2="76.2" y2="43.18" width="0.1524" layer="91"/>
+<wire x1="76.2" y1="43.18" x2="71.12" y2="43.18" width="0.1524" layer="91"/>
+<wire x1="76.2" y1="30.48" x2="76.2" y2="43.18" width="0.1524" layer="91"/>
+<junction x="76.2" y="43.18"/>
+<pinref part="SV2" gate="G$1" pin="3"/>
+<wire x1="109.22" y1="35.56" x2="106.68" y2="35.56" width="0.1524" layer="91"/>
+<wire x1="106.68" y1="35.56" x2="106.68" y2="38.1" width="0.1524" layer="91"/>
+<junction x="106.68" y="43.18"/>
+<pinref part="SV2" gate="G$1" pin="2"/>
+<wire x1="106.68" y1="38.1" x2="106.68" y2="43.18" width="0.1524" layer="91"/>
+<wire x1="124.46" y1="38.1" x2="127" y2="38.1" width="0.1524" layer="91"/>
+<wire x1="127" y1="38.1" x2="127" y2="43.18" width="0.1524" layer="91"/>
+<wire x1="127" y1="43.18" x2="106.68" y2="43.18" width="0.1524" layer="91"/>
+<pinref part="SV2" gate="G$1" pin="4"/>
+<wire x1="124.46" y1="35.56" x2="127" y2="35.56" width="0.1524" layer="91"/>
+<wire x1="127" y1="35.56" x2="127" y2="38.1" width="0.1524" layer="91"/>
+<junction x="127" y="38.1"/>
+<pinref part="SV2" gate="G$1" pin="1"/>
+<wire x1="109.22" y1="38.1" x2="106.68" y2="38.1" width="0.1524" layer="91"/>
+<junction x="106.68" y="38.1"/>
+<pinref part="C136" gate="G$1" pin="1"/>
 </segment>
 </net>
-<net name="FMC_D19" class="2">
+<net name="FPGA_GPIO_TAMPER_0" class="0">
 <segment>
-<pinref part="U$1" gate="G$2" pin="FMC_D19/PH11"/>
-<wire x1="93.98" y1="27.94" x2="116.84" y2="27.94" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B16" pin="IO_0_16"/>
+<wire x1="-58.42" y1="73.66" x2="-27.94" y2="73.66" width="0.1524" layer="91"/>
+<label x="-27.94" y="73.66" size="1.778" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="FMC_D18" class="2">
+<net name="FPGA_GPIO_TAMPER_1" class="0">
 <segment>
-<pinref part="U$1" gate="G$2" pin="FMC_D18/PH10"/>
-<wire x1="93.98" y1="25.4" x2="116.84" y2="25.4" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B16" pin="IO_L1P_T0_16"/>
+<wire x1="-58.42" y1="71.12" x2="-27.94" y2="71.12" width="0.1524" layer="91"/>
+<label x="-27.94" y="71.12" size="1.778" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="FMC_D17" class="2">
+<net name="FPGA_IRQ_N_0" class="0">
 <segment>
-<pinref part="U$1" gate="G$2" pin="FMC_D17/PH9"/>
-<wire x1="93.98" y1="22.86" x2="116.84" y2="22.86" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B16" pin="IO_L1N_T0_16"/>
+<wire x1="-58.42" y1="68.58" x2="-27.94" y2="68.58" width="0.1524" layer="91"/>
+<label x="-27.94" y="68.58" size="1.778" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="FMC_D16" class="2">
+<net name="FPGA_IRQ_N_1" class="0">
 <segment>
-<pinref part="U$1" gate="G$2" pin="FMC_D16/PH8"/>
-<wire x1="93.98" y1="20.32" x2="116.84" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B16" pin="IO_L2P_T0_16"/>
+<wire x1="-58.42" y1="66.04" x2="-27.94" y2="66.04" width="0.1524" layer="91"/>
+<label x="-27.94" y="66.04" size="1.778" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="FMC_D12" class="2">
+<net name="FPGA_IRQ_N_2" class="0">
 <segment>
-<pinref part="U$1" gate="G$2" pin="FMC_D12/PE15"/>
-<wire x1="93.98" y1="-2.54" x2="116.84" y2="-2.54" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B16" pin="IO_L2N_T0_16"/>
+<wire x1="-58.42" y1="63.5" x2="-27.94" y2="63.5" width="0.1524" layer="91"/>
+<label x="-27.94" y="63.5" size="1.778" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="FMC_D11" class="2">
+<net name="FPGA_IRQ_N_3" class="0">
 <segment>
-<pinref part="U$1" gate="G$2" pin="FMC_D11/PE14"/>
-<wire x1="93.98" y1="-5.08" x2="116.84" y2="-5.08" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B16" pin="IO_L3P_T0_DQS_16"/>
+<wire x1="-58.42" y1="60.96" x2="-27.94" y2="60.96" width="0.1524" layer="91"/>
+<label x="-27.94" y="60.96" size="1.778" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="FMC_D10" class="2">
+<net name="FPGA_GPIO_A_0" class="0">
 <segment>
-<pinref part="U$1" gate="G$2" pin="FMC_D10/PE13"/>
-<wire x1="93.98" y1="-7.62" x2="116.84" y2="-7.62" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B16" pin="IO_L3N_T0_DQS_16"/>
+<wire x1="-58.42" y1="58.42" x2="-27.94" y2="58.42" width="0.1524" layer="91"/>
+<label x="-53.34" y="58.42" size="1.778" layer="95"/>
 </segment>
-</net>
-<net name="FMC_D9" class="2">
 <segment>
-<pinref part="U$1" gate="G$2" pin="FMC_D9/PE12"/>
-<wire x1="93.98" y1="-10.16" x2="116.84" y2="-10.16" width="0.1524" layer="91"/>
+<pinref part="SV1" gate="G$1" pin="7"/>
+<wire x1="109.22" y1="73.66" x2="86.36" y2="73.66" width="0.1524" layer="91"/>
+<label x="86.36" y="73.66" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_D8" class="2">
+<net name="FPGA_GPIO_A_1" class="0">
 <segment>
-<pinref part="U$1" gate="G$2" pin="FMC_D8/PE11"/>
-<wire x1="93.98" y1="-12.7" x2="116.84" y2="-12.7" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B16" pin="IO_L4P_T0_16"/>
+<wire x1="-58.42" y1="55.88" x2="-27.94" y2="55.88" width="0.1524" layer="91"/>
+<label x="-53.34" y="55.88" size="1.778" layer="95"/>
 </segment>
-</net>
-<net name="FMC_D7" class="2">
 <segment>
-<pinref part="U$1" gate="G$2" pin="FMC_D7/PE10"/>
-<wire x1="93.98" y1="-15.24" x2="116.84" y2="-15.24" width="0.1524" layer="91"/>
+<pinref part="SV1" gate="G$1" pin="8"/>
+<wire x1="124.46" y1="73.66" x2="147.32" y2="73.66" width="0.1524" layer="91"/>
+<label x="129.54" y="73.66" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_D6" class="2">
+<net name="FPGA_GPIO_A_2" class="0">
 <segment>
-<pinref part="U$1" gate="G$2" pin="FMC_D6/PE9"/>
-<wire x1="93.98" y1="-22.86" x2="116.84" y2="-22.86" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B16" pin="IO_L4N_T0_16"/>
+<wire x1="-58.42" y1="53.34" x2="-27.94" y2="53.34" width="0.1524" layer="91"/>
+<label x="-53.34" y="53.34" size="1.778" layer="95"/>
 </segment>
-</net>
-<net name="FMC_D5" class="2">
 <segment>
-<pinref part="U$1" gate="G$2" pin="FMC_D5/PE8"/>
-<wire x1="93.98" y1="-25.4" x2="116.84" y2="-25.4" width="0.1524" layer="91"/>
+<pinref part="SV1" gate="G$1" pin="9"/>
+<wire x1="109.22" y1="71.12" x2="86.36" y2="71.12" width="0.1524" layer="91"/>
+<label x="86.36" y="71.12" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_D21" class="2">
+<net name="FPGA_GPIO_A_3" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="FMC_D21/PH13"/>
-<wire x1="266.7" y1="170.18" x2="294.64" y2="170.18" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B16" pin="IO_L5P_T0_16"/>
+<wire x1="-58.42" y1="50.8" x2="-27.94" y2="50.8" width="0.1524" layer="91"/>
+<label x="-53.34" y="50.8" size="1.778" layer="95"/>
 </segment>
-</net>
-<net name="FMC_A15" class="3">
 <segment>
-<pinref part="U$1" gate="G$3" pin="FMC_A15/PG5"/>
-<wire x1="266.7" y1="119.38" x2="294.64" y2="119.38" width="0.1524" layer="91"/>
+<pinref part="SV1" gate="G$1" pin="10"/>
+<wire x1="124.46" y1="71.12" x2="147.32" y2="71.12" width="0.1524" layer="91"/>
+<label x="129.54" y="71.12" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FMC_D2" class="2">
+<net name="FPGA_GPIO_A_4" class="0">
 <segment>
-<pinref part="U$1" gate="G$4" pin="PD0/FMC_D2"/>
-<wire x1="187.96" y1="17.78" x2="165.1" y2="17.78" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B16" pin="IO_L5N_T0_16"/>
+<wire x1="-58.42" y1="48.26" x2="-27.94" y2="48.26" width="0.1524" layer="91"/>
+<label x="-53.34" y="48.26" size="1.778" layer="95"/>
 </segment>
-</net>
-<net name="FMC_NE1" class="0">
 <segment>
-<pinref part="U$1" gate="G$4" pin="PD7/FMC_NE1/FMC_NCE2"/>
-<wire x1="187.96" y1="-5.08" x2="165.1" y2="-5.08" width="0.1524" layer="91"/>
+<pinref part="SV1" gate="G$1" pin="13"/>
+<wire x1="109.22" y1="66.04" x2="86.36" y2="66.04" width="0.1524" layer="91"/>
+<label x="86.36" y="66.04" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="OSC_OUT" class="0">
+<net name="FPGA_GPIO_A_5" class="0">
 <segment>
-<pinref part="Q1" gate="G$1" pin="2"/>
-<wire x1="370.84" y1="48.26" x2="370.84" y2="43.18" width="0.1524" layer="91"/>
-<pinref part="C14" gate="G$1" pin="2"/>
-<wire x1="370.84" y1="43.18" x2="370.84" y2="15.24" width="0.1524" layer="91"/>
-<wire x1="370.84" y1="43.18" x2="378.46" y2="43.18" width="0.1524" layer="91"/>
-<junction x="370.84" y="43.18"/>
-<label x="373.38" y="15.24" size="1.778" layer="95" rot="R90"/>
+<pinref part="U7" gate="B16" pin="IO_L6P_T0_16"/>
+<wire x1="-58.42" y1="45.72" x2="-27.94" y2="45.72" width="0.1524" layer="91"/>
+<label x="-53.34" y="45.72" size="1.778" layer="95"/>
 </segment>
 <segment>
-<pinref part="U$1" gate="G$1" pin="OSC_OUT/PH1"/>
-<wire x1="93.98" y1="137.16" x2="104.14" y2="137.16" width="0.1524" layer="91"/>
-<label x="104.14" y="137.16" size="1.27" layer="95" xref="yes"/>
+<pinref part="SV1" gate="G$1" pin="14"/>
+<wire x1="124.46" y1="66.04" x2="147.32" y2="66.04" width="0.1524" layer="91"/>
+<label x="129.54" y="66.04" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="OSC_IN" class="0">
+<net name="FPGA_GPIO_A_6" class="0">
 <segment>
-<pinref part="U$1" gate="G$1" pin="OSC_IN/PH0"/>
-<wire x1="93.98" y1="134.62" x2="104.14" y2="134.62" width="0.1524" layer="91"/>
-<label x="104.14" y="134.62" size="1.27" layer="95" xref="yes"/>
+<pinref part="U7" gate="B16" pin="IO_L6N_T0_VREF_16"/>
+<wire x1="-58.42" y1="43.18" x2="-27.94" y2="43.18" width="0.1524" layer="91"/>
+<label x="-53.34" y="43.18" size="1.778" layer="95"/>
 </segment>
 <segment>
-<pinref part="R12" gate="G$1" pin="1"/>
-<wire x1="365.76" y1="27.94" x2="365.76" y2="15.24" width="0.1524" layer="91"/>
-<label x="365.76" y="15.24" size="1.778" layer="95" rot="R90"/>
+<pinref part="SV1" gate="G$1" pin="15"/>
+<wire x1="109.22" y1="63.5" x2="86.36" y2="63.5" width="0.1524" layer="91"/>
+<label x="86.36" y="63.5" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="SWDIO" class="0">
+<net name="FPGA_GPIO_A_7" class="0">
 <segment>
-<pinref part="U$2" gate="G$1" pin="SWDIO"/>
-<wire x1="436.88" y1="38.1" x2="434.34" y2="38.1" width="0.1524" layer="91"/>
-<label x="434.34" y="38.1" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U7" gate="B16" pin="IO_L7P_T1_16"/>
+<wire x1="-58.42" y1="40.64" x2="-27.94" y2="40.64" width="0.1524" layer="91"/>
+<label x="-53.34" y="40.64" size="1.778" layer="95"/>
 </segment>
 <segment>
-<pinref part="U$1" gate="G$3" pin="JTMS-SWDIO/PA13"/>
-<wire x1="266.7" y1="160.02" x2="279.4" y2="160.02" width="0.1524" layer="91"/>
-<label x="279.4" y="160.02" size="1.27" layer="95" xref="yes"/>
+<pinref part="SV1" gate="G$1" pin="16"/>
+<wire x1="124.46" y1="63.5" x2="147.32" y2="63.5" width="0.1524" layer="91"/>
+<label x="129.54" y="63.5" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="SWDCLK" class="0">
+<net name="FPGA_GPIO_B_0" class="0">
 <segment>
-<pinref part="U$2" gate="G$1" pin="SWDCLK"/>
-<wire x1="436.88" y1="35.56" x2="434.34" y2="35.56" width="0.1524" layer="91"/>
-<label x="434.34" y="35.56" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U7" gate="B16" pin="IO_L7N_T1_16"/>
+<wire x1="-58.42" y1="38.1" x2="-27.94" y2="38.1" width="0.1524" layer="91"/>
+<label x="-53.34" y="38.1" size="1.778" layer="95"/>
 </segment>
 <segment>
-<pinref part="U$1" gate="G$4" pin="PA14/JTCK-SWCLK"/>
-<wire x1="187.96" y1="30.48" x2="180.34" y2="30.48" width="0.1524" layer="91"/>
-<label x="180.34" y="30.48" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="SV2" gate="G$1" pin="7"/>
+<wire x1="109.22" y1="30.48" x2="86.36" y2="30.48" width="0.1524" layer="91"/>
+<label x="86.36" y="30.48" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="NRST" class="0">
+<net name="FPGA_GPIO_B_1" class="0">
 <segment>
-<pinref part="U$2" gate="G$1" pin="NRST"/>
-<pinref part="C40" gate="G$1" pin="P$1"/>
-<wire x1="436.88" y1="27.94" x2="436.88" y2="30.48" width="0.1524" layer="91"/>
-<wire x1="436.88" y1="30.48" x2="434.34" y2="30.48" width="0.1524" layer="91"/>
-<junction x="436.88" y="30.48"/>
-<label x="434.34" y="30.48" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U7" gate="B16" pin="IO_L8P_T1_16"/>
+<wire x1="-58.42" y1="35.56" x2="-27.94" y2="35.56" width="0.1524" layer="91"/>
+<label x="-53.34" y="35.56" size="1.778" layer="95"/>
 </segment>
 <segment>
-<pinref part="U$1" gate="G$1" pin="NRST at 34"/>
-<wire x1="96.52" y1="139.7" x2="104.14" y2="139.7" width="0.1524" layer="91"/>
-<label x="104.14" y="139.7" size="1.27" layer="95" xref="yes"/>
+<pinref part="SV2" gate="G$1" pin="8"/>
+<wire x1="124.46" y1="30.48" x2="147.32" y2="30.48" width="0.1524" layer="91"/>
+<label x="129.54" y="30.48" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="VCAP2" class="0">
+<net name="FPGA_GPIO_B_2" class="0">
 <segment>
-<pinref part="U$1" gate="G$3" pin="VCAP2 at 148"/>
-<wire x1="269.24" y1="198.12" x2="274.32" y2="198.12" width="0.1524" layer="91"/>
-<pinref part="C38" gate="G$1" pin="P$2"/>
-<wire x1="274.32" y1="198.12" x2="274.32" y2="200.66" width="0.1524" layer="91"/>
-<pinref part="C57" gate="G$1" pin="P$2"/>
-<wire x1="274.32" y1="200.66" x2="274.32" y2="203.2" width="0.1524" layer="91"/>
-<wire x1="269.24" y1="203.2" x2="269.24" y2="200.66" width="0.1524" layer="91"/>
-<wire x1="269.24" y1="200.66" x2="274.32" y2="200.66" width="0.1524" layer="91"/>
-<junction x="274.32" y="200.66"/>
+<pinref part="U7" gate="B16" pin="IO_L8N_T1_16"/>
+<wire x1="-58.42" y1="33.02" x2="-27.94" y2="33.02" width="0.1524" layer="91"/>
+<label x="-53.34" y="33.02" size="1.778" layer="95"/>
 </segment>
-</net>
-<net name="VCAP1" class="0">
 <segment>
-<wire x1="96.52" y1="53.34" x2="101.6" y2="53.34" width="0.1524" layer="91"/>
-<pinref part="C39" gate="G$1" pin="P$2"/>
-<wire x1="101.6" y1="53.34" x2="101.6" y2="55.88" width="0.1524" layer="91"/>
-<pinref part="U$1" gate="G$2" pin="VCAP1 at 92"/>
-<pinref part="C56" gate="G$1" pin="P$2"/>
-<wire x1="101.6" y1="55.88" x2="101.6" y2="58.42" width="0.1524" layer="91"/>
-<wire x1="96.52" y1="58.42" x2="96.52" y2="55.88" width="0.1524" layer="91"/>
-<wire x1="96.52" y1="55.88" x2="101.6" y2="55.88" width="0.1524" layer="91"/>
-<junction x="101.6" y="55.88"/>
+<pinref part="SV2" gate="G$1" pin="9"/>
+<wire x1="109.22" y1="27.94" x2="86.36" y2="27.94" width="0.1524" layer="91"/>
+<label x="86.36" y="27.94" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="BOOT0" class="1">
+<net name="FPGA_GPIO_B_3" class="0">
 <segment>
-<pinref part="U$1" gate="G$4" pin="BOOT0 at 197"/>
-<wire x1="269.24" y1="-43.18" x2="274.32" y2="-43.18" width="0.1524" layer="91"/>
-<pinref part="R10" gate="G$1" pin="2"/>
+<pinref part="U7" gate="B16" pin="IO_L9P_T1_DQS_16"/>
+<wire x1="-58.42" y1="30.48" x2="-27.94" y2="30.48" width="0.1524" layer="91"/>
+<label x="-53.34" y="30.48" size="1.778" layer="95"/>
 </segment>
-</net>
-<net name="N$21" class="0">
 <segment>
-<pinref part="Q1" gate="G$1" pin="1"/>
-<pinref part="C15" gate="G$1" pin="2"/>
-<wire x1="365.76" y1="48.26" x2="365.76" y2="43.18" width="0.1524" layer="91"/>
-<wire x1="365.76" y1="43.18" x2="358.14" y2="43.18" width="0.1524" layer="91"/>
-<wire x1="365.76" y1="43.18" x2="365.76" y2="38.1" width="0.1524" layer="91"/>
-<junction x="365.76" y="43.18"/>
-<pinref part="R12" gate="G$1" pin="2"/>
+<pinref part="SV2" gate="G$1" pin="10"/>
+<wire x1="124.46" y1="27.94" x2="147.32" y2="27.94" width="0.1524" layer="91"/>
+<label x="129.54" y="27.94" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="FT_TXD" class="0">
+<net name="FPGA_GPIO_B_4" class="0">
 <segment>
-<pinref part="U$1" gate="G$1" pin="USART2_RX/PA3"/>
-<wire x1="93.98" y1="182.88" x2="101.6" y2="182.88" width="0.1524" layer="91"/>
-<label x="101.6" y="182.88" size="1.27" layer="95" xref="yes"/>
+<pinref part="U7" gate="B16" pin="IO_L9N_T1_DQS_16"/>
+<wire x1="-58.42" y1="27.94" x2="-27.94" y2="27.94" width="0.1524" layer="91"/>
+<label x="-53.34" y="27.94" size="1.778" layer="95"/>
 </segment>
-</net>
-<net name="FT_RXD" class="0">
 <segment>
-<pinref part="U$1" gate="G$1" pin="USART2_TX/PA2"/>
-<wire x1="93.98" y1="170.18" x2="101.6" y2="170.18" width="0.1524" layer="91"/>
-<label x="101.6" y="170.18" size="1.27" layer="95" xref="yes"/>
+<pinref part="SV2" gate="G$1" pin="13"/>
+<wire x1="109.22" y1="22.86" x2="86.36" y2="22.86" width="0.1524" layer="91"/>
+<label x="86.36" y="22.86" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="ARM_LED1" class="0">
+<net name="FPGA_GPIO_B_5" class="0">
 <segment>
-<pinref part="U$1" gate="G$2" pin="PJ4"/>
-<wire x1="15.24" y1="-2.54" x2="10.16" y2="-2.54" width="0.1524" layer="91"/>
-<label x="10.16" y="-2.54" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U7" gate="B16" pin="IO_L10P_T1_16"/>
+<wire x1="-58.42" y1="25.4" x2="-27.94" y2="25.4" width="0.1524" layer="91"/>
+<label x="-53.34" y="25.4" size="1.778" layer="95"/>
 </segment>
 <segment>
-<wire x1="403.86" y1="-20.32" x2="398.78" y2="-20.32" width="0.1524" layer="91"/>
-<label x="398.78" y="-20.32" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="R8" gate="A" pin="5"/>
+<pinref part="SV2" gate="G$1" pin="14"/>
+<wire x1="124.46" y1="22.86" x2="147.32" y2="22.86" width="0.1524" layer="91"/>
+<label x="129.54" y="22.86" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="ARM_LED2" class="0">
+<net name="FPGA_GPIO_B_6" class="0">
 <segment>
-<pinref part="U$1" gate="G$2" pin="PJ3"/>
-<wire x1="15.24" y1="0" x2="10.16" y2="0" width="0.1524" layer="91"/>
-<label x="10.16" y="0" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U7" gate="B16" pin="IO_L10N_T1_16"/>
+<wire x1="-58.42" y1="22.86" x2="-27.94" y2="22.86" width="0.1524" layer="91"/>
+<label x="-53.34" y="22.86" size="1.778" layer="95"/>
 </segment>
 <segment>
-<wire x1="403.86" y1="-22.86" x2="398.78" y2="-22.86" width="0.1524" layer="91"/>
-<label x="398.78" y="-22.86" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="R8" gate="A" pin="6"/>
+<pinref part="SV2" gate="G$1" pin="15"/>
+<wire x1="109.22" y1="20.32" x2="86.36" y2="20.32" width="0.1524" layer="91"/>
+<label x="86.36" y="20.32" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="ARM_LED3" class="0">
+<net name="FPGA_GPIO_B_7" class="0">
 <segment>
-<pinref part="U$1" gate="G$2" pin="PJ2"/>
-<wire x1="15.24" y1="2.54" x2="10.16" y2="2.54" width="0.1524" layer="91"/>
-<label x="10.16" y="2.54" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U7" gate="B16" pin="IO_L11P_T1_SRCC_16"/>
+<wire x1="-58.42" y1="20.32" x2="-27.94" y2="20.32" width="0.1524" layer="91"/>
+<label x="-53.34" y="20.32" size="1.778" layer="95"/>
 </segment>
 <segment>
-<wire x1="403.86" y1="-25.4" x2="398.78" y2="-25.4" width="0.1524" layer="91"/>
-<label x="398.78" y="-25.4" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="R8" gate="A" pin="7"/>
+<pinref part="SV2" gate="G$1" pin="16"/>
+<wire x1="124.46" y1="20.32" x2="147.32" y2="20.32" width="0.1524" layer="91"/>
+<label x="129.54" y="20.32" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="ARM_LED4" class="0">
+<net name="FPGA_GCLK" class="0">
 <segment>
-<pinref part="U$1" gate="G$2" pin="PJ1"/>
-<wire x1="15.24" y1="5.08" x2="10.16" y2="5.08" width="0.1524" layer="91"/>
-<label x="10.16" y="5.08" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="U7" gate="B16" pin="IO_L12P_T1_MRCC_16"/>
+<wire x1="-58.42" y1="15.24" x2="-27.94" y2="15.24" width="0.1524" layer="91"/>
+<label x="-53.34" y="15.24" size="1.778" layer="95"/>
+</segment>
+</net>
+</nets>
+</sheet>
+<sheet>
+<description>Pavel 3-2</description>
+<plain>
+<text x="-129.54" y="78.74" size="1.778" layer="91">*) Lower Right Bank</text>
+<text x="-88.9" y="-17.78" size="1.778" layer="91">DIGITIZED_NOISE signal should go into
+either W19 or Y18 (i.e. into one of the two
+positive (master) sides of the two available
+MRCC differential pairs)</text>
+<text x="30.48" y="81.28" size="1.778" layer="91">*) Signals, that are allowed to be swapped, can be be swapped
+with each other and/or moved to different pins within their bank.</text>
+<text x="-76.2" y="22.86" size="1.778" layer="91"><-- FPGA_GPIO_* and FPGA_IRQ_N_* signals can be swapped</text>
+<text x="-91.44" y="60.96" size="1.778" layer="91"><-- Disable pull-ups on all pins during configuration</text>
+</plain>
+<instances>
+<instance part="U7" gate="B14" x="-114.3" y="0"/>
+<instance part="FRAME15" gate="G$1" x="-152.4" y="-86.36"/>
+<instance part="R27" gate="G$1" x="-96.52" y="60.96" rot="R90">
+<attribute name="TOLERANCE" x="-96.52" y="60.96" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+</instances>
+<busses>
+</busses>
+<nets>
+<net name="FPGA_VCCO_3V3" class="0">
+<segment>
+<wire x1="-109.22" y1="68.58" x2="-104.14" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="-104.14" y1="68.58" x2="-104.14" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="-104.14" y1="66.04" x2="-104.14" y2="63.5" width="0.1524" layer="91"/>
+<wire x1="-104.14" y1="63.5" x2="-104.14" y2="60.96" width="0.1524" layer="91"/>
+<wire x1="-104.14" y1="60.96" x2="-104.14" y2="58.42" width="0.1524" layer="91"/>
+<wire x1="-104.14" y1="58.42" x2="-109.22" y2="58.42" width="0.1524" layer="91"/>
+<wire x1="-109.22" y1="60.96" x2="-104.14" y2="60.96" width="0.1524" layer="91"/>
+<junction x="-104.14" y="60.96"/>
+<wire x1="-109.22" y1="63.5" x2="-104.14" y2="63.5" width="0.1524" layer="91"/>
+<junction x="-104.14" y="63.5"/>
+<wire x1="-109.22" y1="66.04" x2="-104.14" y2="66.04" width="0.1524" layer="91"/>
+<junction x="-104.14" y="66.04"/>
+<junction x="-104.14" y="68.58"/>
+<wire x1="-104.14" y1="68.58" x2="-96.52" y2="68.58" width="0.1524" layer="91"/>
+<label x="-101.6" y="68.58" size="1.778" layer="95"/>
+<wire x1="-96.52" y1="68.58" x2="-78.74" y2="68.58" width="0.1524" layer="91"/>
+<wire x1="-104.14" y1="55.88" x2="-104.14" y2="58.42" width="0.1524" layer="91"/>
+<junction x="-104.14" y="58.42"/>
+<pinref part="U7" gate="B14" pin="VCCO_14 at 5"/>
+<wire x1="-109.22" y1="55.88" x2="-104.14" y2="55.88" width="0.1524" layer="91"/>
+<pinref part="U7" gate="B14" pin="VCCO_14 at 4"/>
+<pinref part="U7" gate="B14" pin="VCCO_14 at 3"/>
+<pinref part="U7" gate="B14" pin="VCCO_14 at 2"/>
+<pinref part="U7" gate="B14" pin="VCCO_14 at 1"/>
+<pinref part="U7" gate="B14" pin="VCCO_14 at 0"/>
+<pinref part="R27" gate="G$1" pin="2"/>
+<wire x1="-96.52" y1="66.04" x2="-96.52" y2="68.58" width="0.1524" layer="91"/>
+<junction x="-96.52" y="68.58"/>
 </segment>
+</net>
+<net name="FPGA_PROM_MOSI" class="0">
 <segment>
-<wire x1="403.86" y1="-27.94" x2="398.78" y2="-27.94" width="0.1524" layer="91"/>
-<label x="398.78" y="-27.94" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="R8" gate="A" pin="8"/>
+<pinref part="U7" gate="B14" pin="IO_L1P_T0_D00_MOSI_14"/>
+<wire x1="-109.22" y1="50.8" x2="-68.58" y2="50.8" width="0.1524" layer="91"/>
+<label x="-91.44" y="50.8" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="MKM_FPGA_CS" class="0">
+<net name="FPGA_PROM_MISO" class="0">
 <segment>
-<wire x1="15.24" y1="27.94" x2="2.54" y2="27.94" width="0.1524" layer="91"/>
-<wire x1="2.54" y1="27.94" x2="2.54" y2="38.1" width="0.1524" layer="91"/>
-<label x="2.54" y="38.1" size="1.27" layer="95" rot="R90" xref="yes"/>
-<pinref part="U$1" gate="G$2" pin="PC4"/>
+<pinref part="U7" gate="B14" pin="IO_L1N_T0_D01_DIN_14"/>
+<wire x1="-109.22" y1="48.26" x2="-68.58" y2="48.26" width="0.1524" layer="91"/>
+<label x="-91.44" y="48.26" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="MKM_FPGA_SCK" class="0">
+<net name="DIGITIZED_NOISE" class="0">
 <segment>
-<pinref part="U$1" gate="G$2" pin="PA5/SPI1_SCK"/>
-<wire x1="15.24" y1="35.56" x2="10.16" y2="35.56" width="0.1524" layer="91"/>
-<wire x1="10.16" y1="35.56" x2="10.16" y2="38.1" width="0.1524" layer="91"/>
-<label x="10.16" y="38.1" size="1.27" layer="95" rot="R90" xref="yes"/>
+<pinref part="U7" gate="B14" pin="IO_L12P_T1_MRCC_14"/>
+<wire x1="-109.22" y1="-5.08" x2="-78.74" y2="-5.08" width="0.1524" layer="91"/>
+<label x="-78.74" y="-5.08" size="1.778" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="MKM_FPGA_MISO" class="0">
+<net name="FPGA_GPIO_LED_2" class="0">
 <segment>
-<wire x1="15.24" y1="33.02" x2="7.62" y2="33.02" width="0.1524" layer="91"/>
-<wire x1="7.62" y1="33.02" x2="7.62" y2="38.1" width="0.1524" layer="91"/>
-<label x="7.62" y="38.1" size="1.27" layer="95" rot="R90" xref="yes"/>
-<pinref part="U$1" gate="G$2" pin="PA6/SPI1_MISO"/>
+<pinref part="U7" gate="B14" pin="IO_L7N_T1_D10_14"/>
+<wire x1="-109.22" y1="17.78" x2="-78.74" y2="17.78" width="0.1524" layer="91"/>
+<label x="-104.14" y="17.78" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="MKM_FPGA_MOSI" class="0">
+<net name="FPGA_GPIO_LED_3" class="0">
 <segment>
-<wire x1="15.24" y1="30.48" x2="5.08" y2="30.48" width="0.1524" layer="91"/>
-<wire x1="5.08" y1="30.48" x2="5.08" y2="38.1" width="0.1524" layer="91"/>
-<label x="5.08" y="38.1" size="1.27" layer="95" rot="R90" xref="yes"/>
-<pinref part="U$1" gate="G$2" pin="PA7/SPI1_MOSI"/>
+<pinref part="U7" gate="B14" pin="IO_L8P_T1_D11_14"/>
+<wire x1="-109.22" y1="15.24" x2="-78.74" y2="15.24" width="0.1524" layer="91"/>
+<label x="-104.14" y="15.24" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="AVR_GPIO_11" class="0">
+<net name="FPGA_PROM_CS_B" class="0">
 <segment>
-<wire x1="15.24" y1="154.94" x2="12.7" y2="154.94" width="0.1524" layer="91"/>
-<label x="12.7" y="154.94" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="U$1" gate="G$1" pin="PI11"/>
+<pinref part="U7" gate="B14" pin="IO_L6P_T0_FCS_B_14"/>
+<wire x1="-109.22" y1="25.4" x2="-78.74" y2="25.4" width="0.1524" layer="91"/>
+<label x="-104.14" y="25.4" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="AVR_GPIO_10" class="0">
+<net name="FPGA_GPIO_LED_0" class="0">
 <segment>
-<wire x1="15.24" y1="167.64" x2="12.7" y2="167.64" width="0.1524" layer="91"/>
-<label x="12.7" y="167.64" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="U$1" gate="G$1" pin="PC13"/>
+<pinref part="U7" gate="B14" pin="IO_L6N_T0_D08_VREF_14"/>
+<wire x1="-109.22" y1="22.86" x2="-78.74" y2="22.86" width="0.1524" layer="91"/>
+<label x="-104.14" y="22.86" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="RTC_SCL" class="0">
+<net name="FPGA_GPIO_LED_1" class="0">
 <segment>
-<pinref part="U$1" gate="G$1" pin="PH4"/>
-<wire x1="93.98" y1="177.8" x2="101.6" y2="177.8" width="0.1524" layer="91"/>
-<label x="101.6" y="177.8" size="1.27" layer="95" xref="yes"/>
+<pinref part="U7" gate="B14" pin="IO_L7P_T1_D09_14"/>
+<wire x1="-109.22" y1="20.32" x2="-78.74" y2="20.32" width="0.1524" layer="91"/>
+<label x="-104.14" y="20.32" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="RTC_SDA" class="0">
+<net name="FPGA_MKM_CS_N" class="0">
 <segment>
-<pinref part="U$1" gate="G$1" pin="FMC_SDNWE/PH5"/>
-<wire x1="93.98" y1="180.34" x2="101.6" y2="180.34" width="0.1524" layer="91"/>
-<label x="101.6" y="180.34" size="1.27" layer="95" xref="yes"/>
+<pinref part="U7" gate="B14" pin="IO_L4P_T0_D04_14"/>
+<wire x1="-109.22" y1="35.56" x2="-78.74" y2="35.56" width="0.1524" layer="91"/>
+<label x="-78.74" y="35.56" size="1.778" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="RTC_MFP" class="0">
+<net name="FPGA_MKM_SCLK" class="0">
 <segment>
-<pinref part="U$1" gate="G$1" pin="FMC_SDNE0/PH3"/>
-<wire x1="93.98" y1="175.26" x2="101.6" y2="175.26" width="0.1524" layer="91"/>
-<label x="101.6" y="175.26" size="1.27" layer="95" xref="yes"/>
+<pinref part="U7" gate="B14" pin="IO_L4N_T0_D05_14"/>
+<wire x1="-109.22" y1="33.02" x2="-78.74" y2="33.02" width="0.1524" layer="91"/>
+<label x="-78.74" y="33.02" size="1.778" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="N$17" class="0">
+<net name="FPGA_MKM_MOSI" class="0">
 <segment>
-<pinref part="LED5" gate="G$1" pin="A"/>
-<wire x1="424.18" y1="-20.32" x2="431.8" y2="-20.32" width="0.1524" layer="91"/>
-<pinref part="R8" gate="A" pin="4"/>
+<pinref part="U7" gate="B14" pin="IO_L5P_T0_D06_14"/>
+<wire x1="-109.22" y1="30.48" x2="-78.74" y2="30.48" width="0.1524" layer="91"/>
+<label x="-78.74" y="30.48" size="1.778" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="N$18" class="0">
+<net name="FPGA_MKM_MISO" class="0">
 <segment>
-<pinref part="LED6" gate="G$1" pin="A"/>
-<wire x1="424.18" y1="-22.86" x2="426.72" y2="-22.86" width="0.1524" layer="91"/>
-<pinref part="R8" gate="A" pin="3"/>
+<pinref part="U7" gate="B14" pin="IO_L5N_T0_D07_14"/>
+<wire x1="-109.22" y1="27.94" x2="-78.74" y2="27.94" width="0.1524" layer="91"/>
+<label x="-78.74" y="27.94" size="1.778" layer="95" xref="yes"/>
 </segment>
 </net>
-<net name="N$19" class="0">
+<net name="N$32" class="0">
 <segment>
-<pinref part="LED7" gate="G$1" pin="A"/>
-<wire x1="424.18" y1="-25.4" x2="431.8" y2="-25.4" width="0.1524" layer="91"/>
-<pinref part="R8" gate="A" pin="2"/>
+<pinref part="U7" gate="B14" pin="IO_L3P_T0_DQS_PUDC_B_14"/>
+<pinref part="R27" gate="G$1" pin="1"/>
+<wire x1="-109.22" y1="40.64" x2="-96.52" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="-96.52" y1="40.64" x2="-96.52" y2="55.88" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="N$20" class="0">
+</nets>
+</sheet>
+<sheet>
+<description>Pavel 3-3</description>
+<plain>
+<text x="48.26" y="73.66" size="1.778" layer="91">*) Power - AUX</text>
+<text x="-30.48" y="73.66" size="1.778" layer="91">*) Power - CORE & BRAM</text>
+<text x="-106.68" y="76.2" size="1.778" layer="91">*) Ground Pins</text>
+</plain>
+<instances>
+<instance part="U7" gate="BGNDA" x="-116.84" y="5.08"/>
+<instance part="U7" gate="BGNDB" x="-71.12" y="5.08"/>
+<instance part="U7" gate="BVCCAUX" x="60.96" y="55.88"/>
+<instance part="U7" gate="BVCCBRAM" x="-15.24" y="58.42"/>
+<instance part="U7" gate="BVCCINT" x="-15.24" y="22.86" rot="MR180"/>
+<instance part="SUPPLY63" gate="GND" x="-106.68" y="-58.42"/>
+<instance part="SUPPLY64" gate="GND" x="-60.96" y="-55.88"/>
+<instance part="FRAME16" gate="G$1" x="-147.32" y="-81.28"/>
+</instances>
+<busses>
+</busses>
+<nets>
+<net name="GND" class="1">
 <segment>
-<pinref part="LED8" gate="G$1" pin="A"/>
-<wire x1="424.18" y1="-27.94" x2="426.72" y2="-27.94" width="0.1524" layer="91"/>
-<pinref part="R8" gate="A" pin="1"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 43"/>
+<wire x1="-111.76" y1="-50.8" x2="-106.68" y2="-50.8" width="0.1524" layer="91"/>
+<pinref part="SUPPLY63" gate="GND" pin="GND"/>
+<wire x1="-106.68" y1="-50.8" x2="-106.68" y2="-55.88" width="0.1524" layer="91"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 42"/>
+<wire x1="-111.76" y1="-48.26" x2="-106.68" y2="-48.26" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="-48.26" x2="-106.68" y2="-50.8" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-50.8"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 38"/>
+<wire x1="-111.76" y1="-38.1" x2="-106.68" y2="-38.1" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="-38.1" x2="-106.68" y2="-40.64" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-48.26"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 39"/>
+<wire x1="-106.68" y1="-40.64" x2="-106.68" y2="-43.18" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="-43.18" x2="-106.68" y2="-45.72" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="-45.72" x2="-106.68" y2="-48.26" width="0.1524" layer="91"/>
+<wire x1="-111.76" y1="-40.64" x2="-106.68" y2="-40.64" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-40.64"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 40"/>
+<wire x1="-111.76" y1="-43.18" x2="-106.68" y2="-43.18" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-43.18"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 41"/>
+<wire x1="-111.76" y1="-45.72" x2="-106.68" y2="-45.72" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-45.72"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 37"/>
+<wire x1="-111.76" y1="-35.56" x2="-106.68" y2="-35.56" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="-35.56" x2="-106.68" y2="-38.1" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-38.1"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 36"/>
+<wire x1="-111.76" y1="-33.02" x2="-106.68" y2="-33.02" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="-33.02" x2="-106.68" y2="-35.56" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-35.56"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 35"/>
+<wire x1="-111.76" y1="-30.48" x2="-106.68" y2="-30.48" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="-30.48" x2="-106.68" y2="-33.02" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-33.02"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 34"/>
+<wire x1="-111.76" y1="-27.94" x2="-106.68" y2="-27.94" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="-27.94" x2="-106.68" y2="-30.48" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-30.48"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 33"/>
+<wire x1="-111.76" y1="-25.4" x2="-106.68" y2="-25.4" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="-25.4" x2="-106.68" y2="-27.94" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-27.94"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 32"/>
+<wire x1="-111.76" y1="-22.86" x2="-106.68" y2="-22.86" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="-22.86" x2="-106.68" y2="-25.4" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-25.4"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 31"/>
+<wire x1="-111.76" y1="-20.32" x2="-106.68" y2="-20.32" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="-20.32" x2="-106.68" y2="-22.86" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-22.86"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 30"/>
+<wire x1="-111.76" y1="-17.78" x2="-106.68" y2="-17.78" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="-17.78" x2="-106.68" y2="-20.32" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-20.32"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 29"/>
+<wire x1="-111.76" y1="-15.24" x2="-106.68" y2="-15.24" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="-15.24" x2="-106.68" y2="-17.78" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-17.78"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 28"/>
+<wire x1="-111.76" y1="-12.7" x2="-106.68" y2="-12.7" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="-12.7" x2="-106.68" y2="-15.24" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-15.24"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 27"/>
+<wire x1="-111.76" y1="-10.16" x2="-106.68" y2="-10.16" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="-10.16" x2="-106.68" y2="-12.7" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-12.7"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 26"/>
+<wire x1="-111.76" y1="-7.62" x2="-106.68" y2="-7.62" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="-7.62" x2="-106.68" y2="-10.16" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-10.16"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 25"/>
+<wire x1="-111.76" y1="-5.08" x2="-106.68" y2="-5.08" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="-5.08" x2="-106.68" y2="-7.62" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-7.62"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 24"/>
+<wire x1="-111.76" y1="-2.54" x2="-106.68" y2="-2.54" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="-2.54" x2="-106.68" y2="-5.08" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-5.08"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 23"/>
+<wire x1="-111.76" y1="0" x2="-106.68" y2="0" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="0" x2="-106.68" y2="-2.54" width="0.1524" layer="91"/>
+<junction x="-106.68" y="-2.54"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 22"/>
+<wire x1="-111.76" y1="2.54" x2="-106.68" y2="2.54" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="2.54" x2="-106.68" y2="0" width="0.1524" layer="91"/>
+<junction x="-106.68" y="0"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 21"/>
+<wire x1="-111.76" y1="5.08" x2="-106.68" y2="5.08" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="5.08" x2="-106.68" y2="2.54" width="0.1524" layer="91"/>
+<junction x="-106.68" y="2.54"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 20"/>
+<wire x1="-111.76" y1="7.62" x2="-106.68" y2="7.62" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="7.62" x2="-106.68" y2="5.08" width="0.1524" layer="91"/>
+<junction x="-106.68" y="5.08"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 19"/>
+<wire x1="-111.76" y1="10.16" x2="-106.68" y2="10.16" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="10.16" x2="-106.68" y2="7.62" width="0.1524" layer="91"/>
+<junction x="-106.68" y="7.62"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 18"/>
+<wire x1="-111.76" y1="12.7" x2="-106.68" y2="12.7" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="12.7" x2="-106.68" y2="10.16" width="0.1524" layer="91"/>
+<junction x="-106.68" y="10.16"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 17"/>
+<wire x1="-111.76" y1="15.24" x2="-106.68" y2="15.24" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="15.24" x2="-106.68" y2="12.7" width="0.1524" layer="91"/>
+<junction x="-106.68" y="12.7"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 16"/>
+<wire x1="-111.76" y1="17.78" x2="-106.68" y2="17.78" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="17.78" x2="-106.68" y2="15.24" width="0.1524" layer="91"/>
+<junction x="-106.68" y="15.24"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 15"/>
+<wire x1="-111.76" y1="20.32" x2="-106.68" y2="20.32" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="20.32" x2="-106.68" y2="17.78" width="0.1524" layer="91"/>
+<junction x="-106.68" y="17.78"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 14"/>
+<wire x1="-111.76" y1="22.86" x2="-106.68" y2="22.86" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="22.86" x2="-106.68" y2="20.32" width="0.1524" layer="91"/>
+<junction x="-106.68" y="20.32"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 13"/>
+<wire x1="-111.76" y1="25.4" x2="-106.68" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="25.4" x2="-106.68" y2="22.86" width="0.1524" layer="91"/>
+<junction x="-106.68" y="22.86"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 12"/>
+<wire x1="-111.76" y1="27.94" x2="-106.68" y2="27.94" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="27.94" x2="-106.68" y2="25.4" width="0.1524" layer="91"/>
+<junction x="-106.68" y="25.4"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 11"/>
+<wire x1="-111.76" y1="30.48" x2="-106.68" y2="30.48" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="30.48" x2="-106.68" y2="27.94" width="0.1524" layer="91"/>
+<junction x="-106.68" y="27.94"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 10"/>
+<wire x1="-111.76" y1="33.02" x2="-106.68" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="33.02" x2="-106.68" y2="30.48" width="0.1524" layer="91"/>
+<junction x="-106.68" y="30.48"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 9"/>
+<wire x1="-111.76" y1="35.56" x2="-106.68" y2="35.56" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="35.56" x2="-106.68" y2="33.02" width="0.1524" layer="91"/>
+<junction x="-106.68" y="33.02"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 8"/>
+<wire x1="-111.76" y1="38.1" x2="-106.68" y2="38.1" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="38.1" x2="-106.68" y2="35.56" width="0.1524" layer="91"/>
+<junction x="-106.68" y="35.56"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 7"/>
+<wire x1="-111.76" y1="40.64" x2="-106.68" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="40.64" x2="-106.68" y2="38.1" width="0.1524" layer="91"/>
+<junction x="-106.68" y="38.1"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 6"/>
+<wire x1="-111.76" y1="43.18" x2="-106.68" y2="43.18" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="43.18" x2="-106.68" y2="40.64" width="0.1524" layer="91"/>
+<junction x="-106.68" y="40.64"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 5"/>
+<wire x1="-111.76" y1="45.72" x2="-106.68" y2="45.72" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="45.72" x2="-106.68" y2="43.18" width="0.1524" layer="91"/>
+<junction x="-106.68" y="43.18"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 4"/>
+<wire x1="-111.76" y1="48.26" x2="-106.68" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="48.26" x2="-106.68" y2="45.72" width="0.1524" layer="91"/>
+<junction x="-106.68" y="45.72"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 3"/>
+<wire x1="-111.76" y1="50.8" x2="-106.68" y2="50.8" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="50.8" x2="-106.68" y2="48.26" width="0.1524" layer="91"/>
+<junction x="-106.68" y="48.26"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 2"/>
+<wire x1="-111.76" y1="53.34" x2="-106.68" y2="53.34" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="53.34" x2="-106.68" y2="50.8" width="0.1524" layer="91"/>
+<junction x="-106.68" y="50.8"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 1"/>
+<wire x1="-111.76" y1="55.88" x2="-106.68" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="55.88" x2="-106.68" y2="53.34" width="0.1524" layer="91"/>
+<junction x="-106.68" y="53.34"/>
+<pinref part="U7" gate="BGNDA" pin="GND at 0"/>
+<wire x1="-111.76" y1="58.42" x2="-106.68" y2="58.42" width="0.1524" layer="91"/>
+<wire x1="-106.68" y1="58.42" x2="-106.68" y2="55.88" width="0.1524" layer="91"/>
+<junction x="-106.68" y="55.88"/>
+</segment>
+<segment>
+<pinref part="U7" gate="BGNDB" pin="GND at 86"/>
+<wire x1="-66.04" y1="-48.26" x2="-60.96" y2="-48.26" width="0.1524" layer="91"/>
+<pinref part="SUPPLY64" gate="GND" pin="GND"/>
+<wire x1="-60.96" y1="-48.26" x2="-60.96" y2="-53.34" width="0.1524" layer="91"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 44"/>
+<wire x1="-66.04" y1="58.42" x2="-60.96" y2="58.42" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="58.42" x2="-60.96" y2="55.88" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-48.26"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 45"/>
+<wire x1="-60.96" y1="55.88" x2="-60.96" y2="53.34" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="53.34" x2="-60.96" y2="50.8" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="50.8" x2="-60.96" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="48.26" x2="-60.96" y2="45.72" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="45.72" x2="-60.96" y2="43.18" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="43.18" x2="-60.96" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="40.64" x2="-60.96" y2="38.1" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="38.1" x2="-60.96" y2="35.56" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="35.56" x2="-60.96" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="33.02" x2="-60.96" y2="30.48" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="30.48" x2="-60.96" y2="27.94" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="27.94" x2="-60.96" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="25.4" x2="-60.96" y2="22.86" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="22.86" x2="-60.96" y2="20.32" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="20.32" x2="-60.96" y2="17.78" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="17.78" x2="-60.96" y2="15.24" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="15.24" x2="-60.96" y2="12.7" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="12.7" x2="-60.96" y2="10.16" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="10.16" x2="-60.96" y2="7.62" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="7.62" x2="-60.96" y2="5.08" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="5.08" x2="-60.96" y2="2.54" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="2.54" x2="-60.96" y2="0" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="0" x2="-60.96" y2="-2.54" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-2.54" x2="-60.96" y2="-5.08" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-5.08" x2="-60.96" y2="-7.62" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-7.62" x2="-60.96" y2="-10.16" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-10.16" x2="-60.96" y2="-12.7" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-12.7" x2="-60.96" y2="-15.24" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-15.24" x2="-60.96" y2="-17.78" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-17.78" x2="-60.96" y2="-20.32" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-20.32" x2="-60.96" y2="-22.86" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-22.86" x2="-60.96" y2="-25.4" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-25.4" x2="-60.96" y2="-27.94" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-27.94" x2="-60.96" y2="-30.48" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-30.48" x2="-60.96" y2="-33.02" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-33.02" x2="-60.96" y2="-35.56" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-35.56" x2="-60.96" y2="-38.1" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-38.1" x2="-60.96" y2="-40.64" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-40.64" x2="-60.96" y2="-43.18" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-43.18" x2="-60.96" y2="-45.72" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-45.72" x2="-60.96" y2="-48.26" width="0.1524" layer="91"/>
+<wire x1="-66.04" y1="55.88" x2="-60.96" y2="55.88" width="0.1524" layer="91"/>
+<junction x="-60.96" y="55.88"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 46"/>
+<wire x1="-66.04" y1="53.34" x2="-60.96" y2="53.34" width="0.1524" layer="91"/>
+<junction x="-60.96" y="53.34"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 47"/>
+<wire x1="-66.04" y1="50.8" x2="-60.96" y2="50.8" width="0.1524" layer="91"/>
+<junction x="-60.96" y="50.8"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 48"/>
+<wire x1="-66.04" y1="48.26" x2="-60.96" y2="48.26" width="0.1524" layer="91"/>
+<junction x="-60.96" y="48.26"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 49"/>
+<wire x1="-66.04" y1="45.72" x2="-60.96" y2="45.72" width="0.1524" layer="91"/>
+<junction x="-60.96" y="45.72"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 50"/>
+<wire x1="-66.04" y1="43.18" x2="-60.96" y2="43.18" width="0.1524" layer="91"/>
+<junction x="-60.96" y="43.18"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 51"/>
+<wire x1="-66.04" y1="40.64" x2="-60.96" y2="40.64" width="0.1524" layer="91"/>
+<junction x="-60.96" y="40.64"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 52"/>
+<wire x1="-66.04" y1="38.1" x2="-60.96" y2="38.1" width="0.1524" layer="91"/>
+<junction x="-60.96" y="38.1"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 53"/>
+<wire x1="-66.04" y1="35.56" x2="-60.96" y2="35.56" width="0.1524" layer="91"/>
+<junction x="-60.96" y="35.56"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 54"/>
+<wire x1="-66.04" y1="33.02" x2="-60.96" y2="33.02" width="0.1524" layer="91"/>
+<junction x="-60.96" y="33.02"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 55"/>
+<wire x1="-66.04" y1="30.48" x2="-60.96" y2="30.48" width="0.1524" layer="91"/>
+<junction x="-60.96" y="30.48"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 56"/>
+<wire x1="-66.04" y1="27.94" x2="-60.96" y2="27.94" width="0.1524" layer="91"/>
+<junction x="-60.96" y="27.94"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 57"/>
+<wire x1="-66.04" y1="25.4" x2="-60.96" y2="25.4" width="0.1524" layer="91"/>
+<junction x="-60.96" y="25.4"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 58"/>
+<wire x1="-66.04" y1="22.86" x2="-60.96" y2="22.86" width="0.1524" layer="91"/>
+<junction x="-60.96" y="22.86"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 59"/>
+<wire x1="-66.04" y1="20.32" x2="-60.96" y2="20.32" width="0.1524" layer="91"/>
+<junction x="-60.96" y="20.32"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 60"/>
+<wire x1="-66.04" y1="17.78" x2="-60.96" y2="17.78" width="0.1524" layer="91"/>
+<junction x="-60.96" y="17.78"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 61"/>
+<wire x1="-66.04" y1="15.24" x2="-60.96" y2="15.24" width="0.1524" layer="91"/>
+<junction x="-60.96" y="15.24"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 62"/>
+<wire x1="-66.04" y1="12.7" x2="-60.96" y2="12.7" width="0.1524" layer="91"/>
+<junction x="-60.96" y="12.7"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 63"/>
+<wire x1="-66.04" y1="10.16" x2="-60.96" y2="10.16" width="0.1524" layer="91"/>
+<junction x="-60.96" y="10.16"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 64"/>
+<wire x1="-66.04" y1="7.62" x2="-60.96" y2="7.62" width="0.1524" layer="91"/>
+<junction x="-60.96" y="7.62"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 65"/>
+<wire x1="-66.04" y1="5.08" x2="-60.96" y2="5.08" width="0.1524" layer="91"/>
+<junction x="-60.96" y="5.08"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 66"/>
+<wire x1="-66.04" y1="2.54" x2="-60.96" y2="2.54" width="0.1524" layer="91"/>
+<junction x="-60.96" y="2.54"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 67"/>
+<wire x1="-66.04" y1="0" x2="-60.96" y2="0" width="0.1524" layer="91"/>
+<junction x="-60.96" y="0"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 68"/>
+<wire x1="-66.04" y1="-2.54" x2="-60.96" y2="-2.54" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-2.54"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 69"/>
+<wire x1="-66.04" y1="-5.08" x2="-60.96" y2="-5.08" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-5.08"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 70"/>
+<wire x1="-66.04" y1="-7.62" x2="-60.96" y2="-7.62" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-7.62"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 71"/>
+<wire x1="-66.04" y1="-10.16" x2="-60.96" y2="-10.16" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-10.16"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 72"/>
+<wire x1="-66.04" y1="-12.7" x2="-60.96" y2="-12.7" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-12.7"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 73"/>
+<wire x1="-66.04" y1="-15.24" x2="-60.96" y2="-15.24" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-15.24"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 74"/>
+<wire x1="-66.04" y1="-17.78" x2="-60.96" y2="-17.78" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-17.78"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 75"/>
+<wire x1="-66.04" y1="-20.32" x2="-60.96" y2="-20.32" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-20.32"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 76"/>
+<wire x1="-66.04" y1="-22.86" x2="-60.96" y2="-22.86" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-22.86"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 77"/>
+<wire x1="-66.04" y1="-25.4" x2="-60.96" y2="-25.4" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-25.4"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 78"/>
+<wire x1="-66.04" y1="-27.94" x2="-60.96" y2="-27.94" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-27.94"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 79"/>
+<wire x1="-66.04" y1="-30.48" x2="-60.96" y2="-30.48" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-30.48"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 80"/>
+<wire x1="-66.04" y1="-33.02" x2="-60.96" y2="-33.02" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-33.02"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 81"/>
+<wire x1="-66.04" y1="-35.56" x2="-60.96" y2="-35.56" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-35.56"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 82"/>
+<wire x1="-66.04" y1="-38.1" x2="-60.96" y2="-38.1" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-38.1"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 83"/>
+<wire x1="-66.04" y1="-40.64" x2="-60.96" y2="-40.64" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-40.64"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 84"/>
+<wire x1="-66.04" y1="-43.18" x2="-60.96" y2="-43.18" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-43.18"/>
+<pinref part="U7" gate="BGNDB" pin="GND at 85"/>
+<wire x1="-66.04" y1="-45.72" x2="-60.96" y2="-45.72" width="0.1524" layer="91"/>
+<junction x="-60.96" y="-45.72"/>
+</segment>
+</net>
+<net name="FPGA_VCCAUX_1V8" class="0">
+<segment>
+<pinref part="U7" gate="BVCCAUX" pin="VCCAUX at 0"/>
+<wire x1="66.04" y1="60.96" x2="71.12" y2="60.96" width="0.1524" layer="91"/>
+<wire x1="71.12" y1="60.96" x2="71.12" y2="58.42" width="0.1524" layer="91"/>
+<pinref part="U7" gate="BVCCAUX" pin="VCCAUX at 4"/>
+<wire x1="71.12" y1="58.42" x2="71.12" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="71.12" y1="55.88" x2="71.12" y2="53.34" width="0.1524" layer="91"/>
+<wire x1="71.12" y1="53.34" x2="71.12" y2="50.8" width="0.1524" layer="91"/>
+<wire x1="71.12" y1="50.8" x2="66.04" y2="50.8" width="0.1524" layer="91"/>
+<pinref part="U7" gate="BVCCAUX" pin="VCCAUX at 3"/>
+<wire x1="66.04" y1="53.34" x2="71.12" y2="53.34" width="0.1524" layer="91"/>
+<junction x="71.12" y="53.34"/>
+<pinref part="U7" gate="BVCCAUX" pin="VCCAUX at 2"/>
+<wire x1="66.04" y1="55.88" x2="71.12" y2="55.88" width="0.1524" layer="91"/>
+<junction x="71.12" y="55.88"/>
+<pinref part="U7" gate="BVCCAUX" pin="VCCAUX at 1"/>
+<wire x1="66.04" y1="58.42" x2="71.12" y2="58.42" width="0.1524" layer="91"/>
+<junction x="71.12" y="58.42"/>
+<junction x="71.12" y="60.96"/>
+<wire x1="71.12" y1="60.96" x2="96.52" y2="60.96" width="0.1524" layer="91"/>
+<label x="71.12" y="60.96" size="1.778" layer="95"/>
+</segment>
+</net>
+<net name="FPGA_VCCINT_1V0" class="0">
+<segment>
+<pinref part="U7" gate="BVCCBRAM" pin="VCCBRAM at 0"/>
+<wire x1="-10.16" y1="60.96" x2="-5.08" y2="60.96" width="0.1524" layer="91"/>
+<wire x1="-5.08" y1="60.96" x2="-5.08" y2="58.42" width="0.1524" layer="91"/>
+<pinref part="U7" gate="BVCCBRAM" pin="VCCBRAM at 1"/>
+<wire x1="-5.08" y1="58.42" x2="-10.16" y2="58.42" width="0.1524" layer="91"/>
+<pinref part="U7" gate="BVCCBRAM" pin="VCCBRAM at 2"/>
+<wire x1="-10.16" y1="55.88" x2="-5.08" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="-5.08" y1="55.88" x2="-5.08" y2="58.42" width="0.1524" layer="91"/>
+<junction x="-5.08" y="58.42"/>
+<label x="-5.08" y="60.96" size="1.778" layer="95"/>
+<junction x="-5.08" y="60.96"/>
+<wire x1="-5.08" y1="60.96" x2="20.32" y2="60.96" width="0.1524" layer="91"/>
+<pinref part="U7" gate="BVCCINT" pin="VCCINT at 13"/>
+<wire x1="-10.16" y1="40.64" x2="-5.08" y2="40.64" width="0.1524" layer="91"/>
+<wire x1="-5.08" y1="40.64" x2="-5.08" y2="55.88" width="0.1524" layer="91"/>
+<junction x="-5.08" y="55.88"/>
+<pinref part="U7" gate="BVCCINT" pin="VCCINT at 12"/>
+<wire x1="-10.16" y1="38.1" x2="-5.08" y2="38.1" width="0.1524" layer="91"/>
+<wire x1="-5.08" y1="38.1" x2="-5.08" y2="40.64" width="0.1524" layer="91"/>
+<junction x="-5.08" y="40.64"/>
+<pinref part="U7" gate="BVCCINT" pin="VCCINT at 11"/>
+<wire x1="-10.16" y1="35.56" x2="-5.08" y2="35.56" width="0.1524" layer="91"/>
+<wire x1="-5.08" y1="35.56" x2="-5.08" y2="38.1" width="0.1524" layer="91"/>
+<junction x="-5.08" y="38.1"/>
+<pinref part="U7" gate="BVCCINT" pin="VCCINT at 10"/>
+<wire x1="-10.16" y1="33.02" x2="-5.08" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="-5.08" y1="33.02" x2="-5.08" y2="35.56" width="0.1524" layer="91"/>
+<junction x="-5.08" y="35.56"/>
+<pinref part="U7" gate="BVCCINT" pin="VCCINT at 9"/>
+<wire x1="-10.16" y1="30.48" x2="-5.08" y2="30.48" width="0.1524" layer="91"/>
+<wire x1="-5.08" y1="30.48" x2="-5.08" y2="33.02" width="0.1524" layer="91"/>
+<junction x="-5.08" y="33.02"/>
+<pinref part="U7" gate="BVCCINT" pin="VCCINT at 8"/>
+<wire x1="-10.16" y1="27.94" x2="-5.08" y2="27.94" width="0.1524" layer="91"/>
+<wire x1="-5.08" y1="27.94" x2="-5.08" y2="30.48" width="0.1524" layer="91"/>
+<junction x="-5.08" y="30.48"/>
+<pinref part="U7" gate="BVCCINT" pin="VCCINT at 7"/>
+<wire x1="-10.16" y1="25.4" x2="-5.08" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="-5.08" y1="25.4" x2="-5.08" y2="27.94" width="0.1524" layer="91"/>
+<junction x="-5.08" y="27.94"/>
+<pinref part="U7" gate="BVCCINT" pin="VCCINT at 0"/>
+<wire x1="-10.16" y1="7.62" x2="-5.08" y2="7.62" width="0.1524" layer="91"/>
+<wire x1="-5.08" y1="7.62" x2="-5.08" y2="10.16" width="0.1524" layer="91"/>
+<junction x="-5.08" y="25.4"/>
+<pinref part="U7" gate="BVCCINT" pin="VCCINT at 6"/>
+<wire x1="-5.08" y1="10.16" x2="-5.08" y2="12.7" width="0.1524" layer="91"/>
+<wire x1="-5.08" y1="12.7" x2="-5.08" y2="15.24" width="0.1524" layer="91"/>
+<wire x1="-5.08" y1="15.24" x2="-5.08" y2="17.78" width="0.1524" layer="91"/>
+<wire x1="-5.08" y1="17.78" x2="-5.08" y2="20.32" width="0.1524" layer="91"/>
+<wire x1="-5.08" y1="20.32" x2="-5.08" y2="22.86" width="0.1524" layer="91"/>
+<wire x1="-5.08" y1="22.86" x2="-5.08" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="-10.16" y1="22.86" x2="-5.08" y2="22.86" width="0.1524" layer="91"/>
+<junction x="-5.08" y="22.86"/>
+<pinref part="U7" gate="BVCCINT" pin="VCCINT at 5"/>
+<wire x1="-10.16" y1="20.32" x2="-5.08" y2="20.32" width="0.1524" layer="91"/>
+<junction x="-5.08" y="20.32"/>
+<pinref part="U7" gate="BVCCINT" pin="VCCINT at 4"/>
+<wire x1="-10.16" y1="17.78" x2="-5.08" y2="17.78" width="0.1524" layer="91"/>
+<junction x="-5.08" y="17.78"/>
+<pinref part="U7" gate="BVCCINT" pin="VCCINT at 3"/>
+<wire x1="-10.16" y1="15.24" x2="-5.08" y2="15.24" width="0.1524" layer="91"/>
+<junction x="-5.08" y="15.24"/>
+<pinref part="U7" gate="BVCCINT" pin="VCCINT at 2"/>
+<wire x1="-10.16" y1="12.7" x2="-5.08" y2="12.7" width="0.1524" layer="91"/>
+<junction x="-5.08" y="12.7"/>
+<pinref part="U7" gate="BVCCINT" pin="VCCINT at 1"/>
+<wire x1="-10.16" y1="10.16" x2="-5.08" y2="10.16" width="0.1524" layer="91"/>
+<junction x="-5.08" y="10.16"/>
 </segment>
 </net>
 </nets>
 </sheet>
 <sheet>
-<description>USB-UART interface</description>
+<description>Pavel 4-1</description>
 <plain>
-<text x="2.54" y="83.82" size="1.778" layer="91">DS_FT232H.pdf
-6.1 USB Bus Powered Configuration
-copy of reference circuit</text>
-<text x="96.52" y="-17.78" size="1.27" layer="91">Place close to FT232</text>
+<text x="66.04" y="58.42" size="1.778" layer="91"><-- Place small 0.47 uF caps right under the BGA package
+<-- Place medium 4.7 uF caps very close to the BGA package
+<-- Place large 47 uF and 330 uF caps not far from the BGA package
+
+<-- Distribute smaller caps evenly under the BGA package
+<-- Distribute larger caps evenly around the BGA package</text>
+<text x="-40.64" y="86.36" size="1.778" layer="91">*) Decoupling capacitors for VCCINT and VCCBRAM</text>
+<text x="55.88" y="-22.86" size="1.778" layer="91"><-- Place small 0.47 uF caps right under the BGA package
+<-- Place medium 4.7 uF caps very close to the BGA package
+<-- Place large 47 uF caps not far from the BGA package
+
+<-- Try to place smaller caps next to FPGA balls</text>
+<text x="-40.64" y="2.54" size="1.778" layer="91">*) Decoupling capacitors for VCCAUX</text>
 </plain>
 <instances>
-<instance part="U$3" gate="G$1" x="73.66" y="43.18"/>
-<instance part="R11" gate="G$1" x="38.1" y="50.8" rot="R180"/>
-<instance part="C41" gate="G$1" x="20.32" y="53.34" smashed="yes">
-<attribute name="NAME" x="22.86" y="57.15" size="1.6764" layer="95" rot="R90"/>
+<instance part="C65" gate="G$1" x="-78.74" y="73.66">
+<attribute name="DIELECTRIC" x="-78.74" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-78.74" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-78.74" y="73.66" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="C42" gate="G$1" x="15.24" y="53.34" smashed="yes">
-<attribute name="NAME" x="12.7" y="57.15" size="1.6764" layer="95" rot="R90"/>
-<attribute name="VALUE" x="10.16" y="53.34" size="1.6764" layer="96" rot="R90"/>
+<instance part="SUPPLY65" gate="GND" x="-78.74" y="63.5"/>
+<instance part="SUPPLY66" gate="GND" x="-66.04" y="63.5"/>
+<instance part="SUPPLY67" gate="GND" x="-17.78" y="40.64"/>
+<instance part="SUPPLY68" gate="GND" x="-5.08" y="40.64"/>
+<instance part="SUPPLY69" gate="GND" x="7.62" y="40.64"/>
+<instance part="SUPPLY70" gate="GND" x="20.32" y="40.64"/>
+<instance part="SUPPLY71" gate="GND" x="33.02" y="40.64"/>
+<instance part="SUPPLY72" gate="GND" x="45.72" y="40.64"/>
+<instance part="C66" gate="G$1" x="-17.78" y="73.66">
+<attribute name="DIELECTRIC" x="-17.78" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-17.78" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-17.78" y="73.66" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="SUPPLY30" gate="GND" x="17.78" y="43.18"/>
-<instance part="SUPPLY31" gate="GND" x="76.2" y="-2.54"/>
-<instance part="R13" gate="G$1" x="30.48" y="40.64" smashed="yes" rot="R270">
-<attribute name="NAME" x="31.9786" y="44.45" size="1.778" layer="95" rot="R270"/>
-<attribute name="VALUE" x="27.178" y="46.99" size="1.778" layer="96" rot="R270"/>
+<instance part="SUPPLY73" gate="GND" x="-17.78" y="63.5"/>
+<instance part="SUPPLY74" gate="GND" x="-5.08" y="63.5"/>
+<instance part="SUPPLY75" gate="GND" x="7.62" y="63.5"/>
+<instance part="SUPPLY76" gate="GND" x="20.32" y="63.5"/>
+<instance part="SUPPLY77" gate="GND" x="33.02" y="63.5"/>
+<instance part="SUPPLY78" gate="GND" x="45.72" y="63.5"/>
+<instance part="SUPPLY79" gate="GND" x="-48.26" y="63.5"/>
+<instance part="SUPPLY80" gate="GND" x="-35.56" y="63.5"/>
+<instance part="SUPPLY81" gate="GND" x="-40.64" y="40.64"/>
+<instance part="SUPPLY82" gate="GND" x="-53.34" y="40.64"/>
+<instance part="SUPPLY83" gate="GND" x="-66.04" y="40.64"/>
+<instance part="SUPPLY84" gate="GND" x="-78.74" y="40.64"/>
+<instance part="SUPPLY85" gate="GND" x="-40.64" y="17.78"/>
+<instance part="SUPPLY86" gate="GND" x="-53.34" y="17.78"/>
+<instance part="SUPPLY87" gate="GND" x="-66.04" y="17.78"/>
+<instance part="C67" gate="G$1" x="-78.74" y="27.94">
+<attribute name="DIELECTRIC" x="-78.74" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-78.74" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-78.74" y="27.94" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="SUPPLY32" gate="GND" x="30.48" y="30.48"/>
-<instance part="R14" gate="G$1" x="109.22" y="43.18" smashed="yes" rot="R180">
-<attribute name="NAME" x="113.03" y="46.7614" size="1.778" layer="95" rot="R180"/>
-<attribute name="VALUE" x="107.95" y="46.482" size="1.778" layer="96" rot="R180"/>
+<instance part="SUPPLY88" gate="GND" x="-78.74" y="17.78"/>
+<instance part="SUPPLY89" gate="GND" x="10.16" y="17.78"/>
+<instance part="SUPPLY90" gate="GND" x="-2.54" y="17.78"/>
+<instance part="SUPPLY91" gate="GND" x="-15.24" y="17.78"/>
+<instance part="SUPPLY92" gate="GND" x="-27.94" y="17.78"/>
+<instance part="SUPPLY93" gate="GND" x="60.96" y="17.78"/>
+<instance part="SUPPLY94" gate="GND" x="48.26" y="17.78"/>
+<instance part="SUPPLY95" gate="GND" x="35.56" y="17.78"/>
+<instance part="SUPPLY96" gate="GND" x="22.86" y="17.78"/>
+<instance part="SUPPLY97" gate="GND" x="73.66" y="17.78"/>
+<instance part="SUPPLY98" gate="GND" x="-71.12" y="-22.86"/>
+<instance part="SUPPLY99" gate="GND" x="-53.34" y="-22.86"/>
+<instance part="SUPPLY100" gate="GND" x="-40.64" y="-22.86"/>
+<instance part="SUPPLY101" gate="GND" x="-27.94" y="-22.86"/>
+<instance part="SUPPLY102" gate="GND" x="-10.16" y="-22.86"/>
+<instance part="SUPPLY103" gate="GND" x="2.54" y="-22.86"/>
+<instance part="SUPPLY104" gate="GND" x="15.24" y="-22.86"/>
+<instance part="SUPPLY105" gate="GND" x="27.94" y="-22.86"/>
+<instance part="SUPPLY106" gate="GND" x="40.64" y="-22.86"/>
+<instance part="FRAME18" gate="G$1" x="-116.84" y="-78.74"/>
+<instance part="C68" gate="G$1" x="-48.26" y="73.66">
+<attribute name="DIELECTRIC" x="-48.26" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-48.26" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-48.26" y="73.66" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="R15" gate="G$1" x="109.22" y="40.64" smashed="yes" rot="R180">
-<attribute name="NAME" x="113.03" y="39.1414" size="1.778" layer="95" rot="R180"/>
+<instance part="C69" gate="G$1" x="-66.04" y="73.66">
+<attribute name="DIELECTRIC" x="-66.04" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-66.04" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-66.04" y="73.66" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="LED9" gate="G$1" x="121.92" y="50.8" rot="MR0"/>
-<instance part="LED10" gate="G$1" x="127" y="50.8" smashed="yes" rot="MR0">
-<attribute name="NAME" x="131.064" y="46.228" size="1.778" layer="95" rot="MR90"/>
-<attribute name="VALUE" x="133.985" y="46.228" size="1.778" layer="96" rot="MR90"/>
+<instance part="C71" gate="G$1" x="-78.74" y="50.8">
+<attribute name="DIELECTRIC" x="-78.74" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-78.74" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-78.74" y="50.8" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="SUPPLY33" gate="GND" x="45.72" y="-2.54"/>
-<instance part="C43" gate="G$1" x="30.48" y="7.62" smashed="yes" rot="R180">
-<attribute name="NAME" x="34.544" y="8.001" size="1.778" layer="95"/>
-<attribute name="VALUE" x="34.544" y="10.541" size="1.778" layer="96"/>
+<instance part="C72" gate="G$1" x="-66.04" y="50.8">
+<attribute name="DIELECTRIC" x="-66.04" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-66.04" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-66.04" y="50.8" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="C44" gate="G$1" x="15.24" y="7.62" smashed="yes" rot="R180">
-<attribute name="NAME" x="11.176" y="9.779" size="1.778" layer="95" rot="R180"/>
-<attribute name="VALUE" x="11.176" y="12.319" size="1.778" layer="96" rot="R180"/>
+<instance part="C73" gate="G$1" x="-53.34" y="50.8">
+<attribute name="DIELECTRIC" x="-53.34" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-53.34" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-53.34" y="50.8" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="SUPPLY34" gate="GND" x="15.24" y="-2.54"/>
-<instance part="SUPPLY35" gate="GND" x="30.48" y="-2.54"/>
-<instance part="FT_VCC3V3" gate="VCC" x="76.2" y="96.52"/>
-<instance part="FT_VCC3V3_1" gate="VCC" x="124.46" y="63.5"/>
-<instance part="C45" gate="G$1" x="12.7" y="-35.56" smashed="yes">
-<attribute name="NAME" x="10.16" y="-31.75" size="1.6764" layer="95" rot="R90"/>
-<attribute name="VALUE" x="7.62" y="-35.56" size="1.6764" layer="96" rot="R90"/>
+<instance part="C74" gate="G$1" x="-40.64" y="50.8">
+<attribute name="DIELECTRIC" x="-40.64" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-40.64" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-40.64" y="50.8" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="C46" gate="G$1" x="20.32" y="-35.56" smashed="yes">
-<attribute name="NAME" x="17.78" y="-31.75" size="1.6764" layer="95" rot="R90"/>
-<attribute name="VALUE" x="25.4" y="-35.56" size="1.6764" layer="96" rot="R90"/>
+<instance part="C75" gate="G$1" x="-66.04" y="27.94">
+<attribute name="DIELECTRIC" x="-66.04" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-66.04" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-66.04" y="27.94" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="SUPPLY36" gate="GND" x="20.32" y="-45.72"/>
-<instance part="C47" gate="G$1" x="142.24" y="-38.1" smashed="yes">
-<attribute name="NAME" x="139.7" y="-34.29" size="1.6764" layer="95" rot="R90"/>
-<attribute name="VALUE" x="137.16" y="-38.1" size="1.6764" layer="96" rot="R90"/>
+<instance part="C76" gate="G$1" x="-53.34" y="27.94">
+<attribute name="DIELECTRIC" x="-53.34" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-53.34" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-53.34" y="27.94" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="C48" gate="G$1" x="149.86" y="-38.1" smashed="yes">
-<attribute name="NAME" x="147.32" y="-34.29" size="1.6764" layer="95" rot="R90"/>
-<attribute name="VALUE" x="154.94" y="-38.1" size="1.6764" layer="96" rot="R90"/>
+<instance part="C77" gate="G$1" x="-40.64" y="27.94">
+<attribute name="DIELECTRIC" x="-40.64" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-40.64" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-40.64" y="27.94" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="SUPPLY37" gate="GND" x="149.86" y="-48.26"/>
-<instance part="C49" gate="G$1" x="71.12" y="-38.1" smashed="yes">
-<attribute name="NAME" x="68.58" y="-34.29" size="1.6764" layer="95" rot="R90"/>
-<attribute name="VALUE" x="76.2" y="-38.1" size="1.6764" layer="96" rot="R90"/>
+<instance part="C78" gate="G$1" x="-27.94" y="27.94">
+<attribute name="DIELECTRIC" x="-27.94" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-27.94" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-27.94" y="27.94" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="C50" gate="G$1" x="58.42" y="-38.1" smashed="yes">
-<attribute name="NAME" x="55.88" y="-39.37" size="1.6764" layer="95" rot="R90"/>
-<attribute name="VALUE" x="63.5" y="-38.1" size="1.6764" layer="96" rot="R90"/>
+<instance part="C79" gate="G$1" x="-15.24" y="27.94">
+<attribute name="DIELECTRIC" x="-15.24" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-15.24" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-15.24" y="27.94" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="SUPPLY38" gate="GND" x="71.12" y="-45.72"/>
-<instance part="C51" gate="G$1" x="116.84" y="-38.1" smashed="yes">
-<attribute name="NAME" x="114.3" y="-34.29" size="1.6764" layer="95" rot="R90"/>
-<attribute name="VALUE" x="121.92" y="-38.1" size="1.6764" layer="96" rot="R90"/>
+<instance part="C80" gate="G$1" x="-2.54" y="27.94">
+<attribute name="DIELECTRIC" x="-2.54" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-2.54" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-2.54" y="27.94" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="C52" gate="G$1" x="104.14" y="-38.1" smashed="yes">
-<attribute name="NAME" x="101.6" y="-39.37" size="1.6764" layer="95" rot="R90"/>
-<attribute name="VALUE" x="109.22" y="-38.1" size="1.6764" layer="96" rot="R90"/>
+<instance part="C81" gate="G$1" x="10.16" y="27.94">
+<attribute name="DIELECTRIC" x="10.16" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="10.16" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="10.16" y="27.94" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="SUPPLY39" gate="GND" x="116.84" y="-45.72"/>
-<instance part="C53" gate="G$1" x="124.46" y="12.7" smashed="yes">
-<attribute name="NAME" x="121.92" y="16.51" size="1.6764" layer="95" rot="R90"/>
+<instance part="C82" gate="G$1" x="22.86" y="27.94">
+<attribute name="DIELECTRIC" x="22.86" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="22.86" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="22.86" y="27.94" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="C54" gate="G$1" x="129.54" y="12.7" smashed="yes">
-<attribute name="NAME" x="127" y="16.51" size="1.6764" layer="95" rot="R90"/>
+<instance part="C83" gate="G$1" x="35.56" y="27.94">
+<attribute name="DIELECTRIC" x="35.56" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="35.56" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="35.56" y="27.94" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="C55" gate="G$1" x="134.62" y="12.7" smashed="yes">
-<attribute name="NAME" x="132.08" y="16.51" size="1.6764" layer="95" rot="R90"/>
-<attribute name="VALUE" x="139.7" y="12.7" size="1.6764" layer="96" rot="R90"/>
+<instance part="C84" gate="G$1" x="48.26" y="27.94">
+<attribute name="DIELECTRIC" x="48.26" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="48.26" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="48.26" y="27.94" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="SUPPLY40" gate="GND" x="129.54" y="-2.54"/>
-<instance part="FT_VCC3V3_2" gate="VCC" x="129.54" y="33.02"/>
-<instance part="FB1" gate="G$1" x="96.52" y="-27.94"/>
-<instance part="FB2" gate="G$1" x="50.8" y="-27.94"/>
-<instance part="CN1" gate="G$1" x="-77.47" y="8.89"/>
-<instance part="SUPPLY41" gate="GND" x="-64.77" y="-2.54"/>
-<instance part="Y1" gate="G$1" x="22.86" y="17.78" smashed="yes">
-<attribute name="NAME" x="22.86" y="12.7" size="1.27" layer="95"/>
-<attribute name="VALUE" x="17.78" y="21.59" size="1.27" layer="96"/>
+<instance part="C85" gate="G$1" x="60.96" y="27.94">
+<attribute name="DIELECTRIC" x="60.96" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="60.96" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="60.96" y="27.94" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="SJ3" gate="1" x="-59.69" y="8.89"/>
-<instance part="SJ4" gate="1" x="-52.07" y="11.43"/>
-<instance part="FRAME2" gate="G$1" x="-114.3" y="-129.54"/>
-</instances>
-<busses>
-</busses>
-<nets>
-<net name="GND" class="1">
-<segment>
-<pinref part="C41" gate="G$1" pin="P$2"/>
-<pinref part="SUPPLY30" gate="GND" pin="GND"/>
-<wire x1="20.32" y1="50.8" x2="20.32" y2="45.72" width="0.1524" layer="91"/>
-<wire x1="20.32" y1="45.72" x2="17.78" y2="45.72" width="0.1524" layer="91"/>
-<wire x1="17.78" y1="45.72" x2="15.24" y2="45.72" width="0.1524" layer="91"/>
-<junction x="17.78" y="45.72"/>
-<pinref part="C42" gate="G$1" pin="P$2"/>
-<wire x1="15.24" y1="45.72" x2="15.24" y2="50.8" width="0.1524" layer="91"/>
-</segment>
-<segment>
-<pinref part="U$3" gate="G$1" pin="GND at 48"/>
-<wire x1="88.9" y1="5.08" x2="88.9" y2="0" width="0.1524" layer="91"/>
-<pinref part="SUPPLY31" gate="GND" pin="GND"/>
-<wire x1="88.9" y1="0" x2="86.36" y2="0" width="0.1524" layer="91"/>
-<pinref part="U$3" gate="G$1" pin="AGND at 4"/>
-<wire x1="86.36" y1="0" x2="83.82" y2="0" width="0.1524" layer="91"/>
-<wire x1="83.82" y1="0" x2="81.28" y2="0" width="0.1524" layer="91"/>
-<wire x1="81.28" y1="0" x2="78.74" y2="0" width="0.1524" layer="91"/>
-<wire x1="78.74" y1="0" x2="76.2" y2="0" width="0.1524" layer="91"/>
-<wire x1="63.5" y1="5.08" x2="63.5" y2="0" width="0.1524" layer="91"/>
-<wire x1="63.5" y1="0" x2="66.04" y2="0" width="0.1524" layer="91"/>
-<junction x="76.2" y="0"/>
-<pinref part="U$3" gate="G$1" pin="AGND at 9"/>
-<wire x1="66.04" y1="0" x2="68.58" y2="0" width="0.1524" layer="91"/>
-<wire x1="68.58" y1="0" x2="71.12" y2="0" width="0.1524" layer="91"/>
-<wire x1="71.12" y1="0" x2="73.66" y2="0" width="0.1524" layer="91"/>
-<wire x1="73.66" y1="0" x2="76.2" y2="0" width="0.1524" layer="91"/>
-<wire x1="66.04" y1="5.08" x2="66.04" y2="0" width="0.1524" layer="91"/>
-<junction x="66.04" y="0"/>
-<pinref part="U$3" gate="G$1" pin="AGND at 41"/>
-<wire x1="68.58" y1="5.08" x2="68.58" y2="0" width="0.1524" layer="91"/>
-<junction x="68.58" y="0"/>
-<pinref part="U$3" gate="G$1" pin="GND at 10"/>
-<wire x1="71.12" y1="5.08" x2="71.12" y2="0" width="0.1524" layer="91"/>
-<junction x="71.12" y="0"/>
-<pinref part="U$3" gate="G$1" pin="GND at 11"/>
-<wire x1="73.66" y1="5.08" x2="73.66" y2="0" width="0.1524" layer="91"/>
-<junction x="73.66" y="0"/>
-<pinref part="U$3" gate="G$1" pin="GND at 22"/>
-<wire x1="76.2" y1="5.08" x2="76.2" y2="0" width="0.1524" layer="91"/>
-<pinref part="U$3" gate="G$1" pin="GND at 23"/>
-<wire x1="78.74" y1="5.08" x2="78.74" y2="0" width="0.1524" layer="91"/>
-<junction x="78.74" y="0"/>
-<pinref part="U$3" gate="G$1" pin="GND at 35"/>
-<wire x1="81.28" y1="5.08" x2="81.28" y2="0" width="0.1524" layer="91"/>
-<junction x="81.28" y="0"/>
-<pinref part="U$3" gate="G$1" pin="GND at 36"/>
-<wire x1="83.82" y1="5.08" x2="83.82" y2="0" width="0.1524" layer="91"/>
-<junction x="83.82" y="0"/>
-<pinref part="U$3" gate="G$1" pin="GND at 47"/>
-<wire x1="86.36" y1="5.08" x2="86.36" y2="0" width="0.1524" layer="91"/>
-<junction x="86.36" y="0"/>
-</segment>
+<instance part="C88" gate="G$1" x="-10.16" y="-12.7">
+<attribute name="DIELECTRIC" x="-10.16" y="-12.7" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-10.16" y="-12.7" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-10.16" y="-12.7" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C89" gate="G$1" x="2.54" y="-12.7">
+<attribute name="DIELECTRIC" x="2.54" y="-12.7" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="2.54" y="-12.7" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="2.54" y="-12.7" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C90" gate="G$1" x="15.24" y="-12.7">
+<attribute name="DIELECTRIC" x="15.24" y="-12.7" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="15.24" y="-12.7" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="15.24" y="-12.7" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C92" gate="G$1" x="27.94" y="-12.7">
+<attribute name="DIELECTRIC" x="27.94" y="-12.7" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="27.94" y="-12.7" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="27.94" y="-12.7" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C93" gate="G$1" x="40.64" y="-12.7">
+<attribute name="DIELECTRIC" x="40.64" y="-12.7" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="40.64" y="-12.7" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="40.64" y="-12.7" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C130" gate="G$1" x="73.66" y="27.94">
+<attribute name="DIELECTRIC" x="73.66" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="73.66" y="27.94" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="73.66" y="27.94" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C142" gate="G$1" x="-5.08" y="73.66">
+<attribute name="DIELECTRIC" x="-5.08" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-5.08" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-5.08" y="73.66" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C143" gate="G$1" x="7.62" y="73.66">
+<attribute name="DIELECTRIC" x="7.62" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="7.62" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="7.62" y="73.66" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C144" gate="G$1" x="20.32" y="73.66">
+<attribute name="DIELECTRIC" x="20.32" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="20.32" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="20.32" y="73.66" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C145" gate="G$1" x="33.02" y="73.66">
+<attribute name="DIELECTRIC" x="33.02" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="33.02" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="33.02" y="73.66" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C146" gate="G$1" x="45.72" y="73.66">
+<attribute name="DIELECTRIC" x="45.72" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="45.72" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="45.72" y="73.66" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C147" gate="G$1" x="-17.78" y="50.8">
+<attribute name="DIELECTRIC" x="-17.78" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-17.78" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-17.78" y="50.8" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C148" gate="G$1" x="-5.08" y="50.8">
+<attribute name="DIELECTRIC" x="-5.08" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-5.08" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-5.08" y="50.8" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C149" gate="G$1" x="7.62" y="50.8">
+<attribute name="DIELECTRIC" x="7.62" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="7.62" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="7.62" y="50.8" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C150" gate="G$1" x="20.32" y="50.8">
+<attribute name="DIELECTRIC" x="20.32" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="20.32" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="20.32" y="50.8" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C151" gate="G$1" x="33.02" y="50.8">
+<attribute name="DIELECTRIC" x="33.02" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="33.02" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="33.02" y="50.8" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C152" gate="G$1" x="45.72" y="50.8">
+<attribute name="DIELECTRIC" x="45.72" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="45.72" y="50.8" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="45.72" y="50.8" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C153" gate="G$1" x="-53.34" y="-12.7">
+<attribute name="DIELECTRIC" x="-53.34" y="-12.7" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-53.34" y="-12.7" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-53.34" y="-12.7" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C154" gate="G$1" x="-40.64" y="-12.7">
+<attribute name="DIELECTRIC" x="-40.64" y="-12.7" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-40.64" y="-12.7" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-40.64" y="-12.7" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C155" gate="G$1" x="-27.94" y="-12.7">
+<attribute name="DIELECTRIC" x="-27.94" y="-12.7" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-27.94" y="-12.7" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-27.94" y="-12.7" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C168" gate="G$1" x="-35.56" y="73.66">
+<attribute name="DIELECTRIC" x="-35.56" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-35.56" y="73.66" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-35.56" y="73.66" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C169" gate="G$1" x="-71.12" y="-12.7">
+<attribute name="DIELECTRIC" x="-71.12" y="-12.7" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-71.12" y="-12.7" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-71.12" y="-12.7" size="1.778" layer="96" display="off"/>
+</instance>
+</instances>
+<busses>
+</busses>
+<nets>
+<net name="GND" class="1">
 <segment>
-<pinref part="R13" gate="G$1" pin="2"/>
-<wire x1="30.48" y1="35.56" x2="30.48" y2="33.02" width="0.1524" layer="91"/>
-<pinref part="SUPPLY32" gate="GND" pin="GND"/>
+<pinref part="SUPPLY65" gate="GND" pin="GND"/>
+<pinref part="C65" gate="G$1" pin="-"/>
+<wire x1="-78.74" y1="66.04" x2="-78.74" y2="68.58" width="0.1524" layer="91"/>
 </segment>
 <segment>
-<pinref part="U$3" gate="G$1" pin="TEST"/>
-<pinref part="SUPPLY33" gate="GND" pin="GND"/>
-<wire x1="45.72" y1="12.7" x2="45.72" y2="0" width="0.1524" layer="91"/>
+<pinref part="SUPPLY66" gate="GND" pin="GND"/>
+<wire x1="-66.04" y1="66.04" x2="-66.04" y2="68.58" width="0.1524" layer="91"/>
+<pinref part="C69" gate="G$1" pin="-"/>
 </segment>
 <segment>
-<pinref part="C44" gate="G$1" pin="1"/>
-<wire x1="15.24" y1="5.08" x2="15.24" y2="0" width="0.1524" layer="91"/>
-<pinref part="SUPPLY34" gate="GND" pin="GND"/>
+<pinref part="SUPPLY67" gate="GND" pin="GND"/>
+<wire x1="-17.78" y1="43.18" x2="-17.78" y2="45.72" width="0.1524" layer="91"/>
+<pinref part="C147" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<wire x1="30.48" y1="5.08" x2="30.48" y2="0" width="0.1524" layer="91"/>
-<pinref part="SUPPLY35" gate="GND" pin="GND"/>
-<pinref part="C43" gate="G$1" pin="1"/>
+<pinref part="SUPPLY68" gate="GND" pin="GND"/>
+<wire x1="-5.08" y1="43.18" x2="-5.08" y2="45.72" width="0.1524" layer="91"/>
+<pinref part="C148" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="C45" gate="G$1" pin="P$2"/>
-<pinref part="SUPPLY36" gate="GND" pin="GND"/>
-<wire x1="12.7" y1="-38.1" x2="12.7" y2="-43.18" width="0.1524" layer="91"/>
-<wire x1="12.7" y1="-43.18" x2="20.32" y2="-43.18" width="0.1524" layer="91"/>
-<pinref part="C46" gate="G$1" pin="P$2"/>
-<wire x1="20.32" y1="-38.1" x2="20.32" y2="-43.18" width="0.1524" layer="91"/>
-<junction x="20.32" y="-43.18"/>
+<pinref part="SUPPLY69" gate="GND" pin="GND"/>
+<wire x1="7.62" y1="43.18" x2="7.62" y2="45.72" width="0.1524" layer="91"/>
+<pinref part="C149" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="C47" gate="G$1" pin="P$2"/>
-<pinref part="SUPPLY37" gate="GND" pin="GND"/>
-<wire x1="142.24" y1="-40.64" x2="142.24" y2="-45.72" width="0.1524" layer="91"/>
-<wire x1="142.24" y1="-45.72" x2="149.86" y2="-45.72" width="0.1524" layer="91"/>
-<pinref part="C48" gate="G$1" pin="P$2"/>
-<wire x1="149.86" y1="-40.64" x2="149.86" y2="-45.72" width="0.1524" layer="91"/>
-<junction x="149.86" y="-45.72"/>
+<pinref part="SUPPLY70" gate="GND" pin="GND"/>
+<wire x1="20.32" y1="43.18" x2="20.32" y2="45.72" width="0.1524" layer="91"/>
+<pinref part="C150" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="C50" gate="G$1" pin="P$2"/>
-<wire x1="58.42" y1="-40.64" x2="58.42" y2="-43.18" width="0.1524" layer="91"/>
-<wire x1="58.42" y1="-43.18" x2="71.12" y2="-43.18" width="0.1524" layer="91"/>
-<pinref part="C49" gate="G$1" pin="P$2"/>
-<wire x1="71.12" y1="-43.18" x2="71.12" y2="-40.64" width="0.1524" layer="91"/>
-<junction x="71.12" y="-43.18"/>
-<pinref part="SUPPLY38" gate="GND" pin="GND"/>
+<pinref part="SUPPLY71" gate="GND" pin="GND"/>
+<wire x1="33.02" y1="43.18" x2="33.02" y2="45.72" width="0.1524" layer="91"/>
+<pinref part="C151" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="C52" gate="G$1" pin="P$2"/>
-<wire x1="104.14" y1="-40.64" x2="104.14" y2="-43.18" width="0.1524" layer="91"/>
-<wire x1="104.14" y1="-43.18" x2="116.84" y2="-43.18" width="0.1524" layer="91"/>
-<pinref part="C51" gate="G$1" pin="P$2"/>
-<wire x1="116.84" y1="-43.18" x2="116.84" y2="-40.64" width="0.1524" layer="91"/>
-<junction x="116.84" y="-43.18"/>
-<pinref part="SUPPLY39" gate="GND" pin="GND"/>
+<pinref part="SUPPLY72" gate="GND" pin="GND"/>
+<wire x1="45.72" y1="43.18" x2="45.72" y2="45.72" width="0.1524" layer="91"/>
+<pinref part="C152" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="C53" gate="G$1" pin="P$2"/>
-<wire x1="124.46" y1="10.16" x2="124.46" y2="5.08" width="0.1524" layer="91"/>
-<wire x1="124.46" y1="5.08" x2="129.54" y2="5.08" width="0.1524" layer="91"/>
-<pinref part="C55" gate="G$1" pin="P$2"/>
-<wire x1="129.54" y1="5.08" x2="134.62" y2="5.08" width="0.1524" layer="91"/>
-<wire x1="134.62" y1="5.08" x2="134.62" y2="10.16" width="0.1524" layer="91"/>
-<pinref part="C54" gate="G$1" pin="P$2"/>
-<wire x1="129.54" y1="10.16" x2="129.54" y2="5.08" width="0.1524" layer="91"/>
-<junction x="129.54" y="5.08"/>
-<pinref part="SUPPLY40" gate="GND" pin="GND"/>
-<wire x1="129.54" y1="5.08" x2="129.54" y2="0" width="0.1524" layer="91"/>
+<pinref part="SUPPLY73" gate="GND" pin="GND"/>
+<pinref part="C66" gate="G$1" pin="2"/>
+<wire x1="-17.78" y1="66.04" x2="-17.78" y2="68.58" width="0.1524" layer="91"/>
 </segment>
 <segment>
-<wire x1="-67.31" y1="3.81" x2="-64.77" y2="3.81" width="0.1524" layer="91"/>
-<pinref part="CN1" gate="G$1" pin="GND"/>
-<pinref part="SUPPLY41" gate="GND" pin="GND"/>
-<wire x1="-64.77" y1="3.81" x2="-64.77" y2="0" width="0.1524" layer="91"/>
+<pinref part="SUPPLY74" gate="GND" pin="GND"/>
+<wire x1="-5.08" y1="66.04" x2="-5.08" y2="68.58" width="0.1524" layer="91"/>
+<pinref part="C142" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="FT_RESET" class="0">
 <segment>
-<pinref part="U$3" gate="G$1" pin="!RESET"/>
-<pinref part="R11" gate="G$1" pin="1"/>
-<wire x1="45.72" y1="50.8" x2="43.18" y2="50.8" width="0.1524" layer="91"/>
+<pinref part="SUPPLY75" gate="GND" pin="GND"/>
+<wire x1="7.62" y1="66.04" x2="7.62" y2="68.58" width="0.1524" layer="91"/>
+<pinref part="C143" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="FT_VCCA" class="0">
 <segment>
-<pinref part="U$3" gate="G$1" pin="VCCA"/>
-<wire x1="45.72" y1="63.5" x2="20.32" y2="63.5" width="0.1524" layer="91"/>
-<wire x1="20.32" y1="63.5" x2="20.32" y2="58.42" width="0.1524" layer="91"/>
-<pinref part="C41" gate="G$1" pin="P$1"/>
+<pinref part="SUPPLY76" gate="GND" pin="GND"/>
+<wire x1="20.32" y1="66.04" x2="20.32" y2="68.58" width="0.1524" layer="91"/>
+<pinref part="C144" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="FT_VCCORE" class="0">
 <segment>
-<pinref part="U$3" gate="G$1" pin="VCCORE"/>
-<wire x1="45.72" y1="66.04" x2="15.24" y2="66.04" width="0.1524" layer="91"/>
-<wire x1="15.24" y1="66.04" x2="15.24" y2="58.42" width="0.1524" layer="91"/>
-<pinref part="C42" gate="G$1" pin="P$1"/>
+<pinref part="SUPPLY77" gate="GND" pin="GND"/>
+<wire x1="33.02" y1="66.04" x2="33.02" y2="68.58" width="0.1524" layer="91"/>
+<pinref part="C145" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="USB_DP" class="0">
 <segment>
-<pinref part="U$3" gate="G$1" pin="DP"/>
-<wire x1="45.72" y1="55.88" x2="43.18" y2="55.88" width="0.1524" layer="91"/>
-<label x="43.18" y="55.88" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="SUPPLY78" gate="GND" pin="GND"/>
+<wire x1="45.72" y1="66.04" x2="45.72" y2="68.58" width="0.1524" layer="91"/>
+<pinref part="C146" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<wire x1="-46.99" y1="11.43" x2="-41.91" y2="11.43" width="0.1524" layer="91"/>
-<label x="-41.91" y="11.43" size="1.016" layer="95" xref="yes"/>
-<pinref part="SJ4" gate="1" pin="2"/>
+<pinref part="SUPPLY79" gate="GND" pin="GND"/>
+<wire x1="-48.26" y1="68.58" x2="-48.26" y2="66.04" width="0.1524" layer="91"/>
+<pinref part="C68" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="USB_DM" class="0">
 <segment>
-<pinref part="U$3" gate="G$1" pin="DM"/>
-<wire x1="45.72" y1="58.42" x2="43.18" y2="58.42" width="0.1524" layer="91"/>
-<label x="43.18" y="58.42" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="SUPPLY80" gate="GND" pin="GND"/>
+<wire x1="-35.56" y1="68.58" x2="-35.56" y2="66.04" width="0.1524" layer="91"/>
+<pinref part="C168" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<wire x1="-54.61" y1="8.89" x2="-41.91" y2="8.89" width="0.1524" layer="91"/>
-<label x="-41.91" y="8.89" size="1.016" layer="95" xref="yes"/>
-<pinref part="SJ3" gate="1" pin="2"/>
+<pinref part="SUPPLY81" gate="GND" pin="GND"/>
+<wire x1="-40.64" y1="45.72" x2="-40.64" y2="43.18" width="0.1524" layer="91"/>
+<pinref part="C74" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="FT_VREGIN" class="0">
 <segment>
-<pinref part="U$3" gate="G$1" pin="VREGIN"/>
-<wire x1="45.72" y1="73.66" x2="43.18" y2="73.66" width="0.1524" layer="91"/>
-<label x="43.18" y="73.66" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="SUPPLY82" gate="GND" pin="GND"/>
+<wire x1="-53.34" y1="45.72" x2="-53.34" y2="43.18" width="0.1524" layer="91"/>
+<pinref part="C73" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="C46" gate="G$1" pin="P$1"/>
-<wire x1="20.32" y1="-30.48" x2="20.32" y2="-22.86" width="0.1524" layer="91"/>
-<wire x1="20.32" y1="-22.86" x2="12.7" y2="-22.86" width="0.1524" layer="91"/>
-<pinref part="C45" gate="G$1" pin="P$1"/>
-<wire x1="12.7" y1="-22.86" x2="12.7" y2="-30.48" width="0.1524" layer="91"/>
-<wire x1="12.7" y1="-22.86" x2="12.7" y2="-17.78" width="0.1524" layer="91"/>
-<junction x="12.7" y="-22.86"/>
-<label x="7.62" y="-15.24" size="1.778" layer="95"/>
+<pinref part="SUPPLY83" gate="GND" pin="GND"/>
+<wire x1="-66.04" y1="45.72" x2="-66.04" y2="43.18" width="0.1524" layer="91"/>
+<pinref part="C72" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<label x="-41.91" y="13.97" size="1.27" layer="95" xref="yes"/>
-<pinref part="CN1" gate="G$1" pin="VBUS"/>
-<wire x1="-67.31" y1="13.97" x2="-41.91" y2="13.97" width="0.1524" layer="91"/>
+<pinref part="SUPPLY84" gate="GND" pin="GND"/>
+<wire x1="-78.74" y1="45.72" x2="-78.74" y2="43.18" width="0.1524" layer="91"/>
+<pinref part="C71" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="FT_REF" class="0">
 <segment>
-<pinref part="U$3" gate="G$1" pin="REF"/>
-<wire x1="45.72" y1="45.72" x2="30.48" y2="45.72" width="0.1524" layer="91"/>
-<pinref part="R13" gate="G$1" pin="1"/>
+<pinref part="SUPPLY85" gate="GND" pin="GND"/>
+<wire x1="-40.64" y1="22.86" x2="-40.64" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="C77" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="N$24" class="0">
 <segment>
-<pinref part="R14" gate="G$1" pin="1"/>
-<wire x1="114.3" y1="43.18" x2="121.92" y2="43.18" width="0.1524" layer="91"/>
-<pinref part="LED9" gate="G$1" pin="C"/>
-<wire x1="121.92" y1="43.18" x2="121.92" y2="45.72" width="0.1524" layer="91"/>
+<pinref part="SUPPLY86" gate="GND" pin="GND"/>
+<wire x1="-53.34" y1="22.86" x2="-53.34" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="C76" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="N$26" class="0">
 <segment>
-<pinref part="R15" gate="G$1" pin="1"/>
-<wire x1="114.3" y1="40.64" x2="127" y2="40.64" width="0.1524" layer="91"/>
-<pinref part="LED10" gate="G$1" pin="C"/>
-<wire x1="127" y1="45.72" x2="127" y2="40.64" width="0.1524" layer="91"/>
+<pinref part="SUPPLY87" gate="GND" pin="GND"/>
+<wire x1="-66.04" y1="22.86" x2="-66.04" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="C75" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="FT_RXLED" class="0">
 <segment>
-<pinref part="U$3" gate="G$1" pin="RXLED#"/>
-<pinref part="R14" gate="G$1" pin="2"/>
-<wire x1="101.6" y1="43.18" x2="104.14" y2="43.18" width="0.1524" layer="91"/>
+<pinref part="C67" gate="G$1" pin="2"/>
+<pinref part="SUPPLY88" gate="GND" pin="GND"/>
+<wire x1="-78.74" y1="22.86" x2="-78.74" y2="20.32" width="0.1524" layer="91"/>
 </segment>
-</net>
-<net name="FT_TXLED" class="0">
 <segment>
-<pinref part="U$3" gate="G$1" pin="TXLED#"/>
-<pinref part="R15" gate="G$1" pin="2"/>
-<wire x1="101.6" y1="40.64" x2="104.14" y2="40.64" width="0.1524" layer="91"/>
+<pinref part="SUPPLY89" gate="GND" pin="GND"/>
+<wire x1="10.16" y1="22.86" x2="10.16" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="C81" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="FT_VCC3V3" class="0">
 <segment>
-<pinref part="U$3" gate="G$1" pin="VCCD"/>
-<wire x1="45.72" y1="68.58" x2="30.48" y2="68.58" width="0.1524" layer="91"/>
-<label x="15.24" y="71.12" size="1.778" layer="95"/>
-<pinref part="R11" gate="G$1" pin="2"/>
-<wire x1="30.48" y1="68.58" x2="15.24" y2="68.58" width="0.1524" layer="91"/>
-<wire x1="33.02" y1="50.8" x2="30.48" y2="50.8" width="0.1524" layer="91"/>
-<wire x1="30.48" y1="50.8" x2="30.48" y2="68.58" width="0.1524" layer="91"/>
-<junction x="30.48" y="68.58"/>
+<pinref part="SUPPLY90" gate="GND" pin="GND"/>
+<wire x1="-2.54" y1="22.86" x2="-2.54" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="C80" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="FT_VCC3V3_1" gate="VCC" pin="VCC"/>
-<wire x1="124.46" y1="60.96" x2="124.46" y2="55.88" width="0.1524" layer="91"/>
-<pinref part="LED9" gate="G$1" pin="A"/>
-<wire x1="121.92" y1="53.34" x2="121.92" y2="55.88" width="0.1524" layer="91"/>
-<wire x1="121.92" y1="55.88" x2="124.46" y2="55.88" width="0.1524" layer="91"/>
-<pinref part="LED10" gate="G$1" pin="A"/>
-<wire x1="124.46" y1="55.88" x2="127" y2="55.88" width="0.1524" layer="91"/>
-<wire x1="127" y1="55.88" x2="127" y2="53.34" width="0.1524" layer="91"/>
-<junction x="124.46" y="55.88"/>
+<pinref part="SUPPLY91" gate="GND" pin="GND"/>
+<wire x1="-15.24" y1="22.86" x2="-15.24" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="C79" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="C47" gate="G$1" pin="P$1"/>
-<wire x1="142.24" y1="-33.02" x2="142.24" y2="-25.4" width="0.1524" layer="91"/>
-<pinref part="C48" gate="G$1" pin="P$1"/>
-<wire x1="142.24" y1="-25.4" x2="142.24" y2="-20.32" width="0.1524" layer="91"/>
-<wire x1="149.86" y1="-33.02" x2="149.86" y2="-25.4" width="0.1524" layer="91"/>
-<wire x1="149.86" y1="-25.4" x2="142.24" y2="-25.4" width="0.1524" layer="91"/>
-<junction x="142.24" y="-25.4"/>
-<label x="139.7" y="-17.78" size="1.778" layer="95"/>
+<pinref part="SUPPLY92" gate="GND" pin="GND"/>
+<wire x1="-27.94" y1="22.86" x2="-27.94" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="C78" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<wire x1="45.72" y1="-27.94" x2="45.72" y2="-17.78" width="0.1524" layer="91"/>
-<label x="40.64" y="-15.24" size="1.778" layer="95"/>
-<pinref part="FB2" gate="G$1" pin="P$1"/>
-<wire x1="48.26" y1="-27.94" x2="45.72" y2="-27.94" width="0.1524" layer="91"/>
+<pinref part="SUPPLY93" gate="GND" pin="GND"/>
+<wire x1="60.96" y1="22.86" x2="60.96" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="C85" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<wire x1="91.44" y1="-27.94" x2="91.44" y2="-17.78" width="0.1524" layer="91"/>
-<label x="86.36" y="-15.24" size="1.778" layer="95"/>
-<pinref part="FB1" gate="G$1" pin="P$1"/>
-<wire x1="93.98" y1="-27.94" x2="91.44" y2="-27.94" width="0.1524" layer="91"/>
+<pinref part="SUPPLY94" gate="GND" pin="GND"/>
+<wire x1="48.26" y1="22.86" x2="48.26" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="C84" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="FT_VCC3V3" gate="VCC" pin="VCC"/>
-<wire x1="76.2" y1="93.98" x2="76.2" y2="86.36" width="0.1524" layer="91"/>
-<pinref part="U$3" gate="G$1" pin="VCCIO at 46"/>
-<wire x1="78.74" y1="81.28" x2="78.74" y2="86.36" width="0.1524" layer="91"/>
-<wire x1="78.74" y1="86.36" x2="76.2" y2="86.36" width="0.1524" layer="91"/>
-<pinref part="U$3" gate="G$1" pin="VCCIO at 24"/>
-<wire x1="76.2" y1="86.36" x2="76.2" y2="81.28" width="0.1524" layer="91"/>
-<junction x="76.2" y="86.36"/>
-<pinref part="U$3" gate="G$1" pin="VCCIO at 12"/>
-<wire x1="73.66" y1="81.28" x2="73.66" y2="86.36" width="0.1524" layer="91"/>
-<wire x1="73.66" y1="86.36" x2="76.2" y2="86.36" width="0.1524" layer="91"/>
+<pinref part="SUPPLY95" gate="GND" pin="GND"/>
+<wire x1="35.56" y1="22.86" x2="35.56" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="C83" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="FT_VCC3V3_2" gate="VCC" pin="VCC"/>
-<wire x1="129.54" y1="30.48" x2="129.54" y2="25.4" width="0.1524" layer="91"/>
-<pinref part="C53" gate="G$1" pin="P$1"/>
-<wire x1="124.46" y1="17.78" x2="124.46" y2="25.4" width="0.1524" layer="91"/>
-<wire x1="124.46" y1="25.4" x2="129.54" y2="25.4" width="0.1524" layer="91"/>
-<pinref part="C54" gate="G$1" pin="P$1"/>
-<wire x1="129.54" y1="25.4" x2="129.54" y2="17.78" width="0.1524" layer="91"/>
-<junction x="129.54" y="25.4"/>
-<pinref part="C55" gate="G$1" pin="P$1"/>
-<wire x1="134.62" y1="17.78" x2="134.62" y2="25.4" width="0.1524" layer="91"/>
-<wire x1="134.62" y1="25.4" x2="129.54" y2="25.4" width="0.1524" layer="91"/>
+<pinref part="SUPPLY96" gate="GND" pin="GND"/>
+<wire x1="22.86" y1="22.86" x2="22.86" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="C82" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="N$22" class="0">
 <segment>
-<pinref part="C43" gate="G$1" pin="2"/>
-<wire x1="25.4" y1="17.78" x2="30.48" y2="17.78" width="0.1524" layer="91"/>
-<wire x1="30.48" y1="17.78" x2="30.48" y2="12.7" width="0.1524" layer="91"/>
-<pinref part="U$3" gate="G$1" pin="XCSO"/>
-<wire x1="45.72" y1="17.78" x2="30.48" y2="17.78" width="0.1524" layer="91"/>
-<junction x="30.48" y="17.78"/>
-<pinref part="Y1" gate="G$1" pin="2"/>
+<wire x1="73.66" y1="22.86" x2="73.66" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="SUPPLY97" gate="GND" pin="GND"/>
+<pinref part="C130" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="N$13" class="0">
 <segment>
-<pinref part="C44" gate="G$1" pin="2"/>
-<wire x1="20.32" y1="17.78" x2="15.24" y2="17.78" width="0.1524" layer="91"/>
-<wire x1="15.24" y1="17.78" x2="15.24" y2="12.7" width="0.1524" layer="91"/>
-<pinref part="U$3" gate="G$1" pin="XCSI"/>
-<wire x1="45.72" y1="30.48" x2="35.56" y2="30.48" width="0.1524" layer="91"/>
-<wire x1="35.56" y1="30.48" x2="35.56" y2="25.4" width="0.1524" layer="91"/>
-<wire x1="35.56" y1="25.4" x2="15.24" y2="25.4" width="0.1524" layer="91"/>
-<wire x1="15.24" y1="25.4" x2="15.24" y2="17.78" width="0.1524" layer="91"/>
-<junction x="15.24" y="17.78"/>
-<pinref part="Y1" gate="G$1" pin="1"/>
+<pinref part="SUPPLY98" gate="GND" pin="GND"/>
+<wire x1="-71.12" y1="-20.32" x2="-71.12" y2="-17.78" width="0.1524" layer="91"/>
+<pinref part="C169" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="FT_TXD" class="0">
 <segment>
-<pinref part="U$3" gate="G$1" pin="TXD"/>
-<wire x1="101.6" y1="73.66" x2="109.22" y2="73.66" width="0.1524" layer="91"/>
-<label x="109.22" y="73.66" size="1.27" layer="95" xref="yes"/>
+<pinref part="SUPPLY99" gate="GND" pin="GND"/>
+<wire x1="-53.34" y1="-20.32" x2="-53.34" y2="-17.78" width="0.1524" layer="91"/>
+<pinref part="C153" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="FT_RXD" class="0">
 <segment>
-<pinref part="U$3" gate="G$1" pin="RXD"/>
-<wire x1="101.6" y1="71.12" x2="109.22" y2="71.12" width="0.1524" layer="91"/>
-<label x="109.22" y="71.12" size="1.27" layer="95" xref="yes"/>
+<pinref part="SUPPLY100" gate="GND" pin="GND"/>
+<wire x1="-40.64" y1="-20.32" x2="-40.64" y2="-17.78" width="0.1524" layer="91"/>
+<pinref part="C154" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="FT_VPHY" class="0">
 <segment>
-<pinref part="U$3" gate="G$1" pin="VPHY"/>
-<wire x1="68.58" y1="81.28" x2="68.58" y2="86.36" width="0.1524" layer="91"/>
-<wire x1="68.58" y1="86.36" x2="53.34" y2="86.36" width="0.1524" layer="91"/>
-<label x="53.34" y="86.36" size="1.778" layer="95"/>
+<pinref part="SUPPLY101" gate="GND" pin="GND"/>
+<wire x1="-27.94" y1="-20.32" x2="-27.94" y2="-17.78" width="0.1524" layer="91"/>
+<pinref part="C155" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="C49" gate="G$1" pin="P$1"/>
-<wire x1="58.42" y1="-27.94" x2="71.12" y2="-27.94" width="0.1524" layer="91"/>
-<wire x1="71.12" y1="-27.94" x2="71.12" y2="-33.02" width="0.1524" layer="91"/>
-<pinref part="C50" gate="G$1" pin="P$1"/>
-<wire x1="58.42" y1="-33.02" x2="58.42" y2="-27.94" width="0.1524" layer="91"/>
-<junction x="58.42" y="-27.94"/>
-<wire x1="71.12" y1="-27.94" x2="71.12" y2="-17.78" width="0.1524" layer="91"/>
-<junction x="71.12" y="-27.94"/>
-<label x="68.58" y="-15.24" size="1.778" layer="95"/>
-<pinref part="FB2" gate="G$1" pin="P$2"/>
-<wire x1="58.42" y1="-27.94" x2="53.34" y2="-27.94" width="0.1524" layer="91"/>
+<pinref part="SUPPLY103" gate="GND" pin="GND"/>
+<wire x1="2.54" y1="-20.32" x2="2.54" y2="-17.78" width="0.1524" layer="91"/>
+<pinref part="C89" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="FT_VPLL" class="0">
 <segment>
-<pinref part="U$3" gate="G$1" pin="VPLL"/>
-<wire x1="71.12" y1="81.28" x2="71.12" y2="91.44" width="0.1524" layer="91"/>
-<wire x1="71.12" y1="91.44" x2="53.34" y2="91.44" width="0.1524" layer="91"/>
-<label x="53.34" y="91.44" size="1.778" layer="95"/>
+<pinref part="SUPPLY102" gate="GND" pin="GND"/>
+<wire x1="-10.16" y1="-20.32" x2="-10.16" y2="-17.78" width="0.1524" layer="91"/>
+<pinref part="C88" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="C51" gate="G$1" pin="P$1"/>
-<wire x1="104.14" y1="-27.94" x2="116.84" y2="-27.94" width="0.1524" layer="91"/>
-<wire x1="116.84" y1="-27.94" x2="116.84" y2="-33.02" width="0.1524" layer="91"/>
-<pinref part="C52" gate="G$1" pin="P$1"/>
-<wire x1="104.14" y1="-33.02" x2="104.14" y2="-27.94" width="0.1524" layer="91"/>
-<junction x="104.14" y="-27.94"/>
-<wire x1="116.84" y1="-27.94" x2="116.84" y2="-17.78" width="0.1524" layer="91"/>
-<junction x="116.84" y="-27.94"/>
-<label x="114.3" y="-15.24" size="1.778" layer="95"/>
-<pinref part="FB1" gate="G$1" pin="P$2"/>
-<wire x1="104.14" y1="-27.94" x2="99.06" y2="-27.94" width="0.1524" layer="91"/>
+<pinref part="SUPPLY104" gate="GND" pin="GND"/>
+<wire x1="15.24" y1="-20.32" x2="15.24" y2="-17.78" width="0.1524" layer="91"/>
+<pinref part="C90" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="USBDM" class="0">
 <segment>
-<wire x1="-67.31" y1="8.89" x2="-64.77" y2="8.89" width="0.1524" layer="91"/>
-<pinref part="CN1" gate="G$1" pin="D-"/>
-<pinref part="SJ3" gate="1" pin="1"/>
+<pinref part="SUPPLY105" gate="GND" pin="GND"/>
+<wire x1="27.94" y1="-20.32" x2="27.94" y2="-17.78" width="0.1524" layer="91"/>
+<pinref part="C92" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="USBDP" class="0">
 <segment>
-<wire x1="-67.31" y1="11.43" x2="-57.15" y2="11.43" width="0.1524" layer="91"/>
-<pinref part="CN1" gate="G$1" pin="D+"/>
-<pinref part="SJ4" gate="1" pin="1"/>
+<pinref part="SUPPLY106" gate="GND" pin="GND"/>
+<wire x1="40.64" y1="-20.32" x2="40.64" y2="-17.78" width="0.1524" layer="91"/>
+<pinref part="C93" gate="G$1" pin="2"/>
+</segment>
+</net>
+<net name="FPGA_VCCAUX_1V8" class="0">
+<segment>
+<wire x1="40.64" y1="-10.16" x2="40.64" y2="-7.62" width="0.1524" layer="91"/>
+<wire x1="40.64" y1="-7.62" x2="27.94" y2="-7.62" width="0.1524" layer="91"/>
+<wire x1="27.94" y1="-7.62" x2="15.24" y2="-7.62" width="0.1524" layer="91"/>
+<wire x1="15.24" y1="-7.62" x2="2.54" y2="-7.62" width="0.1524" layer="91"/>
+<wire x1="2.54" y1="-7.62" x2="-10.16" y2="-7.62" width="0.1524" layer="91"/>
+<wire x1="-10.16" y1="-7.62" x2="-27.94" y2="-7.62" width="0.1524" layer="91"/>
+<wire x1="-27.94" y1="-7.62" x2="-40.64" y2="-7.62" width="0.1524" layer="91"/>
+<wire x1="-40.64" y1="-7.62" x2="-53.34" y2="-7.62" width="0.1524" layer="91"/>
+<wire x1="-53.34" y1="-7.62" x2="-71.12" y2="-7.62" width="0.1524" layer="91"/>
+<wire x1="-71.12" y1="-7.62" x2="-71.12" y2="-10.16" width="0.1524" layer="91"/>
+<wire x1="-53.34" y1="-10.16" x2="-53.34" y2="-7.62" width="0.1524" layer="91"/>
+<junction x="-53.34" y="-7.62"/>
+<wire x1="-40.64" y1="-10.16" x2="-40.64" y2="-7.62" width="0.1524" layer="91"/>
+<junction x="-40.64" y="-7.62"/>
+<wire x1="-27.94" y1="-10.16" x2="-27.94" y2="-7.62" width="0.1524" layer="91"/>
+<junction x="-27.94" y="-7.62"/>
+<wire x1="-10.16" y1="-10.16" x2="-10.16" y2="-7.62" width="0.1524" layer="91"/>
+<junction x="-10.16" y="-7.62"/>
+<wire x1="2.54" y1="-10.16" x2="2.54" y2="-7.62" width="0.1524" layer="91"/>
+<junction x="2.54" y="-7.62"/>
+<wire x1="15.24" y1="-10.16" x2="15.24" y2="-7.62" width="0.1524" layer="91"/>
+<junction x="15.24" y="-7.62"/>
+<wire x1="27.94" y1="-10.16" x2="27.94" y2="-7.62" width="0.1524" layer="91"/>
+<junction x="27.94" y="-7.62"/>
+<wire x1="-71.12" y1="-7.62" x2="-96.52" y2="-7.62" width="0.1524" layer="91"/>
+<junction x="-71.12" y="-7.62"/>
+<label x="-93.98" y="-7.62" size="1.778" layer="95"/>
+<pinref part="C88" gate="G$1" pin="1"/>
+<pinref part="C89" gate="G$1" pin="1"/>
+<pinref part="C90" gate="G$1" pin="1"/>
+<pinref part="C92" gate="G$1" pin="1"/>
+<pinref part="C93" gate="G$1" pin="1"/>
+<pinref part="C153" gate="G$1" pin="1"/>
+<pinref part="C154" gate="G$1" pin="1"/>
+<pinref part="C155" gate="G$1" pin="1"/>
+<pinref part="C169" gate="G$1" pin="1"/>
+</segment>
+</net>
+<net name="FPGA_VCCINT_1V0" class="0">
+<segment>
+<wire x1="-66.04" y1="78.74" x2="-66.04" y2="76.2" width="0.1524" layer="91"/>
+<pinref part="C65" gate="G$1" pin="+"/>
+<wire x1="-78.74" y1="76.2" x2="-78.74" y2="78.74" width="0.1524" layer="91"/>
+<wire x1="-78.74" y1="78.74" x2="-66.04" y2="78.74" width="0.1524" layer="91"/>
+<junction x="-78.74" y="78.74"/>
+<wire x1="-78.74" y1="78.74" x2="-104.14" y2="78.74" width="0.1524" layer="91"/>
+<label x="-101.6" y="78.74" size="1.778" layer="95"/>
+<wire x1="-48.26" y1="76.2" x2="-48.26" y2="78.74" width="0.1524" layer="91"/>
+<wire x1="-48.26" y1="78.74" x2="-66.04" y2="78.74" width="0.1524" layer="91"/>
+<junction x="-66.04" y="78.74"/>
+<wire x1="-35.56" y1="76.2" x2="-35.56" y2="78.74" width="0.1524" layer="91"/>
+<wire x1="-35.56" y1="78.74" x2="-48.26" y2="78.74" width="0.1524" layer="91"/>
+<junction x="-48.26" y="78.74"/>
+<wire x1="45.72" y1="76.2" x2="45.72" y2="78.74" width="0.1524" layer="91"/>
+<wire x1="45.72" y1="78.74" x2="33.02" y2="78.74" width="0.1524" layer="91"/>
+<junction x="-35.56" y="78.74"/>
+<pinref part="C66" gate="G$1" pin="1"/>
+<wire x1="33.02" y1="78.74" x2="20.32" y2="78.74" width="0.1524" layer="91"/>
+<wire x1="20.32" y1="78.74" x2="7.62" y2="78.74" width="0.1524" layer="91"/>
+<wire x1="7.62" y1="78.74" x2="-5.08" y2="78.74" width="0.1524" layer="91"/>
+<wire x1="-5.08" y1="78.74" x2="-17.78" y2="78.74" width="0.1524" layer="91"/>
+<wire x1="-17.78" y1="78.74" x2="-35.56" y2="78.74" width="0.1524" layer="91"/>
+<wire x1="-17.78" y1="76.2" x2="-17.78" y2="78.74" width="0.1524" layer="91"/>
+<junction x="-17.78" y="78.74"/>
+<wire x1="-5.08" y1="76.2" x2="-5.08" y2="78.74" width="0.1524" layer="91"/>
+<junction x="-5.08" y="78.74"/>
+<wire x1="7.62" y1="76.2" x2="7.62" y2="78.74" width="0.1524" layer="91"/>
+<junction x="7.62" y="78.74"/>
+<wire x1="20.32" y1="76.2" x2="20.32" y2="78.74" width="0.1524" layer="91"/>
+<junction x="20.32" y="78.74"/>
+<wire x1="33.02" y1="76.2" x2="33.02" y2="78.74" width="0.1524" layer="91"/>
+<junction x="33.02" y="78.74"/>
+<wire x1="45.72" y1="78.74" x2="58.42" y2="78.74" width="0.1524" layer="91"/>
+<junction x="45.72" y="78.74"/>
+<wire x1="58.42" y1="78.74" x2="58.42" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="45.72" y1="53.34" x2="45.72" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="33.02" y1="53.34" x2="33.02" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="-17.78" y1="53.34" x2="-17.78" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="20.32" y1="53.34" x2="20.32" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="20.32" y1="55.88" x2="7.62" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="7.62" y1="55.88" x2="-5.08" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="-5.08" y1="55.88" x2="-17.78" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="-5.08" y1="53.34" x2="-5.08" y2="55.88" width="0.1524" layer="91"/>
+<junction x="-5.08" y="55.88"/>
+<wire x1="7.62" y1="53.34" x2="7.62" y2="55.88" width="0.1524" layer="91"/>
+<junction x="7.62" y="55.88"/>
+<wire x1="33.02" y1="55.88" x2="20.32" y2="55.88" width="0.1524" layer="91"/>
+<junction x="20.32" y="55.88"/>
+<wire x1="45.72" y1="55.88" x2="33.02" y2="55.88" width="0.1524" layer="91"/>
+<junction x="33.02" y="55.88"/>
+<wire x1="58.42" y1="55.88" x2="45.72" y2="55.88" width="0.1524" layer="91"/>
+<junction x="45.72" y="55.88"/>
+<wire x1="-78.74" y1="53.34" x2="-78.74" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="-78.74" y1="55.88" x2="-66.04" y2="55.88" width="0.1524" layer="91"/>
+<junction x="-17.78" y="55.88"/>
+<wire x1="-66.04" y1="55.88" x2="-53.34" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="-53.34" y1="55.88" x2="-40.64" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="-40.64" y1="55.88" x2="-17.78" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="-66.04" y1="53.34" x2="-66.04" y2="55.88" width="0.1524" layer="91"/>
+<junction x="-66.04" y="55.88"/>
+<wire x1="-53.34" y1="55.88" x2="-53.34" y2="53.34" width="0.1524" layer="91"/>
+<junction x="-53.34" y="55.88"/>
+<wire x1="-40.64" y1="53.34" x2="-40.64" y2="55.88" width="0.1524" layer="91"/>
+<junction x="-40.64" y="55.88"/>
+<wire x1="-78.74" y1="55.88" x2="-91.44" y2="55.88" width="0.1524" layer="91"/>
+<junction x="-78.74" y="55.88"/>
+<wire x1="-91.44" y1="55.88" x2="-91.44" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="-91.44" y1="33.02" x2="-78.74" y2="33.02" width="0.1524" layer="91"/>
+<pinref part="C67" gate="G$1" pin="1"/>
+<wire x1="-78.74" y1="30.48" x2="-78.74" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="-66.04" y1="30.48" x2="-66.04" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="-66.04" y1="33.02" x2="-78.74" y2="33.02" width="0.1524" layer="91"/>
+<junction x="-78.74" y="33.02"/>
+<wire x1="-53.34" y1="30.48" x2="-53.34" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="-53.34" y1="33.02" x2="-66.04" y2="33.02" width="0.1524" layer="91"/>
+<junction x="-66.04" y="33.02"/>
+<wire x1="48.26" y1="30.48" x2="48.26" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="48.26" y1="33.02" x2="35.56" y2="33.02" width="0.1524" layer="91"/>
+<junction x="-53.34" y="33.02"/>
+<wire x1="35.56" y1="33.02" x2="22.86" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="22.86" y1="33.02" x2="10.16" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="10.16" y1="33.02" x2="-2.54" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="-2.54" y1="33.02" x2="-15.24" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="-15.24" y1="33.02" x2="-27.94" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="-27.94" y1="33.02" x2="-40.64" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="-40.64" y1="33.02" x2="-53.34" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="73.66" y1="30.48" x2="73.66" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="73.66" y1="33.02" x2="60.96" y2="33.02" width="0.1524" layer="91"/>
+<junction x="48.26" y="33.02"/>
+<wire x1="60.96" y1="33.02" x2="48.26" y2="33.02" width="0.1524" layer="91"/>
+<wire x1="60.96" y1="30.48" x2="60.96" y2="33.02" width="0.1524" layer="91"/>
+<junction x="60.96" y="33.02"/>
+<wire x1="-40.64" y1="30.48" x2="-40.64" y2="33.02" width="0.1524" layer="91"/>
+<junction x="-40.64" y="33.02"/>
+<wire x1="-27.94" y1="30.48" x2="-27.94" y2="33.02" width="0.1524" layer="91"/>
+<junction x="-27.94" y="33.02"/>
+<wire x1="-15.24" y1="30.48" x2="-15.24" y2="33.02" width="0.1524" layer="91"/>
+<junction x="-15.24" y="33.02"/>
+<wire x1="-2.54" y1="30.48" x2="-2.54" y2="33.02" width="0.1524" layer="91"/>
+<junction x="-2.54" y="33.02"/>
+<wire x1="10.16" y1="30.48" x2="10.16" y2="33.02" width="0.1524" layer="91"/>
+<junction x="10.16" y="33.02"/>
+<wire x1="22.86" y1="30.48" x2="22.86" y2="33.02" width="0.1524" layer="91"/>
+<junction x="22.86" y="33.02"/>
+<wire x1="35.56" y1="30.48" x2="35.56" y2="33.02" width="0.1524" layer="91"/>
+<junction x="35.56" y="33.02"/>
+<pinref part="C68" gate="G$1" pin="1"/>
+<pinref part="C69" gate="G$1" pin="+"/>
+<pinref part="C71" gate="G$1" pin="1"/>
+<pinref part="C72" gate="G$1" pin="1"/>
+<pinref part="C73" gate="G$1" pin="1"/>
+<pinref part="C74" gate="G$1" pin="1"/>
+<pinref part="C75" gate="G$1" pin="1"/>
+<pinref part="C76" gate="G$1" pin="1"/>
+<pinref part="C77" gate="G$1" pin="1"/>
+<pinref part="C78" gate="G$1" pin="1"/>
+<pinref part="C79" gate="G$1" pin="1"/>
+<pinref part="C80" gate="G$1" pin="1"/>
+<pinref part="C81" gate="G$1" pin="1"/>
+<pinref part="C82" gate="G$1" pin="1"/>
+<pinref part="C83" gate="G$1" pin="1"/>
+<pinref part="C84" gate="G$1" pin="1"/>
+<pinref part="C85" gate="G$1" pin="1"/>
+<pinref part="C130" gate="G$1" pin="1"/>
+<pinref part="C142" gate="G$1" pin="1"/>
+<pinref part="C143" gate="G$1" pin="1"/>
+<pinref part="C144" gate="G$1" pin="1"/>
+<pinref part="C145" gate="G$1" pin="1"/>
+<pinref part="C146" gate="G$1" pin="1"/>
+<pinref part="C147" gate="G$1" pin="1"/>
+<pinref part="C148" gate="G$1" pin="1"/>
+<pinref part="C149" gate="G$1" pin="1"/>
+<pinref part="C150" gate="G$1" pin="1"/>
+<pinref part="C151" gate="G$1" pin="1"/>
+<pinref part="C152" gate="G$1" pin="1"/>
+<pinref part="C168" gate="G$1" pin="1"/>
 </segment>
 </net>
 </nets>
 </sheet>
 <sheet>
-<description>Tamper circuit
-Master Key Memory</description>
+<description>Pavel 4-2</description>
 <plain>
-<text x="104.14" y="-22.86" size="1.27" layer="91">CS pull-up to disable MKM by
-default (allows programming
-of AVR)</text>
-<text x="-25.4" y="-55.88" size="1.27" layer="91">Pull-down CONTROL to
-enable 0 (AVR) by default</text>
-<text x="71.12" y="22.86" size="2.54" layer="91">Master Key Memory</text>
-<text x="12.7" y="22.86" size="2.54" layer="91">Analog switch</text>
-<text x="-5.08" y="139.7" size="2.54" layer="91">AVR Tiny Tamper Detect MCU</text>
-<text x="-40.64" y="-48.26" size="1.27" layer="91" rot="R180">Make AVR unable to read the
-MKM by installing this jumper</text>
-<text x="208.28" y="73.66" size="2.54" layer="91">Panic button</text>
-<text x="213.36" y="20.32" size="2.54" layer="91">Expansion GPIO</text>
+<text x="0" y="78.74" size="1.778" layer="91"><-- Place small 0.47 uF caps right under the BGA package
+<-- Place medium 4.7 uF caps very close to the BGA package
+<-- Place large 47 uF caps not far from the BGA package
+
+<-- Place one of four 47 uF caps on every side of the BGA package
+<-- Distribute six sets of caps among six FPGA I/O banks</text>
+<text x="-104.14" y="101.6" size="1.778" layer="91">*) Decoupling capacitors for VCCO</text>
 </plain>
 <instances>
-<instance part="U3" gate="A" x="33.02" y="88.9"/>
-<instance part="FRAME4" gate="G$1" x="-114.3" y="-96.52"/>
-<instance part="P+19" gate="VCC" x="-33.02" y="129.54"/>
-<instance part="SUPPLY44" gate="GND" x="-35.56" y="45.72"/>
-<instance part="JP3" gate="G$1" x="142.24" y="63.5" smashed="yes">
-<attribute name="NAME" x="137.922" y="69.342" size="1.778" layer="95"/>
-<attribute name="VALUE" x="117.856" y="53.34" size="1.778" layer="96"/>
+<instance part="SUPPLY107" gate="GND" x="-142.24" y="78.74"/>
+<instance part="SUPPLY108" gate="GND" x="-129.54" y="78.74"/>
+<instance part="SUPPLY109" gate="GND" x="-116.84" y="78.74"/>
+<instance part="SUPPLY110" gate="GND" x="-104.14" y="78.74"/>
+<instance part="SUPPLY111" gate="GND" x="-81.28" y="78.74"/>
+<instance part="SUPPLY112" gate="GND" x="-68.58" y="78.74"/>
+<instance part="SUPPLY113" gate="GND" x="-50.8" y="78.74"/>
+<instance part="SUPPLY114" gate="GND" x="-38.1" y="78.74"/>
+<instance part="SUPPLY115" gate="GND" x="-25.4" y="78.74"/>
+<instance part="SUPPLY116" gate="GND" x="-12.7" y="78.74"/>
+<instance part="SUPPLY117" gate="GND" x="-81.28" y="55.88"/>
+<instance part="SUPPLY118" gate="GND" x="-68.58" y="55.88"/>
+<instance part="SUPPLY119" gate="GND" x="-50.8" y="55.88"/>
+<instance part="SUPPLY120" gate="GND" x="-38.1" y="55.88"/>
+<instance part="SUPPLY121" gate="GND" x="-25.4" y="55.88"/>
+<instance part="SUPPLY122" gate="GND" x="-12.7" y="55.88"/>
+<instance part="SUPPLY123" gate="GND" x="-81.28" y="33.02"/>
+<instance part="SUPPLY124" gate="GND" x="-68.58" y="33.02"/>
+<instance part="SUPPLY125" gate="GND" x="-50.8" y="33.02"/>
+<instance part="SUPPLY126" gate="GND" x="-38.1" y="33.02"/>
+<instance part="SUPPLY127" gate="GND" x="-25.4" y="33.02"/>
+<instance part="SUPPLY128" gate="GND" x="-12.7" y="33.02"/>
+<instance part="SUPPLY129" gate="GND" x="-81.28" y="10.16"/>
+<instance part="SUPPLY130" gate="GND" x="-68.58" y="10.16"/>
+<instance part="SUPPLY131" gate="GND" x="-50.8" y="10.16"/>
+<instance part="SUPPLY132" gate="GND" x="-38.1" y="10.16"/>
+<instance part="SUPPLY133" gate="GND" x="-25.4" y="10.16"/>
+<instance part="SUPPLY134" gate="GND" x="-12.7" y="10.16"/>
+<instance part="SUPPLY135" gate="GND" x="-81.28" y="-12.7"/>
+<instance part="SUPPLY136" gate="GND" x="-68.58" y="-12.7"/>
+<instance part="SUPPLY137" gate="GND" x="-50.8" y="-12.7"/>
+<instance part="SUPPLY138" gate="GND" x="-38.1" y="-12.7"/>
+<instance part="SUPPLY139" gate="GND" x="-25.4" y="-12.7"/>
+<instance part="SUPPLY140" gate="GND" x="-12.7" y="-12.7"/>
+<instance part="SUPPLY141" gate="GND" x="-81.28" y="-35.56"/>
+<instance part="SUPPLY142" gate="GND" x="-68.58" y="-35.56"/>
+<instance part="SUPPLY143" gate="GND" x="-50.8" y="-35.56"/>
+<instance part="SUPPLY144" gate="GND" x="-38.1" y="-35.56"/>
+<instance part="SUPPLY145" gate="GND" x="-25.4" y="-35.56"/>
+<instance part="SUPPLY146" gate="GND" x="-12.7" y="-35.56"/>
+<instance part="FRAME17" gate="G$1" x="-177.8" y="-63.5"/>
+<instance part="C97" gate="G$1" x="-50.8" y="88.9">
+<attribute name="DIELECTRIC" x="-50.8" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-50.8" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-50.8" y="88.9" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="P+18" gate="VCC" x="154.94" y="76.2"/>
-<instance part="R16" gate="G$1" x="121.92" y="101.6" rot="R90"/>
-<instance part="P+20" gate="VCC" x="121.92" y="116.84"/>
-<instance part="SUPPLY45" gate="GND" x="154.94" y="45.72"/>
-<instance part="U4" gate="A" x="35.56" y="-33.02"/>
-<instance part="U5" gate="A" x="88.9" y="-22.86"/>
-<instance part="SUPPLY46" gate="GND" x="68.58" y="-48.26"/>
-<instance part="P+21" gate="VCC" x="68.58" y="15.24"/>
-<instance part="R17" gate="G$1" x="63.5" y="-27.94"/>
-<instance part="P+22" gate="VCC" x="12.7" y="15.24"/>
-<instance part="SUPPLY47" gate="GND" x="12.7" y="-71.12"/>
-<instance part="R18" gate="G$1" x="63.5" y="-10.16" rot="R90"/>
-<instance part="R19" gate="G$1" x="5.08" y="-58.42" rot="R90"/>
-<instance part="P+23" gate="VCC" x="53.34" y="-27.94" rot="R90"/>
-<instance part="C58" gate="G$1" x="-53.34" y="106.68" smashed="yes">
-<attribute name="NAME" x="-54.61" y="119.38" size="1.27" layer="95"/>
-<attribute name="VALUE" x="-53.34" y="121.92" size="1.27" layer="96" rot="R90"/>
+<instance part="C98" gate="G$1" x="-38.1" y="88.9">
+<attribute name="DIELECTRIC" x="-38.1" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-38.1" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-38.1" y="88.9" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="C59" gate="G$1" x="-40.64" y="106.68" smashed="yes">
-<attribute name="NAME" x="-40.64" y="119.38" size="1.27" layer="95" font="vector"/>
-<attribute name="VALUE" x="-40.64" y="121.92" size="1.27" layer="96" font="vector" rot="R90"/>
+<instance part="C100" gate="G$1" x="-25.4" y="88.9">
+<attribute name="DIELECTRIC" x="-25.4" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-25.4" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-25.4" y="88.9" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="C60" gate="G$1" x="-45.72" y="106.68" smashed="yes">
-<attribute name="NAME" x="-45.72" y="119.38" size="1.27" layer="95" font="vector"/>
-<attribute name="VALUE" x="-45.72" y="121.92" size="1.27" layer="96" font="vector" rot="R90"/>
+<instance part="C101" gate="G$1" x="-12.7" y="88.9">
+<attribute name="DIELECTRIC" x="-12.7" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-12.7" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-12.7" y="88.9" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="C61" gate="G$1" x="7.62" y="0" smashed="yes">
-<attribute name="NAME" x="10.16" y="-2.54" size="1.27" layer="95" font="vector"/>
-<attribute name="VALUE" x="10.16" y="0" size="1.27" layer="96" font="vector"/>
+<instance part="C102" gate="G$1" x="-50.8" y="66.04">
+<attribute name="DIELECTRIC" x="-50.8" y="66.04" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-50.8" y="66.04" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-50.8" y="66.04" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="C62" gate="G$1" x="73.66" y="5.08" smashed="yes">
-<attribute name="NAME" x="76.2" y="7.62" size="1.27" layer="95" font="vector"/>
-<attribute name="VALUE" x="76.2" y="5.08" size="1.27" layer="96" font="vector"/>
+<instance part="C105" gate="G$1" x="-38.1" y="66.04">
+<attribute name="DIELECTRIC" x="-38.1" y="66.04" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-38.1" y="66.04" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-38.1" y="66.04" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="SUPPLY48" gate="GND" x="73.66" y="-2.54"/>
-<instance part="SUPPLY49" gate="GND" x="7.62" y="-7.62"/>
-<instance part="SUPPLY50" gate="GND" x="-45.72" y="93.98"/>
-<instance part="JP4" gate="A" x="-33.02" y="-48.26"/>
-<instance part="SUPPLY51" gate="GND" x="-33.02" y="-60.96"/>
-<instance part="LED1" gate="G$1" x="238.76" y="-45.72" smashed="yes" rot="R90">
-<attribute name="NAME" x="243.332" y="-42.164" size="1.778" layer="95" rot="R180"/>
-<attribute name="VALUE" x="258.572" y="-45.085" size="1.778" layer="96" rot="R180"/>
+<instance part="C106" gate="G$1" x="-25.4" y="66.04">
+<attribute name="DIELECTRIC" x="-25.4" y="66.04" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-25.4" y="66.04" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-25.4" y="66.04" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="LED2" gate="G$1" x="233.68" y="-48.26" smashed="yes" rot="R90">
-<attribute name="VALUE" x="258.572" y="-47.625" size="1.778" layer="96" rot="R180"/>
+<instance part="C107" gate="G$1" x="-12.7" y="66.04">
+<attribute name="DIELECTRIC" x="-12.7" y="66.04" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-12.7" y="66.04" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-12.7" y="66.04" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="LED3" gate="G$1" x="238.76" y="-50.8" smashed="yes" rot="R90">
-<attribute name="VALUE" x="258.572" y="-50.165" size="1.778" layer="96" rot="R180"/>
+<instance part="C108" gate="G$1" x="-50.8" y="43.18">
+<attribute name="DIELECTRIC" x="-50.8" y="43.18" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-50.8" y="43.18" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-50.8" y="43.18" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="LED4" gate="G$1" x="233.68" y="-53.34" smashed="yes" rot="R90">
-<attribute name="VALUE" x="258.572" y="-52.705" size="1.778" layer="96" rot="R180"/>
+<instance part="C109" gate="G$1" x="-38.1" y="43.18">
+<attribute name="DIELECTRIC" x="-38.1" y="43.18" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-38.1" y="43.18" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-38.1" y="43.18" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C113" gate="G$1" x="-25.4" y="43.18">
+<attribute name="DIELECTRIC" x="-25.4" y="43.18" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-25.4" y="43.18" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-25.4" y="43.18" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C117" gate="G$1" x="-12.7" y="43.18">
+<attribute name="DIELECTRIC" x="-12.7" y="43.18" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-12.7" y="43.18" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-12.7" y="43.18" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C118" gate="G$1" x="-50.8" y="20.32">
+<attribute name="DIELECTRIC" x="-50.8" y="20.32" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-50.8" y="20.32" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-50.8" y="20.32" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C119" gate="G$1" x="-38.1" y="20.32">
+<attribute name="DIELECTRIC" x="-38.1" y="20.32" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-38.1" y="20.32" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-38.1" y="20.32" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C120" gate="G$1" x="-25.4" y="20.32">
+<attribute name="DIELECTRIC" x="-25.4" y="20.32" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-25.4" y="20.32" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-25.4" y="20.32" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C121" gate="G$1" x="-12.7" y="20.32">
+<attribute name="DIELECTRIC" x="-12.7" y="20.32" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-12.7" y="20.32" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-12.7" y="20.32" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C122" gate="G$1" x="-50.8" y="-2.54">
+<attribute name="DIELECTRIC" x="-50.8" y="-2.54" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-50.8" y="-2.54" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-50.8" y="-2.54" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C123" gate="G$1" x="-38.1" y="-2.54">
+<attribute name="DIELECTRIC" x="-38.1" y="-2.54" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-38.1" y="-2.54" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-38.1" y="-2.54" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C124" gate="G$1" x="-25.4" y="-2.54">
+<attribute name="DIELECTRIC" x="-25.4" y="-2.54" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-25.4" y="-2.54" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-25.4" y="-2.54" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C125" gate="G$1" x="-12.7" y="-2.54">
+<attribute name="DIELECTRIC" x="-12.7" y="-2.54" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-12.7" y="-2.54" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-12.7" y="-2.54" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C126" gate="G$1" x="-50.8" y="-25.4">
+<attribute name="DIELECTRIC" x="-50.8" y="-25.4" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-50.8" y="-25.4" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-50.8" y="-25.4" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C127" gate="G$1" x="-38.1" y="-25.4">
+<attribute name="DIELECTRIC" x="-38.1" y="-25.4" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-38.1" y="-25.4" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-38.1" y="-25.4" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C128" gate="G$1" x="-25.4" y="-25.4">
+<attribute name="DIELECTRIC" x="-25.4" y="-25.4" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-25.4" y="-25.4" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-25.4" y="-25.4" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C129" gate="G$1" x="-12.7" y="-25.4">
+<attribute name="DIELECTRIC" x="-12.7" y="-25.4" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-12.7" y="-25.4" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-12.7" y="-25.4" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C156" gate="G$1" x="-81.28" y="88.9">
+<attribute name="DIELECTRIC" x="-81.28" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-81.28" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-81.28" y="88.9" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C157" gate="G$1" x="-68.58" y="88.9">
+<attribute name="DIELECTRIC" x="-68.58" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-68.58" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-68.58" y="88.9" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C158" gate="G$1" x="-68.58" y="66.04">
+<attribute name="DIELECTRIC" x="-68.58" y="66.04" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-68.58" y="66.04" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-68.58" y="66.04" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C159" gate="G$1" x="-81.28" y="66.04">
+<attribute name="DIELECTRIC" x="-81.28" y="66.04" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-81.28" y="66.04" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-81.28" y="66.04" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C160" gate="G$1" x="-81.28" y="43.18">
+<attribute name="DIELECTRIC" x="-81.28" y="43.18" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-81.28" y="43.18" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-81.28" y="43.18" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C161" gate="G$1" x="-68.58" y="43.18">
+<attribute name="DIELECTRIC" x="-68.58" y="43.18" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-68.58" y="43.18" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-68.58" y="43.18" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C162" gate="G$1" x="-68.58" y="20.32">
+<attribute name="DIELECTRIC" x="-68.58" y="20.32" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-68.58" y="20.32" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-68.58" y="20.32" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C163" gate="G$1" x="-81.28" y="20.32">
+<attribute name="DIELECTRIC" x="-81.28" y="20.32" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-81.28" y="20.32" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-81.28" y="20.32" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C164" gate="G$1" x="-81.28" y="-2.54">
+<attribute name="DIELECTRIC" x="-81.28" y="-2.54" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-81.28" y="-2.54" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-81.28" y="-2.54" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C165" gate="G$1" x="-68.58" y="-2.54">
+<attribute name="DIELECTRIC" x="-68.58" y="-2.54" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-68.58" y="-2.54" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-68.58" y="-2.54" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C166" gate="G$1" x="-68.58" y="-25.4">
+<attribute name="DIELECTRIC" x="-68.58" y="-25.4" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-68.58" y="-25.4" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-68.58" y="-25.4" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C167" gate="G$1" x="-81.28" y="-25.4">
+<attribute name="DIELECTRIC" x="-81.28" y="-25.4" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-81.28" y="-25.4" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-81.28" y="-25.4" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C170" gate="G$1" x="-142.24" y="88.9">
+<attribute name="DIELECTRIC" x="-142.24" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-142.24" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-142.24" y="88.9" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C171" gate="G$1" x="-129.54" y="88.9">
+<attribute name="DIELECTRIC" x="-129.54" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-129.54" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-129.54" y="88.9" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C172" gate="G$1" x="-116.84" y="88.9">
+<attribute name="DIELECTRIC" x="-116.84" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-116.84" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-116.84" y="88.9" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C173" gate="G$1" x="-104.14" y="88.9">
+<attribute name="DIELECTRIC" x="-104.14" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-104.14" y="88.9" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-104.14" y="88.9" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="SUPPLY23" gate="GND" x="251.46" y="-53.34" rot="R90"/>
-<instance part="R7" gate="A" x="218.44" y="-53.34" rot="R180"/>
-<instance part="JP5" gate="G$1" x="241.3" y="-7.62" rot="R180"/>
-<instance part="SUPPLY52" gate="GND" x="226.06" y="-17.78"/>
-<instance part="P+24" gate="VCC" x="226.06" y="15.24"/>
-<instance part="U$4" gate="A" x="231.14" y="58.42"/>
-<instance part="SUPPLY53" gate="GND" x="248.92" y="40.64"/>
-<instance part="JP6" gate="G$1" x="238.76" y="111.76" rot="R180"/>
-<instance part="SUPPLY54" gate="GND" x="226.06" y="101.6"/>
-<instance part="P+25" gate="VCC" x="218.44" y="121.92"/>
-<instance part="P+26" gate="VCC" x="226.06" y="121.92"/>
 </instances>
 <busses>
 </busses>
 <nets>
 <net name="GND" class="1">
 <segment>
-<pinref part="U3" gate="A" pin="GND_2"/>
-<pinref part="SUPPLY44" gate="GND" pin="GND"/>
-<wire x1="-22.86" y1="60.96" x2="-35.56" y2="60.96" width="0.1524" layer="91"/>
-<wire x1="-35.56" y1="60.96" x2="-35.56" y2="58.42" width="0.1524" layer="91"/>
-<pinref part="U3" gate="A" pin="GND"/>
-<wire x1="-35.56" y1="58.42" x2="-35.56" y2="48.26" width="0.1524" layer="91"/>
-<wire x1="-22.86" y1="58.42" x2="-35.56" y2="58.42" width="0.1524" layer="91"/>
-<junction x="-35.56" y="58.42"/>
+<pinref part="SUPPLY107" gate="GND" pin="GND"/>
+<wire x1="-142.24" y1="81.28" x2="-142.24" y2="83.82" width="0.1524" layer="91"/>
+<pinref part="C170" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="JP3" gate="G$1" pin="6"/>
-<pinref part="SUPPLY45" gate="GND" pin="GND"/>
-<wire x1="152.4" y1="60.96" x2="154.94" y2="60.96" width="0.1524" layer="91"/>
-<wire x1="154.94" y1="60.96" x2="154.94" y2="48.26" width="0.1524" layer="91"/>
+<pinref part="SUPPLY108" gate="GND" pin="GND"/>
+<wire x1="-129.54" y1="81.28" x2="-129.54" y2="83.82" width="0.1524" layer="91"/>
+<pinref part="C171" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="SUPPLY46" gate="GND" pin="GND"/>
-<wire x1="68.58" y1="-35.56" x2="68.58" y2="-45.72" width="0.1524" layer="91"/>
-<pinref part="U5" gate="A" pin="VSS"/>
-<wire x1="68.58" y1="-35.56" x2="71.12" y2="-35.56" width="0.1524" layer="91"/>
+<pinref part="SUPPLY109" gate="GND" pin="GND"/>
+<wire x1="-116.84" y1="81.28" x2="-116.84" y2="83.82" width="0.1524" layer="91"/>
+<pinref part="C172" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="U4" gate="A" pin="VSS"/>
-<pinref part="SUPPLY47" gate="GND" pin="GND"/>
-<wire x1="17.78" y1="-58.42" x2="12.7" y2="-58.42" width="0.1524" layer="91"/>
-<wire x1="12.7" y1="-58.42" x2="12.7" y2="-66.04" width="0.1524" layer="91"/>
-<pinref part="U4" gate="A" pin="VEE"/>
-<wire x1="12.7" y1="-66.04" x2="12.7" y2="-68.58" width="0.1524" layer="91"/>
-<wire x1="17.78" y1="-55.88" x2="12.7" y2="-55.88" width="0.1524" layer="91"/>
-<wire x1="12.7" y1="-55.88" x2="12.7" y2="-58.42" width="0.1524" layer="91"/>
-<junction x="12.7" y="-58.42"/>
-<pinref part="R19" gate="G$1" pin="1"/>
-<wire x1="5.08" y1="-63.5" x2="5.08" y2="-66.04" width="0.1524" layer="91"/>
-<wire x1="5.08" y1="-66.04" x2="12.7" y2="-66.04" width="0.1524" layer="91"/>
-<junction x="12.7" y="-66.04"/>
+<pinref part="SUPPLY110" gate="GND" pin="GND"/>
+<wire x1="-104.14" y1="81.28" x2="-104.14" y2="83.82" width="0.1524" layer="91"/>
+<pinref part="C173" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="C62" gate="G$1" pin="P$2"/>
-<wire x1="73.66" y1="2.54" x2="73.66" y2="0" width="0.1524" layer="91"/>
-<pinref part="SUPPLY48" gate="GND" pin="GND"/>
+<pinref part="SUPPLY111" gate="GND" pin="GND"/>
+<wire x1="-81.28" y1="81.28" x2="-81.28" y2="83.82" width="0.1524" layer="91"/>
+<pinref part="C156" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="C61" gate="G$1" pin="P$2"/>
-<wire x1="7.62" y1="-2.54" x2="7.62" y2="-5.08" width="0.1524" layer="91"/>
-<pinref part="SUPPLY49" gate="GND" pin="GND"/>
+<pinref part="SUPPLY112" gate="GND" pin="GND"/>
+<wire x1="-68.58" y1="83.82" x2="-68.58" y2="81.28" width="0.1524" layer="91"/>
+<pinref part="C157" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="C58" gate="G$1" pin="P$2"/>
-<wire x1="-53.34" y1="104.14" x2="-53.34" y2="99.06" width="0.1524" layer="91"/>
-<pinref part="SUPPLY50" gate="GND" pin="GND"/>
-<wire x1="-53.34" y1="99.06" x2="-45.72" y2="99.06" width="0.1524" layer="91"/>
-<wire x1="-45.72" y1="99.06" x2="-45.72" y2="96.52" width="0.1524" layer="91"/>
-<pinref part="C59" gate="G$1" pin="P$2"/>
-<wire x1="-40.64" y1="104.14" x2="-40.64" y2="99.06" width="0.1524" layer="91"/>
-<wire x1="-40.64" y1="99.06" x2="-45.72" y2="99.06" width="0.1524" layer="91"/>
-<junction x="-45.72" y="99.06"/>
-<pinref part="C60" gate="G$1" pin="P$2"/>
-<wire x1="-45.72" y1="104.14" x2="-45.72" y2="99.06" width="0.1524" layer="91"/>
+<pinref part="SUPPLY113" gate="GND" pin="GND"/>
+<wire x1="-50.8" y1="81.28" x2="-50.8" y2="83.82" width="0.1524" layer="91"/>
+<pinref part="C97" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="JP4" gate="A" pin="1"/>
-<pinref part="SUPPLY51" gate="GND" pin="GND"/>
-<wire x1="-33.02" y1="-55.88" x2="-33.02" y2="-58.42" width="0.1524" layer="91"/>
+<pinref part="SUPPLY114" gate="GND" pin="GND"/>
+<wire x1="-38.1" y1="83.82" x2="-38.1" y2="81.28" width="0.1524" layer="91"/>
+<pinref part="C98" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="LED1" gate="G$1" pin="C"/>
-<wire x1="243.84" y1="-45.72" x2="246.38" y2="-45.72" width="0.1524" layer="91"/>
-<pinref part="LED2" gate="G$1" pin="C"/>
-<wire x1="246.38" y1="-53.34" x2="246.38" y2="-50.8" width="0.1524" layer="91"/>
-<wire x1="246.38" y1="-50.8" x2="246.38" y2="-48.26" width="0.1524" layer="91"/>
-<wire x1="246.38" y1="-48.26" x2="246.38" y2="-45.72" width="0.1524" layer="91"/>
-<wire x1="238.76" y1="-48.26" x2="246.38" y2="-48.26" width="0.1524" layer="91"/>
-<pinref part="LED4" gate="G$1" pin="C"/>
-<wire x1="238.76" y1="-53.34" x2="246.38" y2="-53.34" width="0.1524" layer="91"/>
-<pinref part="LED3" gate="G$1" pin="C"/>
-<wire x1="243.84" y1="-50.8" x2="246.38" y2="-50.8" width="0.1524" layer="91"/>
-<junction x="246.38" y="-50.8"/>
-<junction x="246.38" y="-48.26"/>
-<pinref part="SUPPLY23" gate="GND" pin="GND"/>
-<wire x1="248.92" y1="-53.34" x2="246.38" y2="-53.34" width="0.1524" layer="91"/>
-<junction x="246.38" y="-53.34"/>
+<pinref part="SUPPLY115" gate="GND" pin="GND"/>
+<wire x1="-25.4" y1="81.28" x2="-25.4" y2="83.82" width="0.1524" layer="91"/>
+<pinref part="C100" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="JP5" gate="G$1" pin="10"/>
-<wire x1="231.14" y1="-12.7" x2="226.06" y2="-12.7" width="0.1524" layer="91"/>
-<wire x1="226.06" y1="-12.7" x2="226.06" y2="-15.24" width="0.1524" layer="91"/>
-<pinref part="SUPPLY52" gate="GND" pin="GND"/>
+<pinref part="SUPPLY116" gate="GND" pin="GND"/>
+<wire x1="-12.7" y1="83.82" x2="-12.7" y2="81.28" width="0.1524" layer="91"/>
+<pinref part="C101" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="U$4" gate="A" pin="G1"/>
-<pinref part="SUPPLY53" gate="GND" pin="GND"/>
-<wire x1="246.38" y1="60.96" x2="248.92" y2="60.96" width="0.1524" layer="91"/>
-<wire x1="248.92" y1="60.96" x2="248.92" y2="55.88" width="0.1524" layer="91"/>
-<pinref part="U$4" gate="A" pin="G2"/>
-<wire x1="248.92" y1="55.88" x2="248.92" y2="48.26" width="0.1524" layer="91"/>
-<wire x1="248.92" y1="48.26" x2="248.92" y2="43.18" width="0.1524" layer="91"/>
-<wire x1="246.38" y1="55.88" x2="248.92" y2="55.88" width="0.1524" layer="91"/>
-<junction x="248.92" y="55.88"/>
-<pinref part="U$4" gate="A" pin="B2"/>
-<wire x1="238.76" y1="48.26" x2="248.92" y2="48.26" width="0.1524" layer="91"/>
-<junction x="248.92" y="48.26"/>
-<pinref part="U$4" gate="A" pin="B1"/>
-<wire x1="238.76" y1="68.58" x2="248.92" y2="68.58" width="0.1524" layer="91"/>
-<wire x1="248.92" y1="68.58" x2="248.92" y2="60.96" width="0.1524" layer="91"/>
-<junction x="248.92" y="60.96"/>
+<pinref part="SUPPLY117" gate="GND" pin="GND"/>
+<wire x1="-81.28" y1="58.42" x2="-81.28" y2="60.96" width="0.1524" layer="91"/>
+<pinref part="C159" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="JP6" gate="G$1" pin="3"/>
-<wire x1="231.14" y1="109.22" x2="226.06" y2="109.22" width="0.1524" layer="91"/>
-<pinref part="SUPPLY54" gate="GND" pin="GND"/>
-<wire x1="226.06" y1="109.22" x2="226.06" y2="104.14" width="0.1524" layer="91"/>
+<pinref part="SUPPLY118" gate="GND" pin="GND"/>
+<wire x1="-68.58" y1="60.96" x2="-68.58" y2="58.42" width="0.1524" layer="91"/>
+<pinref part="C158" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="AVR_RESET" class="0">
 <segment>
-<pinref part="JP3" gate="G$1" pin="5"/>
-<wire x1="134.62" y1="60.96" x2="121.92" y2="60.96" width="0.1524" layer="91"/>
-<wire x1="121.92" y1="60.96" x2="121.92" y2="86.36" width="0.1524" layer="91"/>
-<pinref part="U3" gate="A" pin="PD2_(!PCINT26/ADC26/RESET/DW)"/>
-<wire x1="121.92" y1="86.36" x2="88.9" y2="86.36" width="0.1524" layer="91"/>
-<wire x1="121.92" y1="86.36" x2="121.92" y2="96.52" width="0.1524" layer="91"/>
-<junction x="121.92" y="86.36"/>
-<pinref part="R16" gate="G$1" pin="1"/>
+<pinref part="SUPPLY119" gate="GND" pin="GND"/>
+<wire x1="-50.8" y1="58.42" x2="-50.8" y2="60.96" width="0.1524" layer="91"/>
+<pinref part="C102" gate="G$1" pin="2"/>
+</segment>
+<segment>
+<pinref part="SUPPLY120" gate="GND" pin="GND"/>
+<wire x1="-38.1" y1="60.96" x2="-38.1" y2="58.42" width="0.1524" layer="91"/>
+<pinref part="C105" gate="G$1" pin="2"/>
+</segment>
+<segment>
+<pinref part="SUPPLY121" gate="GND" pin="GND"/>
+<wire x1="-25.4" y1="58.42" x2="-25.4" y2="60.96" width="0.1524" layer="91"/>
+<pinref part="C106" gate="G$1" pin="2"/>
+</segment>
+<segment>
+<pinref part="SUPPLY122" gate="GND" pin="GND"/>
+<wire x1="-12.7" y1="60.96" x2="-12.7" y2="58.42" width="0.1524" layer="91"/>
+<pinref part="C107" gate="G$1" pin="2"/>
+</segment>
+<segment>
+<pinref part="SUPPLY123" gate="GND" pin="GND"/>
+<wire x1="-81.28" y1="35.56" x2="-81.28" y2="38.1" width="0.1524" layer="91"/>
+<pinref part="C160" gate="G$1" pin="2"/>
+</segment>
+<segment>
+<pinref part="SUPPLY124" gate="GND" pin="GND"/>
+<wire x1="-68.58" y1="38.1" x2="-68.58" y2="35.56" width="0.1524" layer="91"/>
+<pinref part="C161" gate="G$1" pin="2"/>
+</segment>
+<segment>
+<pinref part="SUPPLY125" gate="GND" pin="GND"/>
+<wire x1="-50.8" y1="35.56" x2="-50.8" y2="38.1" width="0.1524" layer="91"/>
+<pinref part="C108" gate="G$1" pin="2"/>
+</segment>
+<segment>
+<pinref part="SUPPLY126" gate="GND" pin="GND"/>
+<wire x1="-38.1" y1="38.1" x2="-38.1" y2="35.56" width="0.1524" layer="91"/>
+<pinref part="C109" gate="G$1" pin="2"/>
+</segment>
+<segment>
+<pinref part="SUPPLY127" gate="GND" pin="GND"/>
+<wire x1="-25.4" y1="35.56" x2="-25.4" y2="38.1" width="0.1524" layer="91"/>
+<pinref part="C113" gate="G$1" pin="2"/>
+</segment>
+<segment>
+<pinref part="SUPPLY128" gate="GND" pin="GND"/>
+<wire x1="-12.7" y1="38.1" x2="-12.7" y2="35.56" width="0.1524" layer="91"/>
+<pinref part="C117" gate="G$1" pin="2"/>
+</segment>
+<segment>
+<pinref part="SUPPLY129" gate="GND" pin="GND"/>
+<wire x1="-81.28" y1="12.7" x2="-81.28" y2="15.24" width="0.1524" layer="91"/>
+<pinref part="C163" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="N$31" class="0">
 <segment>
-<pinref part="U5" gate="A" pin="!HOLD"/>
-<pinref part="R17" gate="G$1" pin="2"/>
-<wire x1="71.12" y1="-25.4" x2="68.58" y2="-25.4" width="0.1524" layer="91"/>
-<wire x1="68.58" y1="-25.4" x2="68.58" y2="-27.94" width="0.1524" layer="91"/>
+<pinref part="SUPPLY130" gate="GND" pin="GND"/>
+<wire x1="-68.58" y1="15.24" x2="-68.58" y2="12.7" width="0.1524" layer="91"/>
+<pinref part="C162" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="MKM_SCK" class="0">
 <segment>
-<pinref part="U5" gate="A" pin="SCK"/>
-<pinref part="U4" gate="A" pin="Z"/>
-<wire x1="71.12" y1="-22.86" x2="53.34" y2="-22.86" width="0.1524" layer="91"/>
+<pinref part="SUPPLY131" gate="GND" pin="GND"/>
+<wire x1="-50.8" y1="12.7" x2="-50.8" y2="15.24" width="0.1524" layer="91"/>
+<pinref part="C118" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="MKM_MOSI" class="0">
 <segment>
-<pinref part="U4" gate="A" pin="Y"/>
-<pinref part="U5" gate="A" pin="SI"/>
-<wire x1="53.34" y1="-20.32" x2="71.12" y2="-20.32" width="0.1524" layer="91"/>
+<pinref part="SUPPLY132" gate="GND" pin="GND"/>
+<wire x1="-38.1" y1="15.24" x2="-38.1" y2="12.7" width="0.1524" layer="91"/>
+<pinref part="C119" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="!MKM_CS" class="0">
 <segment>
-<pinref part="U5" gate="A" pin="!CS"/>
-<pinref part="U4" gate="A" pin="X"/>
-<wire x1="71.12" y1="-17.78" x2="63.5" y2="-17.78" width="0.1524" layer="91"/>
-<pinref part="R18" gate="G$1" pin="1"/>
-<wire x1="63.5" y1="-17.78" x2="53.34" y2="-17.78" width="0.1524" layer="91"/>
-<wire x1="63.5" y1="-15.24" x2="63.5" y2="-17.78" width="0.1524" layer="91"/>
-<junction x="63.5" y="-17.78"/>
+<pinref part="SUPPLY133" gate="GND" pin="GND"/>
+<wire x1="-25.4" y1="12.7" x2="-25.4" y2="15.24" width="0.1524" layer="91"/>
+<pinref part="C120" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="MKM_MISO" class="0">
 <segment>
-<pinref part="U4" gate="A" pin="W"/>
-<wire x1="53.34" y1="-15.24" x2="55.88" y2="-15.24" width="0.1524" layer="91"/>
-<wire x1="55.88" y1="-15.24" x2="55.88" y2="17.78" width="0.1524" layer="91"/>
-<wire x1="55.88" y1="17.78" x2="109.22" y2="17.78" width="0.1524" layer="91"/>
-<wire x1="109.22" y1="17.78" x2="109.22" y2="-12.7" width="0.1524" layer="91"/>
-<pinref part="U5" gate="A" pin="SO"/>
-<wire x1="109.22" y1="-12.7" x2="106.68" y2="-12.7" width="0.1524" layer="91"/>
+<pinref part="SUPPLY134" gate="GND" pin="GND"/>
+<wire x1="-12.7" y1="15.24" x2="-12.7" y2="12.7" width="0.1524" layer="91"/>
+<pinref part="C121" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="3V3_BATT" class="0">
 <segment>
-<pinref part="U5" gate="A" pin="VCC"/>
-<pinref part="P+21" gate="VCC" pin="VCC"/>
-<wire x1="71.12" y1="-12.7" x2="68.58" y2="-12.7" width="0.1524" layer="91"/>
-<wire x1="68.58" y1="-12.7" x2="68.58" y2="0" width="0.1524" layer="91"/>
-<pinref part="R18" gate="G$1" pin="2"/>
-<wire x1="68.58" y1="0" x2="68.58" y2="10.16" width="0.1524" layer="91"/>
-<wire x1="68.58" y1="10.16" x2="68.58" y2="12.7" width="0.1524" layer="91"/>
-<wire x1="63.5" y1="-5.08" x2="63.5" y2="0" width="0.1524" layer="91"/>
-<wire x1="63.5" y1="0" x2="68.58" y2="0" width="0.1524" layer="91"/>
-<junction x="68.58" y="0"/>
-<pinref part="C62" gate="G$1" pin="P$1"/>
-<wire x1="73.66" y1="10.16" x2="68.58" y2="10.16" width="0.1524" layer="91"/>
-<junction x="68.58" y="10.16"/>
-<label x="71.12" y="15.24" size="1.27" layer="95"/>
+<pinref part="SUPPLY135" gate="GND" pin="GND"/>
+<wire x1="-81.28" y1="-10.16" x2="-81.28" y2="-7.62" width="0.1524" layer="91"/>
+<pinref part="C164" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="U4" gate="A" pin="VDD"/>
-<pinref part="P+22" gate="VCC" pin="VCC"/>
-<wire x1="17.78" y1="-15.24" x2="12.7" y2="-15.24" width="0.1524" layer="91"/>
-<wire x1="12.7" y1="-15.24" x2="12.7" y2="5.08" width="0.1524" layer="91"/>
-<wire x1="12.7" y1="5.08" x2="12.7" y2="12.7" width="0.1524" layer="91"/>
-<wire x1="12.7" y1="5.08" x2="7.62" y2="5.08" width="0.1524" layer="91"/>
-<junction x="12.7" y="5.08"/>
-<pinref part="C61" gate="G$1" pin="P$1"/>
-<label x="15.24" y="15.24" size="1.27" layer="95"/>
+<pinref part="SUPPLY136" gate="GND" pin="GND"/>
+<wire x1="-68.58" y1="-7.62" x2="-68.58" y2="-10.16" width="0.1524" layer="91"/>
+<pinref part="C165" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="JP3" gate="G$1" pin="2"/>
-<pinref part="P+18" gate="VCC" pin="VCC"/>
-<wire x1="152.4" y1="66.04" x2="154.94" y2="66.04" width="0.1524" layer="91"/>
-<wire x1="154.94" y1="66.04" x2="154.94" y2="73.66" width="0.1524" layer="91"/>
-<label x="147.32" y="81.28" size="1.27" layer="95"/>
+<pinref part="SUPPLY137" gate="GND" pin="GND"/>
+<wire x1="-50.8" y1="-10.16" x2="-50.8" y2="-7.62" width="0.1524" layer="91"/>
+<pinref part="C122" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="R17" gate="G$1" pin="1"/>
-<pinref part="P+23" gate="VCC" pin="VCC"/>
-<wire x1="58.42" y1="-27.94" x2="55.88" y2="-27.94" width="0.1524" layer="91"/>
+<pinref part="SUPPLY138" gate="GND" pin="GND"/>
+<wire x1="-38.1" y1="-7.62" x2="-38.1" y2="-10.16" width="0.1524" layer="91"/>
+<pinref part="C123" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="R16" gate="G$1" pin="2"/>
-<pinref part="P+20" gate="VCC" pin="VCC"/>
-<wire x1="121.92" y1="106.68" x2="121.92" y2="114.3" width="0.1524" layer="91"/>
-<label x="124.46" y="116.84" size="1.27" layer="95"/>
+<pinref part="SUPPLY139" gate="GND" pin="GND"/>
+<wire x1="-25.4" y1="-10.16" x2="-25.4" y2="-7.62" width="0.1524" layer="91"/>
+<pinref part="C124" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="U3" gate="A" pin="VCC"/>
-<wire x1="-22.86" y1="111.76" x2="-33.02" y2="111.76" width="0.1524" layer="91"/>
-<wire x1="-33.02" y1="111.76" x2="-33.02" y2="114.3" width="0.1524" layer="91"/>
-<pinref part="U3" gate="A" pin="AVCC"/>
-<wire x1="-33.02" y1="114.3" x2="-33.02" y2="127" width="0.1524" layer="91"/>
-<wire x1="-22.86" y1="114.3" x2="-33.02" y2="114.3" width="0.1524" layer="91"/>
-<junction x="-33.02" y="114.3"/>
-<pinref part="P+19" gate="VCC" pin="VCC"/>
-<pinref part="C58" gate="G$1" pin="P$1"/>
-<wire x1="-33.02" y1="114.3" x2="-40.64" y2="114.3" width="0.1524" layer="91"/>
-<wire x1="-40.64" y1="114.3" x2="-45.72" y2="114.3" width="0.1524" layer="91"/>
-<wire x1="-45.72" y1="114.3" x2="-53.34" y2="114.3" width="0.1524" layer="91"/>
-<wire x1="-53.34" y1="114.3" x2="-53.34" y2="111.76" width="0.1524" layer="91"/>
-<pinref part="C60" gate="G$1" pin="P$1"/>
-<wire x1="-45.72" y1="114.3" x2="-45.72" y2="111.76" width="0.1524" layer="91"/>
-<junction x="-45.72" y="114.3"/>
-<pinref part="C59" gate="G$1" pin="P$1"/>
-<wire x1="-40.64" y1="114.3" x2="-40.64" y2="111.76" width="0.1524" layer="91"/>
-<junction x="-40.64" y="114.3"/>
-<label x="-30.48" y="129.54" size="1.27" layer="95"/>
+<pinref part="SUPPLY140" gate="GND" pin="GND"/>
+<wire x1="-12.7" y1="-7.62" x2="-12.7" y2="-10.16" width="0.1524" layer="91"/>
+<pinref part="C125" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="JP6" gate="G$1" pin="2"/>
-<pinref part="P+25" gate="VCC" pin="VCC"/>
-<wire x1="231.14" y1="111.76" x2="218.44" y2="111.76" width="0.1524" layer="91"/>
-<wire x1="218.44" y1="111.76" x2="218.44" y2="119.38" width="0.1524" layer="91"/>
-<label x="218.44" y="124.46" size="1.27" layer="95" rot="R90"/>
+<pinref part="SUPPLY141" gate="GND" pin="GND"/>
+<wire x1="-81.28" y1="-33.02" x2="-81.28" y2="-30.48" width="0.1524" layer="91"/>
+<pinref part="C167" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<wire x1="226.06" y1="10.16" x2="226.06" y2="12.7" width="0.1524" layer="91"/>
-<pinref part="JP5" gate="G$1" pin="1"/>
-<wire x1="231.14" y1="10.16" x2="226.06" y2="10.16" width="0.1524" layer="91"/>
-<label x="228.6" y="15.24" size="1.778" layer="95"/>
+<pinref part="SUPPLY142" gate="GND" pin="GND"/>
+<wire x1="-68.58" y1="-30.48" x2="-68.58" y2="-33.02" width="0.1524" layer="91"/>
+<pinref part="C166" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="MKM_CONTROL" class="0">
 <segment>
-<pinref part="U4" gate="A" pin="CONTROL"/>
-<pinref part="R19" gate="G$1" pin="2"/>
-<wire x1="17.78" y1="-50.8" x2="5.08" y2="-50.8" width="0.1524" layer="91"/>
-<wire x1="5.08" y1="-50.8" x2="5.08" y2="-53.34" width="0.1524" layer="91"/>
-<wire x1="5.08" y1="-50.8" x2="0" y2="-50.8" width="0.1524" layer="91"/>
-<junction x="5.08" y="-50.8"/>
-<label x="0" y="-50.8" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="SUPPLY143" gate="GND" pin="GND"/>
+<wire x1="-50.8" y1="-33.02" x2="-50.8" y2="-30.48" width="0.1524" layer="91"/>
+<pinref part="C126" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<wire x1="93.98" y1="114.3" x2="88.9" y2="114.3" width="0.1524" layer="91"/>
-<label x="93.98" y="114.3" size="1.27" layer="95" xref="yes"/>
-<pinref part="U3" gate="A" pin="PC0_(PCINT16/ADC16/TOCC0/SS/XCK)"/>
+<pinref part="SUPPLY144" gate="GND" pin="GND"/>
+<wire x1="-38.1" y1="-30.48" x2="-38.1" y2="-33.02" width="0.1524" layer="91"/>
+<pinref part="C127" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="MKM_AVR_SCK" class="0">
 <segment>
-<pinref part="U4" gate="A" pin="Z1"/>
-<wire x1="17.78" y1="-45.72" x2="12.7" y2="-45.72" width="0.1524" layer="91"/>
-<label x="12.7" y="-45.72" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="SUPPLY145" gate="GND" pin="GND"/>
+<wire x1="-25.4" y1="-33.02" x2="-25.4" y2="-30.48" width="0.1524" layer="91"/>
+<pinref part="C128" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="U3" gate="A" pin="PD3_(PCINT27/ADC27/SCL/SCK)"/>
-<wire x1="93.98" y1="83.82" x2="124.46" y2="83.82" width="0.1524" layer="91"/>
-<wire x1="124.46" y1="83.82" x2="124.46" y2="63.5" width="0.1524" layer="91"/>
-<pinref part="JP3" gate="G$1" pin="3"/>
-<wire x1="134.62" y1="63.5" x2="124.46" y2="63.5" width="0.1524" layer="91"/>
-<wire x1="88.9" y1="83.82" x2="93.98" y2="83.82" width="0.1524" layer="91"/>
-<wire x1="93.98" y1="83.82" x2="93.98" y2="78.74" width="0.1524" layer="91"/>
-<junction x="93.98" y="83.82"/>
-<label x="93.98" y="78.74" size="1.27" layer="95" rot="R270" xref="yes"/>
+<pinref part="SUPPLY146" gate="GND" pin="GND"/>
+<wire x1="-12.7" y1="-30.48" x2="-12.7" y2="-33.02" width="0.1524" layer="91"/>
+<pinref part="C129" gate="G$1" pin="2"/>
 </segment>
 </net>
-<net name="MKM_FPGA_CS" class="0">
-<segment>
-<wire x1="17.78" y1="-20.32" x2="12.7" y2="-20.32" width="0.1524" layer="91"/>
-<label x="12.7" y="-20.32" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="U4" gate="A" pin="X0"/>
+<net name="FPGA_VCCO_3V3" class="0">
+<segment>
+<wire x1="-81.28" y1="45.72" x2="-81.28" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="-12.7" y1="45.72" x2="-12.7" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="-12.7" y1="48.26" x2="-25.4" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="-25.4" y1="48.26" x2="-38.1" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="-38.1" y1="48.26" x2="-50.8" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="-50.8" y1="48.26" x2="-68.58" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="-68.58" y1="48.26" x2="-81.28" y2="48.26" width="0.1524" layer="91"/>
+<wire x1="-68.58" y1="45.72" x2="-68.58" y2="48.26" width="0.1524" layer="91"/>
+<junction x="-68.58" y="48.26"/>
+<wire x1="-50.8" y1="45.72" x2="-50.8" y2="48.26" width="0.1524" layer="91"/>
+<junction x="-50.8" y="48.26"/>
+<wire x1="-38.1" y1="45.72" x2="-38.1" y2="48.26" width="0.1524" layer="91"/>
+<junction x="-38.1" y="48.26"/>
+<wire x1="-25.4" y1="45.72" x2="-25.4" y2="48.26" width="0.1524" layer="91"/>
+<junction x="-25.4" y="48.26"/>
+<wire x1="-81.28" y1="48.26" x2="-91.44" y2="48.26" width="0.1524" layer="91"/>
+<junction x="-81.28" y="48.26"/>
+<wire x1="-142.24" y1="91.44" x2="-142.24" y2="93.98" width="0.1524" layer="91"/>
+<wire x1="-142.24" y1="93.98" x2="-167.64" y2="93.98" width="0.1524" layer="91"/>
+<wire x1="-129.54" y1="91.44" x2="-129.54" y2="93.98" width="0.1524" layer="91"/>
+<wire x1="-129.54" y1="93.98" x2="-142.24" y2="93.98" width="0.1524" layer="91"/>
+<junction x="-142.24" y="93.98"/>
+<wire x1="-104.14" y1="91.44" x2="-104.14" y2="93.98" width="0.1524" layer="91"/>
+<wire x1="-104.14" y1="93.98" x2="-116.84" y2="93.98" width="0.1524" layer="91"/>
+<junction x="-129.54" y="93.98"/>
+<wire x1="-116.84" y1="93.98" x2="-129.54" y2="93.98" width="0.1524" layer="91"/>
+<wire x1="-116.84" y1="91.44" x2="-116.84" y2="93.98" width="0.1524" layer="91"/>
+<junction x="-116.84" y="93.98"/>
+<wire x1="-81.28" y1="91.44" x2="-81.28" y2="93.98" width="0.1524" layer="91"/>
+<wire x1="-81.28" y1="93.98" x2="-91.44" y2="93.98" width="0.1524" layer="91"/>
+<junction x="-104.14" y="93.98"/>
+<wire x1="-91.44" y1="93.98" x2="-104.14" y2="93.98" width="0.1524" layer="91"/>
+<wire x1="-12.7" y1="91.44" x2="-12.7" y2="93.98" width="0.1524" layer="91"/>
+<wire x1="-12.7" y1="93.98" x2="-25.4" y2="93.98" width="0.1524" layer="91"/>
+<junction x="-81.28" y="93.98"/>
+<wire x1="-25.4" y1="93.98" x2="-38.1" y2="93.98" width="0.1524" layer="91"/>
+<wire x1="-38.1" y1="93.98" x2="-50.8" y2="93.98" width="0.1524" layer="91"/>
+<wire x1="-50.8" y1="93.98" x2="-68.58" y2="93.98" width="0.1524" layer="91"/>
+<wire x1="-68.58" y1="93.98" x2="-81.28" y2="93.98" width="0.1524" layer="91"/>
+<wire x1="-68.58" y1="91.44" x2="-68.58" y2="93.98" width="0.1524" layer="91"/>
+<junction x="-68.58" y="93.98"/>
+<wire x1="-50.8" y1="91.44" x2="-50.8" y2="93.98" width="0.1524" layer="91"/>
+<junction x="-50.8" y="93.98"/>
+<wire x1="-38.1" y1="91.44" x2="-38.1" y2="93.98" width="0.1524" layer="91"/>
+<junction x="-38.1" y="93.98"/>
+<wire x1="-25.4" y1="91.44" x2="-25.4" y2="93.98" width="0.1524" layer="91"/>
+<junction x="-25.4" y="93.98"/>
+<wire x1="-91.44" y1="93.98" x2="-91.44" y2="71.12" width="0.1524" layer="91"/>
+<junction x="-91.44" y="93.98"/>
+<wire x1="-81.28" y1="68.58" x2="-81.28" y2="71.12" width="0.1524" layer="91"/>
+<wire x1="-12.7" y1="68.58" x2="-12.7" y2="71.12" width="0.1524" layer="91"/>
+<wire x1="-12.7" y1="71.12" x2="-25.4" y2="71.12" width="0.1524" layer="91"/>
+<wire x1="-25.4" y1="71.12" x2="-38.1" y2="71.12" width="0.1524" layer="91"/>
+<wire x1="-38.1" y1="71.12" x2="-50.8" y2="71.12" width="0.1524" layer="91"/>
+<wire x1="-50.8" y1="71.12" x2="-68.58" y2="71.12" width="0.1524" layer="91"/>
+<wire x1="-68.58" y1="71.12" x2="-81.28" y2="71.12" width="0.1524" layer="91"/>
+<wire x1="-68.58" y1="68.58" x2="-68.58" y2="71.12" width="0.1524" layer="91"/>
+<junction x="-68.58" y="71.12"/>
+<wire x1="-50.8" y1="68.58" x2="-50.8" y2="71.12" width="0.1524" layer="91"/>
+<junction x="-50.8" y="71.12"/>
+<wire x1="-38.1" y1="68.58" x2="-38.1" y2="71.12" width="0.1524" layer="91"/>
+<junction x="-38.1" y="71.12"/>
+<wire x1="-25.4" y1="68.58" x2="-25.4" y2="71.12" width="0.1524" layer="91"/>
+<junction x="-25.4" y="71.12"/>
+<wire x1="-91.44" y1="71.12" x2="-81.28" y2="71.12" width="0.1524" layer="91"/>
+<junction x="-81.28" y="71.12"/>
+<wire x1="-91.44" y1="48.26" x2="-91.44" y2="71.12" width="0.1524" layer="91"/>
+<junction x="-91.44" y="71.12"/>
+<label x="-165.1" y="93.98" size="1.778" layer="95"/>
+<wire x1="-81.28" y1="22.86" x2="-81.28" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="-12.7" y1="22.86" x2="-12.7" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="-12.7" y1="25.4" x2="-25.4" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="-25.4" y1="25.4" x2="-38.1" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="-38.1" y1="25.4" x2="-50.8" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="-50.8" y1="25.4" x2="-68.58" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="-68.58" y1="25.4" x2="-81.28" y2="25.4" width="0.1524" layer="91"/>
+<wire x1="-68.58" y1="22.86" x2="-68.58" y2="25.4" width="0.1524" layer="91"/>
+<junction x="-68.58" y="25.4"/>
+<wire x1="-50.8" y1="22.86" x2="-50.8" y2="25.4" width="0.1524" layer="91"/>
+<junction x="-50.8" y="25.4"/>
+<wire x1="-38.1" y1="22.86" x2="-38.1" y2="25.4" width="0.1524" layer="91"/>
+<junction x="-38.1" y="25.4"/>
+<wire x1="-25.4" y1="22.86" x2="-25.4" y2="25.4" width="0.1524" layer="91"/>
+<junction x="-25.4" y="25.4"/>
+<wire x1="-81.28" y1="25.4" x2="-91.44" y2="25.4" width="0.1524" layer="91"/>
+<junction x="-81.28" y="25.4"/>
+<wire x1="-91.44" y1="25.4" x2="-91.44" y2="48.26" width="0.1524" layer="91"/>
+<junction x="-91.44" y="48.26"/>
+<wire x1="-81.28" y1="0" x2="-81.28" y2="2.54" width="0.1524" layer="91"/>
+<wire x1="-12.7" y1="0" x2="-12.7" y2="2.54" width="0.1524" layer="91"/>
+<wire x1="-12.7" y1="2.54" x2="-25.4" y2="2.54" width="0.1524" layer="91"/>
+<wire x1="-25.4" y1="2.54" x2="-38.1" y2="2.54" width="0.1524" layer="91"/>
+<wire x1="-38.1" y1="2.54" x2="-50.8" y2="2.54" width="0.1524" layer="91"/>
+<wire x1="-50.8" y1="2.54" x2="-68.58" y2="2.54" width="0.1524" layer="91"/>
+<wire x1="-68.58" y1="2.54" x2="-81.28" y2="2.54" width="0.1524" layer="91"/>
+<wire x1="-68.58" y1="0" x2="-68.58" y2="2.54" width="0.1524" layer="91"/>
+<junction x="-68.58" y="2.54"/>
+<wire x1="-50.8" y1="0" x2="-50.8" y2="2.54" width="0.1524" layer="91"/>
+<junction x="-50.8" y="2.54"/>
+<wire x1="-38.1" y1="0" x2="-38.1" y2="2.54" width="0.1524" layer="91"/>
+<junction x="-38.1" y="2.54"/>
+<wire x1="-25.4" y1="0" x2="-25.4" y2="2.54" width="0.1524" layer="91"/>
+<junction x="-25.4" y="2.54"/>
+<wire x1="-81.28" y1="2.54" x2="-91.44" y2="2.54" width="0.1524" layer="91"/>
+<junction x="-81.28" y="2.54"/>
+<wire x1="-91.44" y1="2.54" x2="-91.44" y2="25.4" width="0.1524" layer="91"/>
+<junction x="-91.44" y="25.4"/>
+<wire x1="-81.28" y1="-22.86" x2="-81.28" y2="-20.32" width="0.1524" layer="91"/>
+<wire x1="-12.7" y1="-22.86" x2="-12.7" y2="-20.32" width="0.1524" layer="91"/>
+<wire x1="-12.7" y1="-20.32" x2="-25.4" y2="-20.32" width="0.1524" layer="91"/>
+<wire x1="-25.4" y1="-20.32" x2="-38.1" y2="-20.32" width="0.1524" layer="91"/>
+<wire x1="-38.1" y1="-20.32" x2="-50.8" y2="-20.32" width="0.1524" layer="91"/>
+<wire x1="-50.8" y1="-20.32" x2="-68.58" y2="-20.32" width="0.1524" layer="91"/>
+<wire x1="-68.58" y1="-20.32" x2="-81.28" y2="-20.32" width="0.1524" layer="91"/>
+<wire x1="-68.58" y1="-22.86" x2="-68.58" y2="-20.32" width="0.1524" layer="91"/>
+<junction x="-68.58" y="-20.32"/>
+<wire x1="-50.8" y1="-22.86" x2="-50.8" y2="-20.32" width="0.1524" layer="91"/>
+<junction x="-50.8" y="-20.32"/>
+<wire x1="-38.1" y1="-22.86" x2="-38.1" y2="-20.32" width="0.1524" layer="91"/>
+<junction x="-38.1" y="-20.32"/>
+<wire x1="-25.4" y1="-22.86" x2="-25.4" y2="-20.32" width="0.1524" layer="91"/>
+<junction x="-25.4" y="-20.32"/>
+<wire x1="-81.28" y1="-20.32" x2="-91.44" y2="-20.32" width="0.1524" layer="91"/>
+<junction x="-81.28" y="-20.32"/>
+<wire x1="-91.44" y1="-20.32" x2="-91.44" y2="2.54" width="0.1524" layer="91"/>
+<junction x="-91.44" y="2.54"/>
+<pinref part="C97" gate="G$1" pin="1"/>
+<pinref part="C98" gate="G$1" pin="1"/>
+<pinref part="C100" gate="G$1" pin="1"/>
+<pinref part="C101" gate="G$1" pin="1"/>
+<pinref part="C102" gate="G$1" pin="1"/>
+<pinref part="C105" gate="G$1" pin="1"/>
+<pinref part="C106" gate="G$1" pin="1"/>
+<pinref part="C107" gate="G$1" pin="1"/>
+<pinref part="C108" gate="G$1" pin="1"/>
+<pinref part="C109" gate="G$1" pin="1"/>
+<pinref part="C113" gate="G$1" pin="1"/>
+<pinref part="C117" gate="G$1" pin="1"/>
+<pinref part="C118" gate="G$1" pin="1"/>
+<pinref part="C119" gate="G$1" pin="1"/>
+<pinref part="C120" gate="G$1" pin="1"/>
+<pinref part="C121" gate="G$1" pin="1"/>
+<pinref part="C122" gate="G$1" pin="1"/>
+<pinref part="C123" gate="G$1" pin="1"/>
+<pinref part="C124" gate="G$1" pin="1"/>
+<pinref part="C125" gate="G$1" pin="1"/>
+<pinref part="C126" gate="G$1" pin="1"/>
+<pinref part="C127" gate="G$1" pin="1"/>
+<pinref part="C128" gate="G$1" pin="1"/>
+<pinref part="C129" gate="G$1" pin="1"/>
+<pinref part="C156" gate="G$1" pin="1"/>
+<pinref part="C157" gate="G$1" pin="1"/>
+<pinref part="C158" gate="G$1" pin="1"/>
+<pinref part="C159" gate="G$1" pin="1"/>
+<pinref part="C160" gate="G$1" pin="1"/>
+<pinref part="C161" gate="G$1" pin="1"/>
+<pinref part="C162" gate="G$1" pin="1"/>
+<pinref part="C163" gate="G$1" pin="1"/>
+<pinref part="C164" gate="G$1" pin="1"/>
+<pinref part="C165" gate="G$1" pin="1"/>
+<pinref part="C166" gate="G$1" pin="1"/>
+<pinref part="C167" gate="G$1" pin="1"/>
+<pinref part="C170" gate="G$1" pin="1"/>
+<pinref part="C171" gate="G$1" pin="1"/>
+<pinref part="C172" gate="G$1" pin="1"/>
+<pinref part="C173" gate="G$1" pin="1"/>
 </segment>
 </net>
-<net name="MKM_AVR_CS" class="0">
+</nets>
+</sheet>
+<sheet>
+<description>Pavel 4-3</description>
+<plain>
+<text x="-22.86" y="68.58" size="1.778" layer="91">*) FPGA Power Subsystem -- CORE</text>
+<text x="68.58" y="33.02" size="1.778" layer="91">*) VCCINT = 0.6V x (1 + 150 / 226) = 0.998V
+
+*) OCP_ADJ is not used (default over-current threshold)
+
+*) MARx are not used (output at nominal 100%)
+
+*) S_IN/S_OUT are not used (single regulator mode)
+
+*) S_DELAY is not used (single regulator mode)
+
+*) M/S is not used (parallel operation not needed)
+
+*) EA_OUT is not used (default control loop)
+
+*) Minimal load current is 0A, but we still place
+load of 100 Ohms just in case (gives 10 mA)</text>
+</plain>
+<instances>
+<instance part="FRAME19" gate="G$1" x="-121.92" y="-96.52"/>
+<instance part="SUPPLY181" gate="GND" x="-25.4" y="-71.12"/>
+<instance part="SUPPLY182" gate="GND" x="-12.7" y="-71.12"/>
+<instance part="C94" gate="G$1" x="-45.72" y="-60.96">
+<attribute name="RATED_VOLTAGE" x="-45.72" y="-60.96" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-45.72" y="-60.96" size="1.778" layer="96" display="off"/>
+<attribute name="DIELECTRIC" x="-45.72" y="-60.96" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="SUPPLY183" gate="GND" x="-45.72" y="-71.12"/>
+<instance part="R50" gate="G$1" x="-60.96" y="2.54" rot="R90">
+<attribute name="TOLERANCE" x="-60.96" y="2.54" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="C95" gate="G$1" x="-86.36" y="5.08">
+<attribute name="DIELECTRIC" x="-86.36" y="5.08" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-86.36" y="5.08" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-86.36" y="5.08" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C96" gate="G$1" x="-76.2" y="5.08">
+<attribute name="DIELECTRIC" x="-76.2" y="5.08" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-76.2" y="5.08" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-76.2" y="5.08" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="SUPPLY184" gate="GND" x="-86.36" y="-7.62"/>
+<instance part="SUPPLY185" gate="GND" x="-76.2" y="-7.62"/>
+<instance part="R51" gate="G$1" x="17.78" y="2.54" rot="R90">
+<attribute name="TOLERANCE" x="17.78" y="2.54" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="R52" gate="G$1" x="17.78" y="-12.7" rot="R90">
+<attribute name="TOLERANCE" x="17.78" y="-12.7" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="C99" gate="G$1" x="25.4" y="5.08">
+<attribute name="DIELECTRIC" x="25.4" y="5.08" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="25.4" y="5.08" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="25.4" y="5.08" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="U$7" gate="G$1" x="-20.32" y="-22.86"/>
+<instance part="SUPPLY189" gate="GND" x="17.78" y="-22.86"/>
+<instance part="SUPPLY190" gate="GND" x="35.56" y="-22.86"/>
+<instance part="SUPPLY191" gate="GND" x="48.26" y="-22.86"/>
+<instance part="R53" gate="G$1" x="68.58" y="10.16"/>
+<instance part="R54" gate="G$1" x="60.96" y="-10.16" rot="R90">
+<attribute name="TOLERANCE" x="60.96" y="-10.16" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="SUPPLY192" gate="GND" x="60.96" y="-22.86"/>
+<instance part="R67" gate="G$1" x="7.62" y="-12.7" rot="R90"/>
+<instance part="C176" gate="G$1" x="35.56" y="-7.62">
+<attribute name="DIELECTRIC" x="35.56" y="-7.62" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="35.56" y="-7.62" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="35.56" y="-7.62" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C177" gate="G$1" x="48.26" y="-7.62">
+<attribute name="DIELECTRIC" x="48.26" y="-7.62" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="48.26" y="-7.62" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="48.26" y="-7.62" size="1.778" layer="96" display="off"/>
+</instance>
+</instances>
+<busses>
+</busses>
+<nets>
+<net name="GND" class="1">
 <segment>
-<wire x1="17.78" y1="-22.86" x2="12.7" y2="-22.86" width="0.1524" layer="91"/>
-<label x="12.7" y="-22.86" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="U4" gate="A" pin="X1"/>
+<pinref part="SUPPLY181" gate="GND" pin="GND"/>
+<wire x1="-25.4" y1="-66.04" x2="-25.4" y2="-68.58" width="0.1524" layer="91"/>
+<pinref part="U$7" gate="G$1" pin="AGND"/>
 </segment>
 <segment>
-<pinref part="U3" gate="A" pin="PC1_(PCINT17/ADC17/TOCC1/INT0/CLKO)"/>
-<wire x1="88.9" y1="111.76" x2="93.98" y2="111.76" width="0.1524" layer="91"/>
-<label x="93.98" y="111.76" size="1.27" layer="95" xref="yes"/>
+<pinref part="SUPPLY182" gate="GND" pin="GND"/>
+<wire x1="-12.7" y1="-66.04" x2="-12.7" y2="-68.58" width="0.1524" layer="91"/>
+<pinref part="U$7" gate="G$1" pin="PGND"/>
 </segment>
-</net>
-<net name="MKM_FPGA_MOSI" class="0">
 <segment>
-<wire x1="17.78" y1="-27.94" x2="12.7" y2="-27.94" width="0.1524" layer="91"/>
-<label x="12.7" y="-27.94" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="U4" gate="A" pin="Y0"/>
+<pinref part="SUPPLY183" gate="GND" pin="GND"/>
+<pinref part="C94" gate="G$1" pin="2"/>
+<wire x1="-45.72" y1="-68.58" x2="-45.72" y2="-66.04" width="0.1524" layer="91"/>
 </segment>
-</net>
-<net name="MKM_AVR_MOSI" class="0">
 <segment>
-<wire x1="17.78" y1="-30.48" x2="12.7" y2="-30.48" width="0.1524" layer="91"/>
-<label x="12.7" y="-30.48" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="U4" gate="A" pin="Y1"/>
+<pinref part="C95" gate="G$1" pin="2"/>
+<wire x1="-86.36" y1="0" x2="-86.36" y2="-5.08" width="0.1524" layer="91"/>
+<pinref part="SUPPLY184" gate="GND" pin="GND"/>
 </segment>
 <segment>
-<pinref part="U3" gate="A" pin="PD0_(PCINT24/ADC24/SDA/MOSI)"/>
-<wire x1="88.9" y1="91.44" x2="99.06" y2="91.44" width="0.1524" layer="91"/>
-<pinref part="JP3" gate="G$1" pin="4"/>
-<wire x1="99.06" y1="91.44" x2="160.02" y2="91.44" width="0.1524" layer="91"/>
-<wire x1="160.02" y1="91.44" x2="160.02" y2="63.5" width="0.1524" layer="91"/>
-<wire x1="160.02" y1="63.5" x2="152.4" y2="63.5" width="0.1524" layer="91"/>
-<wire x1="99.06" y1="91.44" x2="99.06" y2="78.74" width="0.1524" layer="91"/>
-<junction x="99.06" y="91.44"/>
-<label x="99.06" y="78.74" size="1.27" layer="95" rot="R270" xref="yes"/>
+<pinref part="C96" gate="G$1" pin="2"/>
+<wire x1="-76.2" y1="0" x2="-76.2" y2="-5.08" width="0.1524" layer="91"/>
+<pinref part="SUPPLY185" gate="GND" pin="GND"/>
 </segment>
-</net>
-<net name="MKM_FPGA_MISO" class="0">
 <segment>
-<wire x1="17.78" y1="-35.56" x2="12.7" y2="-35.56" width="0.1524" layer="91"/>
-<label x="12.7" y="-35.56" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="U4" gate="A" pin="W0"/>
+<pinref part="R52" gate="G$1" pin="1"/>
+<wire x1="17.78" y1="-17.78" x2="17.78" y2="-20.32" width="0.1524" layer="91"/>
+<pinref part="SUPPLY189" gate="GND" pin="GND"/>
 </segment>
-</net>
-<net name="MKM_AVR_MISO" class="0">
 <segment>
-<wire x1="17.78" y1="-38.1" x2="-33.02" y2="-38.1" width="0.1524" layer="91"/>
-<label x="-38.1" y="-38.1" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="U4" gate="A" pin="W1"/>
-<pinref part="JP4" gate="A" pin="2"/>
-<wire x1="-33.02" y1="-38.1" x2="-38.1" y2="-38.1" width="0.1524" layer="91"/>
-<wire x1="-33.02" y1="-40.64" x2="-33.02" y2="-38.1" width="0.1524" layer="91"/>
-<junction x="-33.02" y="-38.1"/>
+<pinref part="SUPPLY190" gate="GND" pin="GND"/>
+<wire x1="35.56" y1="-20.32" x2="35.56" y2="-12.7" width="0.1524" layer="91"/>
+<pinref part="C176" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="JP3" gate="G$1" pin="1"/>
-<wire x1="134.62" y1="66.04" x2="127" y2="66.04" width="0.1524" layer="91"/>
-<pinref part="U3" gate="A" pin="PD1_(PCINT25/ADC25/MISO)"/>
-<wire x1="127" y1="66.04" x2="127" y2="88.9" width="0.1524" layer="91"/>
-<wire x1="127" y1="88.9" x2="96.52" y2="88.9" width="0.1524" layer="91"/>
-<wire x1="96.52" y1="88.9" x2="88.9" y2="88.9" width="0.1524" layer="91"/>
-<wire x1="96.52" y1="88.9" x2="96.52" y2="78.74" width="0.1524" layer="91"/>
-<junction x="96.52" y="88.9"/>
-<label x="96.52" y="78.74" size="1.27" layer="95" rot="R270" xref="yes"/>
+<pinref part="SUPPLY191" gate="GND" pin="GND"/>
+<wire x1="48.26" y1="-20.32" x2="48.26" y2="-12.7" width="0.1524" layer="91"/>
+<pinref part="C177" gate="G$1" pin="2"/>
+</segment>
+<segment>
+<pinref part="SUPPLY192" gate="GND" pin="GND"/>
+<pinref part="R54" gate="G$1" pin="1"/>
+<wire x1="60.96" y1="-20.32" x2="60.96" y2="-15.24" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="MKM_FPGA_SCK" class="0">
+<net name="FPGA_VCCINT_1V0" class="0">
 <segment>
-<wire x1="17.78" y1="-43.18" x2="12.7" y2="-43.18" width="0.1524" layer="91"/>
-<label x="12.7" y="-43.18" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="U4" gate="A" pin="Z0"/>
+<wire x1="73.66" y1="10.16" x2="99.06" y2="10.16" width="0.1524" layer="91"/>
+<label x="76.2" y="10.16" size="1.778" layer="95"/>
+<pinref part="R53" gate="G$1" pin="2"/>
 </segment>
 </net>
-<net name="N$4" class="0">
+<net name="VCC_5V0" class="0">
+<segment>
+<wire x1="-45.72" y1="5.08" x2="-45.72" y2="10.16" width="0.1524" layer="91"/>
+<wire x1="-45.72" y1="10.16" x2="-40.64" y2="10.16" width="0.1524" layer="91"/>
+<wire x1="-40.64" y1="5.08" x2="-45.72" y2="5.08" width="0.1524" layer="91"/>
+<wire x1="-45.72" y1="10.16" x2="-60.96" y2="10.16" width="0.1524" layer="91"/>
+<junction x="-45.72" y="10.16"/>
+<label x="-91.44" y="10.16" size="1.778" layer="95"/>
+<pinref part="C95" gate="G$1" pin="1"/>
+<wire x1="-60.96" y1="10.16" x2="-76.2" y2="10.16" width="0.1524" layer="91"/>
+<wire x1="-76.2" y1="10.16" x2="-86.36" y2="10.16" width="0.1524" layer="91"/>
+<wire x1="-86.36" y1="10.16" x2="-91.44" y2="10.16" width="0.1524" layer="91"/>
+<wire x1="-86.36" y1="7.62" x2="-86.36" y2="10.16" width="0.1524" layer="91"/>
+<junction x="-86.36" y="10.16"/>
+<pinref part="C96" gate="G$1" pin="1"/>
+<wire x1="-76.2" y1="7.62" x2="-76.2" y2="10.16" width="0.1524" layer="91"/>
+<junction x="-76.2" y="10.16"/>
+<pinref part="R50" gate="G$1" pin="2"/>
+<wire x1="-60.96" y1="7.62" x2="-60.96" y2="10.16" width="0.1524" layer="91"/>
+<junction x="-60.96" y="10.16"/>
+<pinref part="U$7" gate="G$1" pin="PVIN"/>
+<pinref part="U$7" gate="G$1" pin="AVIN"/>
+</segment>
+</net>
+<net name="POK_VCCINT" class="0">
 <segment>
-<pinref part="LED1" gate="G$1" pin="A"/>
-<wire x1="228.6" y1="-45.72" x2="236.22" y2="-45.72" width="0.1524" layer="91"/>
-<pinref part="R7" gate="A" pin="4"/>
+<wire x1="5.08" y1="-55.88" x2="5.08" y2="-40.64" width="0.1524" layer="91"/>
+<wire x1="2.54" y1="-55.88" x2="5.08" y2="-55.88" width="0.1524" layer="91"/>
+<label x="5.08" y="-53.34" size="1.778" layer="95" rot="R90"/>
+<pinref part="U$7" gate="G$1" pin="POK"/>
 </segment>
 </net>
-<net name="AVR_LED1" class="0">
+<net name="N$45" class="0">
 <segment>
-<wire x1="208.28" y1="-45.72" x2="203.2" y2="-45.72" width="0.1524" layer="91"/>
-<label x="203.2" y="-45.72" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="R7" gate="A" pin="5"/>
+<wire x1="-40.64" y1="-55.88" x2="-45.72" y2="-55.88" width="0.1524" layer="91"/>
+<pinref part="C94" gate="G$1" pin="1"/>
+<wire x1="-45.72" y1="-55.88" x2="-45.72" y2="-58.42" width="0.1524" layer="91"/>
+<pinref part="U$7" gate="G$1" pin="SS"/>
 </segment>
+</net>
+<net name="N$46" class="0">
 <segment>
-<pinref part="U3" gate="A" pin="(PCINT7/ADC7)_PA7"/>
-<wire x1="-22.86" y1="88.9" x2="-25.4" y2="88.9" width="0.1524" layer="91"/>
-<label x="-25.4" y="88.9" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="R50" gate="G$1" pin="1"/>
+<wire x1="-40.64" y1="-5.08" x2="-60.96" y2="-5.08" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="-5.08" x2="-60.96" y2="-2.54" width="0.1524" layer="91"/>
+<pinref part="U$7" gate="G$1" pin="EN_PB"/>
 </segment>
 </net>
-<net name="N$5" class="0">
+<net name="PWR_ENA_VCCINT" class="0">
 <segment>
-<pinref part="LED2" gate="G$1" pin="A"/>
-<wire x1="228.6" y1="-48.26" x2="231.14" y2="-48.26" width="0.1524" layer="91"/>
-<pinref part="R7" gate="A" pin="3"/>
+<wire x1="-40.64" y1="0" x2="-50.8" y2="0" width="0.1524" layer="91"/>
+<wire x1="-50.8" y1="0" x2="-50.8" y2="20.32" width="0.1524" layer="91"/>
+<wire x1="-50.8" y1="20.32" x2="-91.44" y2="20.32" width="0.1524" layer="91"/>
+<label x="-91.44" y="20.32" size="1.778" layer="95"/>
+<pinref part="U$7" gate="G$1" pin="ENABLE"/>
 </segment>
 </net>
-<net name="AVR_LED2" class="0">
+<net name="N$47" class="0">
 <segment>
-<wire x1="208.28" y1="-48.26" x2="203.2" y2="-48.26" width="0.1524" layer="91"/>
-<label x="203.2" y="-48.26" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="R7" gate="A" pin="6"/>
+<pinref part="U$7" gate="G$1" pin="VSENSE"/>
+<wire x1="2.54" y1="-20.32" x2="7.62" y2="-20.32" width="0.1524" layer="91"/>
+<wire x1="7.62" y1="-20.32" x2="7.62" y2="-17.78" width="0.1524" layer="91"/>
+<pinref part="R67" gate="G$1" pin="1"/>
+</segment>
+</net>
+<net name="N$48" class="0">
+<segment>
+<wire x1="7.62" y1="-7.62" x2="7.62" y2="10.16" width="0.1524" layer="91"/>
+<pinref part="U$7" gate="G$1" pin="VOUT"/>
+<wire x1="7.62" y1="10.16" x2="2.54" y2="10.16" width="0.1524" layer="91"/>
+<junction x="7.62" y="10.16"/>
+<wire x1="7.62" y1="10.16" x2="17.78" y2="10.16" width="0.1524" layer="91"/>
+<pinref part="R51" gate="G$1" pin="2"/>
+<wire x1="17.78" y1="7.62" x2="17.78" y2="10.16" width="0.1524" layer="91"/>
+<wire x1="17.78" y1="10.16" x2="25.4" y2="10.16" width="0.1524" layer="91"/>
+<junction x="17.78" y="10.16"/>
+<pinref part="C99" gate="G$1" pin="1"/>
+<wire x1="25.4" y1="10.16" x2="25.4" y2="7.62" width="0.1524" layer="91"/>
+<wire x1="35.56" y1="-5.08" x2="35.56" y2="10.16" width="0.1524" layer="91"/>
+<wire x1="35.56" y1="10.16" x2="25.4" y2="10.16" width="0.1524" layer="91"/>
+<junction x="25.4" y="10.16"/>
+<wire x1="48.26" y1="-5.08" x2="48.26" y2="10.16" width="0.1524" layer="91"/>
+<wire x1="48.26" y1="10.16" x2="35.56" y2="10.16" width="0.1524" layer="91"/>
+<junction x="35.56" y="10.16"/>
+<pinref part="R54" gate="G$1" pin="2"/>
+<wire x1="60.96" y1="-5.08" x2="60.96" y2="10.16" width="0.1524" layer="91"/>
+<wire x1="60.96" y1="10.16" x2="48.26" y2="10.16" width="0.1524" layer="91"/>
+<junction x="48.26" y="10.16"/>
+<pinref part="R53" gate="G$1" pin="1"/>
+<wire x1="63.5" y1="10.16" x2="60.96" y2="10.16" width="0.1524" layer="91"/>
+<junction x="60.96" y="10.16"/>
+<pinref part="R67" gate="G$1" pin="2"/>
+<pinref part="C176" gate="G$1" pin="1"/>
+<pinref part="C177" gate="G$1" pin="1"/>
+</segment>
+</net>
+<net name="N$49" class="0">
+<segment>
+<pinref part="U$7" gate="G$1" pin="VFB"/>
+<wire x1="2.54" y1="-5.08" x2="17.78" y2="-5.08" width="0.1524" layer="91"/>
+<pinref part="R51" gate="G$1" pin="1"/>
+<wire x1="17.78" y1="-5.08" x2="17.78" y2="-2.54" width="0.1524" layer="91"/>
+<pinref part="R52" gate="G$1" pin="2"/>
+<wire x1="17.78" y1="-5.08" x2="17.78" y2="-7.62" width="0.1524" layer="91"/>
+<junction x="17.78" y="-5.08"/>
+<wire x1="17.78" y1="-5.08" x2="25.4" y2="-5.08" width="0.1524" layer="91"/>
+<pinref part="C99" gate="G$1" pin="2"/>
+<wire x1="25.4" y1="-5.08" x2="25.4" y2="0" width="0.1524" layer="91"/>
 </segment>
+</net>
+</nets>
+</sheet>
+<sheet>
+<description>Pavel 5-1</description>
+<plain>
+</plain>
+<instances>
+<instance part="LED11" gate="G$1" x="-81.28" y="22.86"/>
+<instance part="LED12" gate="G$1" x="-60.96" y="22.86"/>
+<instance part="R22" gate="G$1" x="-81.28" y="35.56" rot="R90">
+<attribute name="TOLERANCE" x="-81.28" y="35.56" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="SUPPLY152" gate="GND" x="-81.28" y="10.16"/>
+<instance part="FRAME20" gate="G$1" x="-127" y="-101.6"/>
+<instance part="LED13" gate="G$1" x="-40.64" y="22.86"/>
+<instance part="LED14" gate="G$1" x="-20.32" y="22.86"/>
+<instance part="R30" gate="G$1" x="-60.96" y="35.56" rot="R90">
+<attribute name="TOLERANCE" x="-60.96" y="35.56" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="R31" gate="G$1" x="-40.64" y="35.56" rot="R90">
+<attribute name="TOLERANCE" x="-40.64" y="35.56" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="R32" gate="G$1" x="-20.32" y="35.56" rot="R90">
+<attribute name="TOLERANCE" x="-20.32" y="35.56" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="SUPPLY186" gate="GND" x="-60.96" y="10.16"/>
+<instance part="SUPPLY187" gate="GND" x="-40.64" y="10.16"/>
+<instance part="SUPPLY188" gate="GND" x="-20.32" y="10.16"/>
+</instances>
+<busses>
+</busses>
+<nets>
+<net name="GND" class="1">
 <segment>
-<pinref part="U3" gate="A" pin="(PCINT6/ADC6)_PA6"/>
-<wire x1="-22.86" y1="91.44" x2="-25.4" y2="91.44" width="0.1524" layer="91"/>
-<label x="-25.4" y="91.44" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="SUPPLY152" gate="GND" pin="GND"/>
+<pinref part="LED11" gate="G$1" pin="C"/>
+<wire x1="-81.28" y1="12.7" x2="-81.28" y2="17.78" width="0.1524" layer="91"/>
 </segment>
-</net>
-<net name="N$15" class="0">
 <segment>
-<pinref part="LED3" gate="G$1" pin="A"/>
-<wire x1="228.6" y1="-50.8" x2="236.22" y2="-50.8" width="0.1524" layer="91"/>
-<pinref part="R7" gate="A" pin="2"/>
+<pinref part="SUPPLY186" gate="GND" pin="GND"/>
+<pinref part="LED12" gate="G$1" pin="C"/>
+<wire x1="-60.96" y1="12.7" x2="-60.96" y2="17.78" width="0.1524" layer="91"/>
 </segment>
-</net>
-<net name="AVR_LED3" class="0">
 <segment>
-<wire x1="208.28" y1="-50.8" x2="203.2" y2="-50.8" width="0.1524" layer="91"/>
-<label x="203.2" y="-50.8" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="R7" gate="A" pin="7"/>
+<pinref part="SUPPLY187" gate="GND" pin="GND"/>
+<pinref part="LED13" gate="G$1" pin="C"/>
+<wire x1="-40.64" y1="12.7" x2="-40.64" y2="17.78" width="0.1524" layer="91"/>
 </segment>
 <segment>
-<pinref part="U3" gate="A" pin="(PC!INT5/ADC5)_PA5"/>
-<wire x1="-22.86" y1="93.98" x2="-25.4" y2="93.98" width="0.1524" layer="91"/>
-<label x="-25.4" y="93.98" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="SUPPLY188" gate="GND" pin="GND"/>
+<pinref part="LED14" gate="G$1" pin="C"/>
+<wire x1="-20.32" y1="12.7" x2="-20.32" y2="17.78" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="N$16" class="0">
+<net name="FPGA_GPIO_LED_2" class="0">
 <segment>
-<pinref part="LED4" gate="G$1" pin="A"/>
-<wire x1="228.6" y1="-53.34" x2="231.14" y2="-53.34" width="0.1524" layer="91"/>
-<pinref part="R7" gate="A" pin="1"/>
+<pinref part="R31" gate="G$1" pin="2"/>
+<wire x1="-40.64" y1="40.64" x2="-40.64" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="-40.64" y1="55.88" x2="-106.68" y2="55.88" width="0.1524" layer="91"/>
+<label x="-106.68" y="55.88" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="AVR_LED4" class="0">
-<segment>
-<wire x1="208.28" y1="-53.34" x2="203.2" y2="-53.34" width="0.1524" layer="91"/>
-<label x="203.2" y="-53.34" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="R7" gate="A" pin="8"/>
-</segment>
+<net name="FPGA_GPIO_LED_3" class="0">
 <segment>
-<pinref part="U3" gate="A" pin="(PCINT4/ADC4)_PA4"/>
-<wire x1="-22.86" y1="96.52" x2="-25.4" y2="96.52" width="0.1524" layer="91"/>
-<label x="-25.4" y="96.52" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="R32" gate="G$1" pin="2"/>
+<wire x1="-20.32" y1="40.64" x2="-20.32" y2="60.96" width="0.1524" layer="91"/>
+<wire x1="-20.32" y1="60.96" x2="-106.68" y2="60.96" width="0.1524" layer="91"/>
+<label x="-106.68" y="60.96" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="AVR_GPIO_1" class="0">
+<net name="FPGA_GPIO_LED_0" class="0">
 <segment>
-<pinref part="JP5" gate="G$1" pin="2"/>
-<wire x1="231.14" y1="7.62" x2="226.06" y2="7.62" width="0.1524" layer="91"/>
-<label x="226.06" y="7.62" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="R22" gate="G$1" pin="2"/>
+<wire x1="-81.28" y1="40.64" x2="-81.28" y2="45.72" width="0.1524" layer="91"/>
+<wire x1="-81.28" y1="45.72" x2="-106.68" y2="45.72" width="0.1524" layer="91"/>
+<label x="-106.68" y="45.72" size="1.778" layer="95"/>
 </segment>
+</net>
+<net name="FPGA_GPIO_LED_1" class="0">
 <segment>
-<pinref part="U3" gate="A" pin="(PCINT18/ADC18/TOCC2/RXD/INT1)_PC2"/>
-<wire x1="88.9" y1="109.22" x2="93.98" y2="109.22" width="0.1524" layer="91"/>
-<label x="93.98" y="109.22" size="1.27" layer="95" xref="yes"/>
+<pinref part="R30" gate="G$1" pin="2"/>
+<wire x1="-60.96" y1="40.64" x2="-60.96" y2="50.8" width="0.1524" layer="91"/>
+<wire x1="-60.96" y1="50.8" x2="-106.68" y2="50.8" width="0.1524" layer="91"/>
+<label x="-106.68" y="50.8" size="1.778" layer="95"/>
 </segment>
 </net>
-<net name="AVR_GPIO_2" class="0">
+<net name="N$27" class="0">
 <segment>
-<pinref part="JP5" gate="G$1" pin="3"/>
-<wire x1="231.14" y1="5.08" x2="226.06" y2="5.08" width="0.1524" layer="91"/>
-<label x="226.06" y="5.08" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="LED11" gate="G$1" pin="A"/>
+<pinref part="R22" gate="G$1" pin="1"/>
+<wire x1="-81.28" y1="25.4" x2="-81.28" y2="30.48" width="0.1524" layer="91"/>
 </segment>
+</net>
+<net name="N$28" class="0">
 <segment>
-<pinref part="U3" gate="A" pin="(PCINT19/ADC19/TOCC3/TXD)_PC3"/>
-<wire x1="88.9" y1="106.68" x2="93.98" y2="106.68" width="0.1524" layer="91"/>
-<label x="93.98" y="106.68" size="1.27" layer="95" xref="yes"/>
+<pinref part="LED12" gate="G$1" pin="A"/>
+<wire x1="-60.96" y1="25.4" x2="-60.96" y2="30.48" width="0.1524" layer="91"/>
+<pinref part="R30" gate="G$1" pin="1"/>
 </segment>
 </net>
-<net name="AVR_GPIO_3" class="0">
+<net name="N$29" class="0">
 <segment>
-<pinref part="JP5" gate="G$1" pin="4"/>
-<wire x1="231.14" y1="2.54" x2="226.06" y2="2.54" width="0.1524" layer="91"/>
-<label x="226.06" y="2.54" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="LED13" gate="G$1" pin="A"/>
+<wire x1="-40.64" y1="25.4" x2="-40.64" y2="30.48" width="0.1524" layer="91"/>
+<pinref part="R31" gate="G$1" pin="1"/>
 </segment>
+</net>
+<net name="N$30" class="0">
 <segment>
-<pinref part="U3" gate="A" pin="(PCINT20/ADC20/TOCC4)_PC4"/>
-<wire x1="88.9" y1="104.14" x2="93.98" y2="104.14" width="0.1524" layer="91"/>
-<label x="93.98" y="104.14" size="1.27" layer="95" xref="yes"/>
+<pinref part="LED14" gate="G$1" pin="A"/>
+<wire x1="-20.32" y1="25.4" x2="-20.32" y2="30.48" width="0.1524" layer="91"/>
+<pinref part="R32" gate="G$1" pin="1"/>
 </segment>
 </net>
-<net name="AVR_GPIO_4" class="0">
+</nets>
+</sheet>
+<sheet>
+<description>Pavel 5-2</description>
+<plain>
+<text x="58.42" y="63.5" size="1.778" layer="91">*) Recommended power-up sequence:
+
+1) VCCINT
+
+2) VCCAUX
+
+3) VCCO
+
+RC network values are preliminary,
+should be tweaked after experiments
+</text>
+<text x="-55.88" y="55.88" size="1.778" layer="91">---></text>
+<text x="63.5" y="55.88" size="1.778" layer="91">---></text>
+<text x="-137.16" y="-17.78" size="1.778" layer="91">---></text>
+<text x="-22.86" y="-17.78" size="1.778" layer="91">---></text>
+<text x="12.7" y="-35.56" size="1.778" layer="91">*) "Power OK" LED, should be of green color</text>
+</plain>
+<instances>
+<instance part="FRAME21" gate="G$1" x="-152.4" y="-78.74"/>
+<instance part="R55" gate="G$1" x="-106.68" y="55.88">
+<attribute name="TOLERANCE" x="-106.68" y="55.88" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="D3" gate="G$1" x="-106.68" y="66.04" rot="MR0"/>
+<instance part="SUPPLY193" gate="GND" x="-96.52" y="35.56"/>
+<instance part="R56" gate="G$1" x="-12.7" y="66.04" rot="R90">
+<attribute name="TOLERANCE" x="-12.7" y="66.04" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="R57" gate="G$1" x="7.62" y="55.88">
+<attribute name="TOLERANCE" x="7.62" y="55.88" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="D4" gate="G$1" x="7.62" y="66.04" rot="MR0"/>
+<instance part="SUPPLY194" gate="GND" x="17.78" y="35.56"/>
+<instance part="R58" gate="G$1" x="-96.52" y="-7.62" rot="R90">
+<attribute name="TOLERANCE" x="-96.52" y="-7.62" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="R59" gate="G$1" x="-76.2" y="-17.78">
+<attribute name="TOLERANCE" x="-76.2" y="-17.78" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="D5" gate="G$1" x="-76.2" y="-7.62" rot="MR0"/>
+<instance part="SUPPLY195" gate="GND" x="-66.04" y="-38.1"/>
+<instance part="R60" gate="G$1" x="20.32" y="2.54" rot="R90">
+<attribute name="TOLERANCE" x="20.32" y="2.54" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="Q3" gate="G$1" x="40.64" y="-15.24"/>
+<instance part="SUPPLY196" gate="GND" x="50.8" y="-25.4"/>
+<instance part="LED16" gate="G$1" x="50.8" y="-2.54" rot="MR0"/>
+<instance part="R61" gate="G$1" x="50.8" y="10.16" rot="MR90">
+<attribute name="TOLERANCE" x="50.8" y="10.16" size="1.778" layer="96" rot="MR90" display="off"/>
+</instance>
+<instance part="C137" gate="G$1" x="-96.52" y="48.26">
+<attribute name="DIELECTRIC" x="-96.52" y="48.26" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-96.52" y="48.26" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-96.52" y="48.26" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C138" gate="G$1" x="-66.04" y="-25.4">
+<attribute name="DIELECTRIC" x="-66.04" y="-25.4" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-66.04" y="-25.4" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-66.04" y="-25.4" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C139" gate="G$1" x="17.78" y="48.26">
+<attribute name="DIELECTRIC" x="17.78" y="48.26" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="17.78" y="48.26" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="17.78" y="48.26" size="1.778" layer="96" display="off"/>
+</instance>
+</instances>
+<busses>
+</busses>
+<nets>
+<net name="GND" class="1">
 <segment>
-<pinref part="JP5" gate="G$1" pin="5"/>
-<wire x1="231.14" y1="0" x2="226.06" y2="0" width="0.1524" layer="91"/>
-<label x="226.06" y="0" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="SUPPLY193" gate="GND" pin="GND"/>
+<wire x1="-96.52" y1="38.1" x2="-96.52" y2="43.18" width="0.1524" layer="91"/>
+<pinref part="C137" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="U3" gate="A" pin="(PCINT21/ADC21/TOCC5/ICP1/T0)_PC5"/>
-<wire x1="88.9" y1="101.6" x2="93.98" y2="101.6" width="0.1524" layer="91"/>
-<label x="93.98" y="101.6" size="1.27" layer="95" xref="yes"/>
+<pinref part="SUPPLY194" gate="GND" pin="GND"/>
+<wire x1="17.78" y1="38.1" x2="17.78" y2="43.18" width="0.1524" layer="91"/>
+<pinref part="C139" gate="G$1" pin="2"/>
 </segment>
-</net>
-<net name="AVR_GPIO_5" class="0">
 <segment>
-<pinref part="JP5" gate="G$1" pin="6"/>
-<wire x1="231.14" y1="-2.54" x2="226.06" y2="-2.54" width="0.1524" layer="91"/>
-<label x="226.06" y="-2.54" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="SUPPLY195" gate="GND" pin="GND"/>
+<wire x1="-66.04" y1="-35.56" x2="-66.04" y2="-30.48" width="0.1524" layer="91"/>
+<pinref part="C138" gate="G$1" pin="2"/>
 </segment>
 <segment>
-<pinref part="U3" gate="A" pin="(PCINT22/ADC22/CLKI/TOCC6)_PC6"/>
-<wire x1="88.9" y1="99.06" x2="93.98" y2="99.06" width="0.1524" layer="91"/>
-<label x="93.98" y="99.06" size="1.27" layer="95" xref="yes"/>
+<pinref part="Q3" gate="G$1" pin="S"/>
+<wire x1="45.72" y1="-17.78" x2="50.8" y2="-17.78" width="0.1524" layer="91"/>
+<pinref part="SUPPLY196" gate="GND" pin="GND"/>
+<wire x1="50.8" y1="-17.78" x2="50.8" y2="-22.86" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="AVR_GPIO_6" class="0">
+<net name="VCC_5V0" class="0">
 <segment>
-<pinref part="JP5" gate="G$1" pin="7"/>
-<wire x1="231.14" y1="-5.08" x2="226.06" y2="-5.08" width="0.1524" layer="91"/>
-<label x="226.06" y="-5.08" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="R55" gate="G$1" pin="1"/>
+<wire x1="-111.76" y1="55.88" x2="-116.84" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="-116.84" y1="55.88" x2="-116.84" y2="66.04" width="0.1524" layer="91"/>
+<pinref part="D3" gate="G$1" pin="C"/>
+<wire x1="-116.84" y1="66.04" x2="-109.22" y2="66.04" width="0.1524" layer="91"/>
+<junction x="-116.84" y="55.88"/>
+<wire x1="-116.84" y1="55.88" x2="-137.16" y2="55.88" width="0.1524" layer="91"/>
+<label x="-137.16" y="55.88" size="1.778" layer="95"/>
 </segment>
 <segment>
-<pinref part="U3" gate="A" pin="(PCINT23/ADC23/TOCC7/T1)_PC7"/>
-<wire x1="88.9" y1="96.52" x2="93.98" y2="96.52" width="0.1524" layer="91"/>
-<label x="93.98" y="96.52" size="1.27" layer="95" xref="yes"/>
+<wire x1="-33.02" y1="76.2" x2="-12.7" y2="76.2" width="0.1524" layer="91"/>
+<pinref part="R56" gate="G$1" pin="2"/>
+<wire x1="-12.7" y1="71.12" x2="-12.7" y2="76.2" width="0.1524" layer="91"/>
+<label x="-33.02" y="76.2" size="1.778" layer="95"/>
 </segment>
-</net>
-<net name="AVR_GPIO_7" class="0">
 <segment>
-<pinref part="JP5" gate="G$1" pin="8"/>
-<wire x1="231.14" y1="-7.62" x2="226.06" y2="-7.62" width="0.1524" layer="91"/>
-<label x="226.06" y="-7.62" size="1.27" layer="95" rot="R180" xref="yes"/>
+<wire x1="-116.84" y1="2.54" x2="-96.52" y2="2.54" width="0.1524" layer="91"/>
+<pinref part="R58" gate="G$1" pin="2"/>
+<wire x1="-96.52" y1="-2.54" x2="-96.52" y2="2.54" width="0.1524" layer="91"/>
+<label x="-116.84" y="2.54" size="1.778" layer="95"/>
 </segment>
 <segment>
-<pinref part="U3" gate="A" pin="(PCINT0/ADC0)_PA0"/>
-<wire x1="-22.86" y1="106.68" x2="-25.4" y2="106.68" width="0.1524" layer="91"/>
-<label x="-25.4" y="106.68" size="1.27" layer="95" rot="R180" xref="yes"/>
+<wire x1="0" y1="20.32" x2="20.32" y2="20.32" width="0.1524" layer="91"/>
+<pinref part="R60" gate="G$1" pin="2"/>
+<wire x1="20.32" y1="7.62" x2="20.32" y2="20.32" width="0.1524" layer="91"/>
+<label x="0" y="20.32" size="1.778" layer="95"/>
+<pinref part="R61" gate="G$1" pin="2"/>
+<wire x1="50.8" y1="15.24" x2="50.8" y2="20.32" width="0.1524" layer="91"/>
+<wire x1="50.8" y1="20.32" x2="20.32" y2="20.32" width="0.1524" layer="91"/>
+<junction x="20.32" y="20.32"/>
 </segment>
 </net>
-<net name="AVR_GPIO_8" class="0">
-<segment>
-<pinref part="JP5" gate="G$1" pin="9"/>
-<wire x1="231.14" y1="-10.16" x2="226.06" y2="-10.16" width="0.1524" layer="91"/>
-<label x="226.06" y="-10.16" size="1.27" layer="95" rot="R180" xref="yes"/>
+<net name="PWR_ENA_VCCAUX" class="0">
+<segment>
+<wire x1="12.7" y1="55.88" x2="17.78" y2="55.88" width="0.1524" layer="91"/>
+<label x="20.32" y="55.88" size="1.778" layer="95"/>
+<pinref part="R57" gate="G$1" pin="2"/>
+<wire x1="17.78" y1="55.88" x2="43.18" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="17.78" y1="50.8" x2="17.78" y2="55.88" width="0.1524" layer="91"/>
+<junction x="17.78" y="55.88"/>
+<pinref part="D4" gate="G$1" pin="A"/>
+<wire x1="17.78" y1="66.04" x2="10.16" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="17.78" y1="66.04" x2="17.78" y2="55.88" width="0.1524" layer="91"/>
+<pinref part="C139" gate="G$1" pin="1"/>
 </segment>
-<segment>
-<pinref part="U3" gate="A" pin="(PCINT1/ADC1/AIN0)_PA1"/>
-<wire x1="-22.86" y1="104.14" x2="-25.4" y2="104.14" width="0.1524" layer="91"/>
-<label x="-25.4" y="104.14" size="1.27" layer="95" rot="R180" xref="yes"/>
+</net>
+<net name="POK_VCCINT" class="0">
+<segment>
+<wire x1="-33.02" y1="55.88" x2="-12.7" y2="55.88" width="0.1524" layer="91"/>
+<pinref part="R56" gate="G$1" pin="1"/>
+<wire x1="-12.7" y1="55.88" x2="-12.7" y2="60.96" width="0.1524" layer="91"/>
+<label x="-33.02" y="55.88" size="1.778" layer="95"/>
+<pinref part="R57" gate="G$1" pin="1"/>
+<wire x1="2.54" y1="55.88" x2="-2.54" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="-2.54" y1="55.88" x2="-2.54" y2="66.04" width="0.1524" layer="91"/>
+<pinref part="D4" gate="G$1" pin="C"/>
+<wire x1="-2.54" y1="66.04" x2="5.08" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="-12.7" y1="55.88" x2="-2.54" y2="55.88" width="0.1524" layer="91"/>
+<junction x="-12.7" y="55.88"/>
+<junction x="-2.54" y="55.88"/>
 </segment>
 </net>
-<net name="AVR_PANIC" class="0">
-<segment>
-<pinref part="U3" gate="A" pin="(PCINT2/ADC2/AIN1)_PA2"/>
-<wire x1="-22.86" y1="101.6" x2="-25.4" y2="101.6" width="0.1524" layer="91"/>
-<label x="-25.4" y="101.6" size="1.27" layer="95" rot="R180" xref="yes"/>
+<net name="PWR_ENA_VCCO" class="0">
+<segment>
+<wire x1="-66.04" y1="-17.78" x2="-40.64" y2="-17.78" width="0.1524" layer="91"/>
+<label x="-63.5" y="-17.78" size="1.778" layer="95"/>
+<pinref part="D5" gate="G$1" pin="A"/>
+<wire x1="-66.04" y1="-7.62" x2="-73.66" y2="-7.62" width="0.1524" layer="91"/>
+<wire x1="-66.04" y1="-17.78" x2="-66.04" y2="-7.62" width="0.1524" layer="91"/>
+<pinref part="R59" gate="G$1" pin="2"/>
+<wire x1="-71.12" y1="-17.78" x2="-66.04" y2="-17.78" width="0.1524" layer="91"/>
+<junction x="-66.04" y="-17.78"/>
+<wire x1="-66.04" y1="-22.86" x2="-66.04" y2="-17.78" width="0.1524" layer="91"/>
+<pinref part="C138" gate="G$1" pin="1"/>
 </segment>
-<segment>
-<wire x1="223.52" y1="48.26" x2="218.44" y2="48.26" width="0.1524" layer="91"/>
-<label x="218.44" y="48.26" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="U$4" gate="A" pin="A2"/>
+</net>
+<net name="PWR_ENA_VCCINT" class="0">
+<segment>
+<pinref part="D3" gate="G$1" pin="A"/>
+<wire x1="-104.14" y1="66.04" x2="-96.52" y2="66.04" width="0.1524" layer="91"/>
+<wire x1="-96.52" y1="66.04" x2="-96.52" y2="55.88" width="0.1524" layer="91"/>
+<pinref part="R55" gate="G$1" pin="2"/>
+<wire x1="-96.52" y1="55.88" x2="-101.6" y2="55.88" width="0.1524" layer="91"/>
+<wire x1="-96.52" y1="50.8" x2="-96.52" y2="55.88" width="0.1524" layer="91"/>
+<junction x="-96.52" y="55.88"/>
+<wire x1="-96.52" y1="55.88" x2="-71.12" y2="55.88" width="0.1524" layer="91"/>
+<label x="-93.98" y="55.88" size="1.778" layer="95"/>
+<pinref part="C137" gate="G$1" pin="1"/>
 </segment>
-<segment>
-<wire x1="223.52" y1="68.58" x2="218.44" y2="68.58" width="0.1524" layer="91"/>
-<label x="218.44" y="68.58" size="1.27" layer="95" rot="R180" xref="yes"/>
-<pinref part="U$4" gate="A" pin="A1"/>
+</net>
+<net name="POK_VCCAUX" class="0">
+<segment>
+<wire x1="-116.84" y1="-17.78" x2="-96.52" y2="-17.78" width="0.1524" layer="91"/>
+<pinref part="R58" gate="G$1" pin="1"/>
+<wire x1="-96.52" y1="-17.78" x2="-96.52" y2="-12.7" width="0.1524" layer="91"/>
+<label x="-116.84" y="-17.78" size="1.778" layer="95"/>
+<pinref part="R59" gate="G$1" pin="1"/>
+<wire x1="-81.28" y1="-17.78" x2="-86.36" y2="-17.78" width="0.1524" layer="91"/>
+<wire x1="-86.36" y1="-17.78" x2="-86.36" y2="-7.62" width="0.1524" layer="91"/>
+<pinref part="D5" gate="G$1" pin="C"/>
+<wire x1="-86.36" y1="-7.62" x2="-78.74" y2="-7.62" width="0.1524" layer="91"/>
+<wire x1="-96.52" y1="-17.78" x2="-86.36" y2="-17.78" width="0.1524" layer="91"/>
+<junction x="-96.52" y="-17.78"/>
+<junction x="-86.36" y="-17.78"/>
 </segment>
 </net>
-<net name="3V3" class="0">
+<net name="POK_VCCO" class="0">
 <segment>
-<pinref part="JP6" gate="G$1" pin="1"/>
-<wire x1="231.14" y1="114.3" x2="226.06" y2="114.3" width="0.1524" layer="91"/>
-<pinref part="P+26" gate="VCC" pin="VCC"/>
-<wire x1="226.06" y1="114.3" x2="226.06" y2="119.38" width="0.1524" layer="91"/>
-<label x="226.06" y="124.46" size="1.27" layer="95" rot="R90"/>
+<wire x1="0" y1="-17.78" x2="20.32" y2="-17.78" width="0.1524" layer="91"/>
+<pinref part="R60" gate="G$1" pin="1"/>
+<wire x1="20.32" y1="-17.78" x2="20.32" y2="-2.54" width="0.1524" layer="91"/>
+<label x="0" y="-17.78" size="1.778" layer="95"/>
+<pinref part="Q3" gate="G$1" pin="G"/>
+<wire x1="20.32" y1="-17.78" x2="35.56" y2="-17.78" width="0.1524" layer="91"/>
+<junction x="20.32" y="-17.78"/>
 </segment>
 </net>
-<net name="AVR_GPIO_10" class="0">
+<net name="N$50" class="0">
 <segment>
-<pinref part="U3" gate="A" pin="PB2_(PCINT10/ADC10)"/>
-<wire x1="-22.86" y1="78.74" x2="-25.4" y2="78.74" width="0.1524" layer="91"/>
-<label x="-25.4" y="78.74" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="Q3" gate="G$1" pin="D"/>
+<wire x1="45.72" y1="-12.7" x2="50.8" y2="-12.7" width="0.1524" layer="91"/>
+<pinref part="LED16" gate="G$1" pin="C"/>
+<wire x1="50.8" y1="-12.7" x2="50.8" y2="-7.62" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="AVR_GPIO_11" class="0">
+<net name="N$51" class="0">
 <segment>
-<pinref part="U3" gate="A" pin="PB3_(PCINT11/ADC11)"/>
-<wire x1="-22.86" y1="76.2" x2="-25.4" y2="76.2" width="0.1524" layer="91"/>
-<label x="-25.4" y="76.2" size="1.27" layer="95" rot="R180" xref="yes"/>
+<pinref part="R61" gate="G$1" pin="1"/>
+<pinref part="LED16" gate="G$1" pin="A"/>
+<wire x1="50.8" y1="5.08" x2="50.8" y2="0" width="0.1524" layer="91"/>
 </segment>
 </net>
 </nets>
 </sheet>
 <sheet>
-<description>RTC</description>
+<description>Pavel 5-3</description>
 <plain>
+<text x="10.16" y="-73.66" size="1.778" layer="91">*) Intermediate Regulator: 18V -> 5V</text>
+<text x="109.22" y="-81.28" size="1.778" layer="91">*) VCC_5V0 = 0.8V x (1 + 6.3/1.21) = 4.965V
+
+*) Current sharing not used
+
+*) SYNC is not used</text>
 </plain>
 <instances>
-<instance part="U6" gate="A" x="0" y="0"/>
-<instance part="SUPPLY55" gate="GND" x="-20.32" y="-22.86"/>
-<instance part="P+27" gate="VCC" x="-20.32" y="22.86" smashed="yes">
-<attribute name="VALUE" x="-25.4" y="17.78" size="1.778" layer="96" rot="R90"/>
+<instance part="FRAME22" gate="G$1" x="-88.9" y="-238.76"/>
+<instance part="U$8" gate="G$1" x="60.96" y="-119.38"/>
+<instance part="SUPPLY197" gate="GND" x="43.18" y="-162.56"/>
+<instance part="SUPPLY198" gate="GND" x="58.42" y="-162.56"/>
+<instance part="SUPPLY199" gate="GND" x="63.5" y="-162.56"/>
+<instance part="C103" gate="G$1" x="17.78" y="-149.86">
+<attribute name="DIELECTRIC" x="17.78" y="-149.86" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="17.78" y="-149.86" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="17.78" y="-149.86" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="P+28" gate="VCC" x="-15.24" y="22.86" smashed="yes">
-<attribute name="VALUE" x="-10.16" y="20.32" size="1.778" layer="96" rot="R90"/>
+<instance part="SUPPLY200" gate="GND" x="17.78" y="-162.56"/>
+<instance part="SUPPLY201" gate="GND" x="7.62" y="-162.56"/>
+<instance part="R62" gate="G$1" x="10.16" y="-119.38">
+<attribute name="TOLERANCE" x="10.16" y="-119.38" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="Q2" gate="G$1" x="-40.64" y="-10.16" smashed="yes">
-<attribute name="NAME" x="-43.18" y="-14.224" size="1.778" layer="95"/>
-<attribute name="VALUE" x="-43.18" y="-17.78" size="1.778" layer="96"/>
+<instance part="R63" gate="G$1" x="-2.54" y="-127" rot="R90">
+<attribute name="TOLERANCE" x="-2.54" y="-127" size="1.778" layer="96" rot="R90" display="off"/>
 </instance>
-<instance part="C63" gate="G$1" x="-33.02" y="-15.24" smashed="yes" rot="R180">
-<attribute name="NAME" x="-28.956" y="-14.859" size="1.778" layer="95"/>
-<attribute name="VALUE" x="-28.956" y="-12.319" size="1.778" layer="96"/>
+<instance part="R64" gate="G$1" x="-2.54" y="-111.76" rot="R90">
+<attribute name="TOLERANCE" x="-2.54" y="-111.76" size="1.778" layer="96" rot="R90" display="off"/>
 </instance>
-<instance part="C64" gate="G$1" x="-48.26" y="-15.24" smashed="yes" rot="R180">
-<attribute name="NAME" x="-52.324" y="-13.081" size="1.778" layer="95" rot="R180"/>
-<attribute name="VALUE" x="-52.324" y="-10.541" size="1.778" layer="96" rot="R180"/>
+<instance part="C104" gate="G$1" x="-53.34" y="-119.38">
+<attribute name="DIELECTRIC" x="-53.34" y="-119.38" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-53.34" y="-119.38" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-53.34" y="-119.38" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="SUPPLY202" gate="GND" x="-2.54" y="-137.16"/>
+<instance part="SUPPLY203" gate="GND" x="-17.78" y="-137.16"/>
+<instance part="SUPPLY204" gate="GND" x="-33.02" y="-137.16"/>
+<instance part="SUPPLY205" gate="GND" x="-43.18" y="-137.16"/>
+<instance part="SUPPLY206" gate="GND" x="-53.34" y="-137.16"/>
+<instance part="R65" gate="G$1" x="88.9" y="-116.84" rot="R90">
+<attribute name="TOLERANCE" x="88.9" y="-116.84" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="R66" gate="G$1" x="88.9" y="-132.08" rot="R90">
+<attribute name="TOLERANCE" x="88.9" y="-132.08" size="1.778" layer="96" rot="R90" display="off"/>
+</instance>
+<instance part="SUPPLY207" gate="GND" x="88.9" y="-142.24"/>
+<instance part="C111" gate="G$1" x="129.54" y="-114.3" smashed="yes" rot="R90">
+<attribute name="TOLERANCE" x="129.54" y="-114.3" size="1.778" layer="96" rot="R90" display="off"/>
+<attribute name="RATED_VOLTAGE" x="129.54" y="-114.3" size="1.778" layer="96" rot="R90" display="off"/>
+<attribute name="NAME" x="132.715" y="-113.665" size="1.778" layer="95"/>
+<attribute name="VALUE" x="132.08" y="-118.11" size="1.778" layer="96"/>
+</instance>
+<instance part="C114" gate="G$1" x="99.06" y="-111.76">
+<attribute name="RATED_VOLTAGE" x="99.06" y="-111.76" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="99.06" y="-111.76" size="1.778" layer="96" display="off"/>
+<attribute name="DIELECTRIC" x="99.06" y="-111.76" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C112" gate="G$1" x="144.78" y="-114.3" smashed="yes" rot="R90">
+<attribute name="TOLERANCE" x="144.78" y="-114.3" size="1.778" layer="96" rot="R90" display="off"/>
+<attribute name="RATED_VOLTAGE" x="144.78" y="-114.3" size="1.778" layer="96" rot="R90" display="off"/>
+<attribute name="NAME" x="147.955" y="-113.665" size="1.778" layer="95"/>
+<attribute name="VALUE" x="147.32" y="-118.11" size="1.778" layer="96"/>
+</instance>
+<instance part="SUPPLY208" gate="GND" x="99.06" y="-124.46"/>
+<instance part="SUPPLY209" gate="GND" x="114.3" y="-124.46"/>
+<instance part="SUPPLY210" gate="GND" x="129.54" y="-124.46"/>
+<instance part="SUPPLY211" gate="GND" x="144.78" y="-124.46"/>
+<instance part="C86" gate="G$1" x="-17.78" y="-119.38">
+<attribute name="RATED_VOLTAGE" x="-17.78" y="-119.38" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-17.78" y="-119.38" size="1.778" layer="96" display="off"/>
+<attribute name="DIELECTRIC" x="-17.78" y="-119.38" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="R68" gate="G$1" x="7.62" y="-147.32" rot="R90"/>
+<instance part="C140" gate="G$1" x="-43.18" y="-119.38">
+<attribute name="DIELECTRIC" x="-43.18" y="-119.38" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-43.18" y="-119.38" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-43.18" y="-119.38" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C141" gate="G$1" x="-33.02" y="-119.38">
+<attribute name="DIELECTRIC" x="-33.02" y="-119.38" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="-33.02" y="-119.38" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="-33.02" y="-119.38" size="1.778" layer="96" display="off"/>
+</instance>
+<instance part="C178" gate="G$1" x="114.3" y="-111.76">
+<attribute name="DIELECTRIC" x="114.3" y="-111.76" size="1.778" layer="96" display="off"/>
+<attribute name="RATED_VOLTAGE" x="114.3" y="-111.76" size="1.778" layer="96" display="off"/>
+<attribute name="TOLERANCE" x="114.3" y="-111.76" size="1.778" layer="96" display="off"/>
 </instance>
-<instance part="SUPPLY56" gate="GND" x="-48.26" y="-22.86"/>
-<instance part="SUPPLY57" gate="GND" x="-33.02" y="-22.86"/>
-<instance part="FRAME5" gate="G$1" x="-193.04" y="-129.54"/>
 </instances>
 <busses>
 </busses>
 <nets>
-<net name="3V3_BATT" class="0">
+<net name="GND" class="1">
 <segment>
-<wire x1="-20.32" y1="2.54" x2="-20.32" y2="20.32" width="0.1524" layer="91"/>
-<pinref part="P+27" gate="VCC" pin="VCC"/>
-<label x="-22.86" y="17.78" size="1.27" layer="95" rot="R90"/>
-<pinref part="U6" gate="A" pin="VBAT"/>
-<wire x1="-15.24" y1="2.54" x2="-20.32" y2="2.54" width="0.1524" layer="91"/>
+<pinref part="SUPPLY197" gate="GND" pin="GND"/>
+<pinref part="U$8" gate="G$1" pin="PGND"/>
+<wire x1="43.18" y1="-160.02" x2="43.18" y2="-149.86" width="0.1524" layer="91"/>
 </segment>
-</net>
-<net name="GND" class="1">
 <segment>
-<pinref part="U6" gate="A" pin="VSS"/>
-<pinref part="SUPPLY55" gate="GND" pin="GND"/>
-<wire x1="-15.24" y1="-10.16" x2="-20.32" y2="-10.16" width="0.1524" layer="91"/>
-<wire x1="-20.32" y1="-10.16" x2="-20.32" y2="-20.32" width="0.1524" layer="91"/>
+<pinref part="SUPPLY198" gate="GND" pin="GND"/>
+<pinref part="U$8" gate="G$1" pin="AGND at 5"/>
+<wire x1="58.42" y1="-160.02" x2="58.42" y2="-149.86" width="0.1524" layer="91"/>
 </segment>
 <segment>
-<pinref part="C63" gate="G$1" pin="1"/>
-<pinref part="SUPPLY57" gate="GND" pin="GND"/>
-<wire x1="-33.02" y1="-17.78" x2="-33.02" y2="-20.32" width="0.1524" layer="91"/>
+<pinref part="SUPPLY199" gate="GND" pin="GND"/>
+<pinref part="U$8" gate="G$1" pin="AGND at 6"/>
+<wire x1="63.5" y1="-160.02" x2="63.5" y2="-149.86" width="0.1524" layer="91"/>
 </segment>
 <segment>
-<pinref part="C64" gate="G$1" pin="1"/>
-<pinref part="SUPPLY56" gate="GND" pin="GND"/>
-<wire x1="-48.26" y1="-17.78" x2="-48.26" y2="-20.32" width="0.1524" layer="91"/>
+<pinref part="SUPPLY200" gate="GND" pin="GND"/>
+<pinref part="C103" gate="G$1" pin="2"/>
+<wire x1="17.78" y1="-160.02" x2="17.78" y2="-154.94" width="0.1524" layer="91"/>
 </segment>
-</net>
-<net name="3V3" class="0">
 <segment>
-<pinref part="U6" gate="A" pin="VCC"/>
-<wire x1="-15.24" y1="5.08" x2="-15.24" y2="20.32" width="0.1524" layer="91"/>
-<pinref part="P+28" gate="VCC" pin="VCC"/>
-<label x="-7.62" y="20.32" size="1.27" layer="95" rot="R90"/>
+<pinref part="SUPPLY201" gate="GND" pin="GND"/>
+<wire x1="7.62" y1="-160.02" x2="7.62" y2="-152.4" width="0.1524" layer="91"/>
+<pinref part="R68" gate="G$1" pin="1"/>
 </segment>
-</net>
-<net name="RTC_X1" class="0">
 <segment>
-<pinref part="U6" gate="A" pin="X1"/>
-<pinref part="Q2" gate="G$1" pin="1"/>
-<pinref part="C64" gate="G$1" pin="2"/>
-<wire x1="-48.26" y1="-10.16" x2="-43.18" y2="-10.16" width="0.1524" layer="91"/>
-<wire x1="-15.24" y1="-2.54" x2="-48.26" y2="-2.54" width="0.1524" layer="91"/>
-<wire x1="-48.26" y1="-2.54" x2="-48.26" y2="-10.16" width="0.1524" layer="91"/>
-<junction x="-48.26" y="-10.16"/>
+<pinref part="R63" gate="G$1" pin="1"/>
+<pinref part="SUPPLY202" gate="GND" pin="GND"/>
+<wire x1="-2.54" y1="-134.62" x2="-2.54" y2="-132.08" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="SUPPLY206" gate="GND" pin="GND"/>
+<pinref part="C104" gate="G$1" pin="2"/>
+<wire x1="-53.34" y1="-134.62" x2="-53.34" y2="-124.46" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="SUPPLY205" gate="GND" pin="GND"/>
+<wire x1="-43.18" y1="-134.62" x2="-43.18" y2="-124.46" width="0.1524" layer="91"/>
+<pinref part="C140" gate="G$1" pin="2"/>
+</segment>
+<segment>
+<pinref part="SUPPLY204" gate="GND" pin="GND"/>
+<wire x1="-33.02" y1="-134.62" x2="-33.02" y2="-124.46" width="0.1524" layer="91"/>
+<pinref part="C141" gate="G$1" pin="2"/>
+</segment>
+<segment>
+<pinref part="SUPPLY203" gate="GND" pin="GND"/>
+<wire x1="-17.78" y1="-134.62" x2="-17.78" y2="-124.46" width="0.1524" layer="91"/>
+<pinref part="C86" gate="G$1" pin="2"/>
+</segment>
+<segment>
+<pinref part="R66" gate="G$1" pin="1"/>
+<pinref part="SUPPLY207" gate="GND" pin="GND"/>
+<wire x1="88.9" y1="-137.16" x2="88.9" y2="-139.7" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="SUPPLY208" gate="GND" pin="GND"/>
+<pinref part="C114" gate="G$1" pin="2"/>
+<wire x1="99.06" y1="-121.92" x2="99.06" y2="-116.84" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="SUPPLY209" gate="GND" pin="GND"/>
+<wire x1="114.3" y1="-121.92" x2="114.3" y2="-116.84" width="0.1524" layer="91"/>
+<pinref part="C178" gate="G$1" pin="2"/>
+</segment>
+<segment>
+<pinref part="SUPPLY210" gate="GND" pin="GND"/>
+<pinref part="C111" gate="G$1" pin="-"/>
+<wire x1="129.54" y1="-121.92" x2="129.54" y2="-116.84" width="0.1524" layer="91"/>
+</segment>
+<segment>
+<pinref part="SUPPLY211" gate="GND" pin="GND"/>
+<pinref part="C112" gate="G$1" pin="-"/>
+<wire x1="144.78" y1="-121.92" x2="144.78" y2="-116.84" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="RTC_X2" class="0">
+<net name="VCC_5V0" class="0">
+<segment>
+<pinref part="U$8" gate="G$1" pin="VOUT at 11"/>
+<pinref part="U$8" gate="G$1" pin="VOUT at 10"/>
+<wire x1="88.9" y1="-104.14" x2="83.82" y2="-104.14" width="0.1524" layer="91"/>
+<pinref part="R65" gate="G$1" pin="2"/>
+<wire x1="88.9" y1="-111.76" x2="88.9" y2="-109.22" width="0.1524" layer="91"/>
+<junction x="88.9" y="-104.14"/>
+<wire x1="88.9" y1="-109.22" x2="88.9" y2="-104.14" width="0.1524" layer="91"/>
+<wire x1="83.82" y1="-109.22" x2="88.9" y2="-109.22" width="0.1524" layer="91"/>
+<junction x="88.9" y="-109.22"/>
+<pinref part="C114" gate="G$1" pin="1"/>
+<wire x1="99.06" y1="-109.22" x2="99.06" y2="-104.14" width="0.1524" layer="91"/>
+<wire x1="99.06" y1="-104.14" x2="88.9" y2="-104.14" width="0.1524" layer="91"/>
+<wire x1="114.3" y1="-109.22" x2="114.3" y2="-104.14" width="0.1524" layer="91"/>
+<wire x1="114.3" y1="-104.14" x2="99.06" y2="-104.14" width="0.1524" layer="91"/>
+<junction x="99.06" y="-104.14"/>
+<pinref part="C111" gate="G$1" pin="+"/>
+<wire x1="129.54" y1="-111.76" x2="129.54" y2="-104.14" width="0.1524" layer="91"/>
+<wire x1="129.54" y1="-104.14" x2="114.3" y2="-104.14" width="0.1524" layer="91"/>
+<junction x="114.3" y="-104.14"/>
+<pinref part="C112" gate="G$1" pin="+"/>
+<wire x1="144.78" y1="-111.76" x2="144.78" y2="-104.14" width="0.1524" layer="91"/>
+<wire x1="144.78" y1="-104.14" x2="129.54" y2="-104.14" width="0.1524" layer="91"/>
+<junction x="129.54" y="-104.14"/>
+<wire x1="144.78" y1="-104.14" x2="149.86" y2="-104.14" width="0.1524" layer="91"/>
+<junction x="144.78" y="-104.14"/>
+<label x="139.7" y="-104.14" size="1.778" layer="95"/>
+<pinref part="C178" gate="G$1" pin="1"/>
+</segment>
+</net>
+<net name="N$52" class="0">
 <segment>
-<pinref part="U6" gate="A" pin="X2"/>
-<pinref part="Q2" gate="G$1" pin="2"/>
-<pinref part="C63" gate="G$1" pin="2"/>
-<wire x1="-38.1" y1="-10.16" x2="-33.02" y2="-10.16" width="0.1524" layer="91"/>
-<wire x1="-15.24" y1="-5.08" x2="-33.02" y2="-5.08" width="0.1524" layer="91"/>
-<wire x1="-33.02" y1="-5.08" x2="-33.02" y2="-10.16" width="0.1524" layer="91"/>
-<junction x="-33.02" y="-10.16"/>
+<pinref part="C103" gate="G$1" pin="1"/>
+<wire x1="17.78" y1="-147.32" x2="17.78" y2="-139.7" width="0.1524" layer="91"/>
+<pinref part="U$8" gate="G$1" pin="SS/TRK"/>
+<wire x1="17.78" y1="-139.7" x2="22.86" y2="-139.7" width="0.1524" layer="91"/>
 </segment>
 </net>
-<net name="RTC_MFP" class="0">
+<net name="N$53" class="0">
 <segment>
-<pinref part="U6" gate="A" pin="MFP"/>
-<wire x1="15.24" y1="2.54" x2="22.86" y2="2.54" width="0.1524" layer="91"/>
-<label x="22.86" y="2.54" size="1.27" layer="95" xref="yes"/>
+<wire x1="7.62" y1="-142.24" x2="7.62" y2="-129.54" width="0.1524" layer="91"/>
+<pinref part="U$8" gate="G$1" pin="SYNC"/>
+<wire x1="7.62" y1="-129.54" x2="22.86" y2="-129.54" width="0.1524" layer="91"/>
+<pinref part="R68" gate="G$1" pin="2"/>
 </segment>
 </net>
-<net name="RTC_SCL" class="0">
+<net name="PWR_18V" class="0">
+<segment>
+<pinref part="U$8" gate="G$1" pin="VIN at 2"/>
+<wire x1="22.86" y1="-109.22" x2="17.78" y2="-109.22" width="0.1524" layer="91"/>
+<wire x1="17.78" y1="-109.22" x2="17.78" y2="-104.14" width="0.1524" layer="91"/>
+<pinref part="U$8" gate="G$1" pin="VIN at 1"/>
+<wire x1="17.78" y1="-104.14" x2="22.86" y2="-104.14" width="0.1524" layer="91"/>
+<pinref part="R64" gate="G$1" pin="2"/>
+<wire x1="-2.54" y1="-106.68" x2="-2.54" y2="-104.14" width="0.1524" layer="91"/>
+<wire x1="-2.54" y1="-104.14" x2="17.78" y2="-104.14" width="0.1524" layer="91"/>
+<junction x="17.78" y="-104.14"/>
+<pinref part="C104" gate="G$1" pin="1"/>
+<wire x1="-53.34" y1="-116.84" x2="-53.34" y2="-104.14" width="0.1524" layer="91"/>
+<wire x1="-53.34" y1="-104.14" x2="-43.18" y2="-104.14" width="0.1524" layer="91"/>
+<junction x="-2.54" y="-104.14"/>
+<wire x1="-43.18" y1="-104.14" x2="-33.02" y2="-104.14" width="0.1524" layer="91"/>
+<wire x1="-33.02" y1="-104.14" x2="-17.78" y2="-104.14" width="0.1524" layer="91"/>
+<wire x1="-17.78" y1="-104.14" x2="-2.54" y2="-104.14" width="0.1524" layer="91"/>
+<wire x1="-43.18" y1="-116.84" x2="-43.18" y2="-104.14" width="0.1524" layer="91"/>
+<junction x="-43.18" y="-104.14"/>
+<wire x1="-17.78" y1="-116.84" x2="-17.78" y2="-104.14" width="0.1524" layer="91"/>
+<junction x="-17.78" y="-104.14"/>
+<wire x1="-53.34" y1="-104.14" x2="-58.42" y2="-104.14" width="0.1524" layer="91"/>
+<junction x="-53.34" y="-104.14"/>
+<label x="-58.42" y="-104.14" size="1.778" layer="95" rot="R180" xref="yes"/>
+<pinref part="C86" gate="G$1" pin="1"/>
+<pinref part="C140" gate="G$1" pin="1"/>
+<pinref part="C141" gate="G$1" pin="1"/>
+<wire x1="-33.02" y1="-116.84" x2="-33.02" y2="-104.14" width="0.1524" layer="91"/>
+<junction x="-33.02" y="-104.14"/>
+</segment>
+</net>
+<net name="N$54" class="0">
 <segment>
-<pinref part="U6" gate="A" pin="SCL"/>
-<wire x1="15.24" y1="0" x2="22.86" y2="0" width="0.1524" layer="91"/>
-<label x="22.86" y="0" size="1.27" layer="95" xref="yes"/>
+<pinref part="R62" gate="G$1" pin="1"/>
+<wire x1="5.08" y1="-119.38" x2="-2.54" y2="-119.38" width="0.1524" layer="91"/>
+<pinref part="R64" gate="G$1" pin="1"/>
+<wire x1="-2.54" y1="-119.38" x2="-2.54" y2="-116.84" width="0.1524" layer="91"/>
+<pinref part="R63" gate="G$1" pin="2"/>
+<wire x1="-2.54" y1="-121.92" x2="-2.54" y2="-119.38" width="0.1524" layer="91"/>
+<junction x="-2.54" y="-119.38"/>
 </segment>
 </net>
-<net name="RTC_SDA" class="0">
+<net name="N$55" class="0">
 <segment>
-<pinref part="U6" gate="A" pin="SDA"/>
-<wire x1="15.24" y1="-2.54" x2="22.86" y2="-2.54" width="0.1524" layer="91"/>
-<label x="22.86" y="-2.54" size="1.27" layer="95" xref="yes"/>
+<pinref part="R62" gate="G$1" pin="2"/>
+<pinref part="U$8" gate="G$1" pin="EN"/>
+<wire x1="15.24" y1="-119.38" x2="22.86" y2="-119.38" width="0.1524" layer="91"/>
+</segment>
+</net>
+<net name="N$56" class="0">
+<segment>
+<pinref part="U$8" gate="G$1" pin="FB"/>
+<wire x1="83.82" y1="-124.46" x2="88.9" y2="-124.46" width="0.1524" layer="91"/>
+<pinref part="R65" gate="G$1" pin="1"/>
+<wire x1="88.9" y1="-124.46" x2="88.9" y2="-121.92" width="0.1524" layer="91"/>
+<pinref part="R66" gate="G$1" pin="2"/>
+<wire x1="88.9" y1="-127" x2="88.9" y2="-124.46" width="0.1524" layer="91"/>
+<junction x="88.9" y="-124.46"/>
 </segment>
 </net>
 </nets>
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