[Cryptech-Commits] [core/platform/novena] 01/01: Merge branch 'unimap' to 'master'.
git at cryptech.is
git at cryptech.is
Tue Apr 28 22:07:38 UTC 2015
This is an automated email from the git hooks/post-receive script.
paul at psgd.org pushed a commit to branch master
in repository core/platform/novena.
commit eba69a11db55cbb6f09c3103f05247ce7b029df2
Merge: 07e3a0f d07c710
Author: Paul Selkirk <paul at psgd.org>
Date: Tue Apr 28 17:59:39 2015 -0400
Merge branch 'unimap' to 'master'.
eim/build/Makefile | 1 -
eim/iseconfig/.gitignore | 1 +
eim/sw/Makefile | 31 -
eim/sw/tc_eim.h | 50 --
eim/sw/trng_extractor_eim.c | 219 -------
i2c/sw/Makefile | 29 -
i2c/sw/cryptech_memory_map.h | 217 -------
i2c/sw/hash_i2c.c | 288 ----------
i2c/sw/hash_tester_i2c.c | 634 ---------------------
i2c/sw/tc_i2c.h | 55 --
i2c/sw/trng_tester_i2c.c | 321 -----------
sw/Makefile | 44 ++
sw/Makefile.i2c | 44 ++
eim/sw/cryptech_memory_map.h => sw/cryptech.h | 209 +++----
eim/sw/hash_eim.c => sw/hash.c | 6 +-
eim/sw/hash_tester_eim.c => sw/hash_tester.c | 33 +-
{eim/sw => sw}/novena-eim.c | 0
{eim/sw => sw}/novena-eim.h | 0
{eim/sw => sw}/tc_eim.c | 27 +-
{i2c/sw => sw}/tc_i2c.c | 10 +-
i2c/sw/trng_extractor_i2c.c => sw/trng_extractor.c | 43 +-
eim/sw/trng_tester_eim.c => sw/trng_tester.c | 54 +-
22 files changed, 301 insertions(+), 2015 deletions(-)
diff --cc eim/build/Makefile
index e93b05f,e93b05f..5ef3e7e
--- a/eim/build/Makefile
+++ b/eim/build/Makefile
@@@ -45,7 -45,7 +45,6 @@@ vfiles =
../../../../rng/trng/src/rtl/trng_csprng.v \
../../../../rng/trng/src/rtl/trng_csprng_fifo.v \
../../../../rng/trng/src/rtl/trng_mixer.v \
-- ../../../../cipher/chacha/src/rtl/chacha.v \
../../../../cipher/chacha/src/rtl/chacha_core.v \
../../../../cipher/chacha/src/rtl/chacha_qr.v
diff --cc eim/iseconfig/.gitignore
index 91e8e2b,91e8e2b..c0a165f
--- a/eim/iseconfig/.gitignore
+++ b/eim/iseconfig/.gitignore
@@@ -1,6 -1,6 +1,7 @@@
iseconfig
_ngo
*.bgn
++*.bit
*_bitgen.xwbt
*.bld
*.cmd_log
diff --cc sw/cryptech.h
index dfa0f0a,509c4e9..5afd08c
--- a/sw/cryptech.h
+++ b/sw/cryptech.h
@@@ -36,36 -36,25 +36,26 @@@
//
//======================================================================
- // BASE_ADDR, SEGMENT_SIZE, and ADDR are defined in tc_[eim|i2c].h,
- // which #includes this file.
- // default definitions from i2c, because defaults are good
- #ifndef BASE_ADDR
- #define BASE_ADDR 0
- #endif
- #ifndef SEGMENT_SIZE
+ // Segments.
#define SEGMENT_SIZE 0x2000
- #endif
- #ifndef ADDR
- #define ADDR(x) (x)
- #endif
+ #define SEGMENT_OFFSET_GLOBALS 0 * SEGMENT_SIZE
+ #define SEGMENT_OFFSET_HASHES 1 * SEGMENT_SIZE
+ #define SEGMENT_OFFSET_RNGS 2 * SEGMENT_SIZE
+ #define SEGMENT_OFFSET_CIPHERS 3 * SEGMENT_SIZE
++#define SEGMENT_OFFSET_MATH 4 * SEGMENT_SIZE
- #ifndef bitsToBytes
- #define bitsToBytes(x) (x / 8)
- #endif
- // Segments.
- #define SEGMENT_OFFSET_GLOBALS BASE_ADDR + (0 * SEGMENT_SIZE)
- #define SEGMENT_OFFSET_HASHES BASE_ADDR + (1 * SEGMENT_SIZE)
- #define SEGMENT_OFFSET_RNGS BASE_ADDR + (2 * SEGMENT_SIZE)
- #define SEGMENT_OFFSET_CIPHERS BASE_ADDR + (3 * SEGMENT_SIZE)
- #define SEGMENT_OFFSET_MATH BASE_ADDR + (4 * SEGMENT_SIZE)
+ // addresses and codes common to all cores
+ #define ADDR_NAME0 0x00
+ #define ADDR_NAME1 0x01
+ #define ADDR_VERSION 0x02
- // addresses and codes common to all cores
- #define ADDR_NAME0 ADDR(0x00)
- #define ADDR_NAME1 ADDR(0x01)
- #define ADDR_VERSION ADDR(0x02)
+ // a handy macro from cryptlib
+ #ifndef bitsToBytes
+ #define bitsToBytes(x) (x / 8)
+ #endif
//------------------------------------------------------------------
@@@ -85,14 -74,6 +75,18 @@@
#define COMM_ADDR_NAME1 COMM_ADDR_BASE + ADDR_NAME1
#define COMM_ADDR_VERSION COMM_ADDR_BASE + ADDR_VERSION
- #define NOVENA_BOARD_NAME0 "PVT1";
- #define NOVENA_BOARD_NAME1 " ";
- #define NOVENA_BOARD_VERSION "0.10";
++#define NOVENA_BOARD_NAME0 "PVT1"
++#define NOVENA_BOARD_NAME1 " "
++#define NOVENA_BOARD_VERSION "0.10"
++
++#define EIM_INTERFACE_NAME0 "eim "
++#define EIM_INTERFACE_NAME1 " "
++#define EIM_INTERFACE_VERSION "0.10"
+
- #define EIM_INTERFACE_NAME0 "eim ";
- #define EIM_INTERFACE_NAME1 " ";
- #define EIM_INTERFACE_VERSION "0.10";
++#define I2C_INTERFACE_NAME0 "i2c "
++#define I2C_INTERFACE_NAME1 " "
++#define I2C_INTERFACE_VERSION "0.10"
+
//------------------------------------------------------------------
// Hashes segment.
@@@ -153,48 -134,36 +147,48 @@@
#define MODE_SHA_384 2 << 2
#define MODE_SHA_512 3 << 2
- #define SHA1_NAME0 "sha1"
- #define SHA1_NAME1 " "
- #define SHA1_VERSION "0.50"
++#define SHA1_NAME0 "sha1"
++#define SHA1_NAME1 " "
++#define SHA1_VERSION "0.50"
+
- #define SHA256_NAME0 "sha2";
- #define SHA256_NAME1 "-256";
- #define SHA256_VERSION "0.80";
++#define SHA256_NAME0 "sha2"
++#define SHA256_NAME1 "-256"
++#define SHA256_VERSION "0.80"
+
- #define SHA512_NAME0 "sha2";
- #define SHA512_NAME1 "-512";
- #define SHA512_VERSION "0.80";
++#define SHA512_NAME0 "sha2"
++#define SHA512_NAME1 "-512"
++#define SHA512_VERSION "0.80"
+
- // -----------------------------------------------------------------
+ //-----------------------------------------------------------------
// TRNG segment.
- // -----------------------------------------------------------------
- #define TRNG_CORE_SIZE ADDR(0x100)
+ //-----------------------------------------------------------------
+ #define TRNG_CORE_SIZE 0x100
// addresses and codes for the TRNG cores */
-#define TRNG_ADDR_BASE SEGMENT_OFFSET_RNGS + (0 * TRNG_CORE_SIZE)
+#define TRNG_ADDR_BASE SEGMENT_OFFSET_RNGS + (0x00 * TRNG_CORE_SIZE)
#define TRNG_ADDR_NAME0 TRNG_ADDR_BASE + ADDR_NAME0
#define TRNG_ADDR_NAME1 TRNG_ADDR_BASE + ADDR_NAME1
#define TRNG_ADDR_VERSION TRNG_ADDR_BASE + ADDR_VERSION
- #define TRNG_ADDR_CTRL TRNG_ADDR_BASE + ADDR(0x10)
+ #define TRNG_ADDR_CTRL TRNG_ADDR_BASE + 0x10
#define TRNG_CTRL_DISCARD 1
#define TRNG_CTRL_TEST_MODE 2
- #define TRNG_ADDR_STATUS TRNG_ADDR_BASE + ADDR(0x11)
+ #define TRNG_ADDR_STATUS TRNG_ADDR_BASE + 0x11
// no status bits defined (yet)
- #define TRNG_ADDR_DELAY TRNG_ADDR_BASE + ADDR(0x13)
+ #define TRNG_ADDR_DELAY TRNG_ADDR_BASE + 0x13
-#define ENTROPY1_ADDR_BASE SEGMENT_OFFSET_RNGS + (5 * TRNG_CORE_SIZE)
+#define ENTROPY1_ADDR_BASE SEGMENT_OFFSET_RNGS + (0x05 * TRNG_CORE_SIZE)
#define ENTROPY1_ADDR_NAME0 ENTROPY1_ADDR_BASE + ADDR_NAME0
#define ENTROPY1_ADDR_NAME1 ENTROPY1_ADDR_BASE + ADDR_NAME1
#define ENTROPY1_ADDR_VERSION ENTROPY1_ADDR_BASE + ADDR_VERSION
- #define ENTROPY1_ADDR_CTRL ENTROPY1_ADDR_BASE + ADDR(0x10)
+ #define ENTROPY1_ADDR_CTRL ENTROPY1_ADDR_BASE + 0x10
#define ENTROPY1_CTRL_ENABLE 1
- #define ENTROPY1_ADDR_STATUS ENTROPY1_ADDR_BASE + ADDR(0x11)
+ #define ENTROPY1_ADDR_STATUS ENTROPY1_ADDR_BASE + 0x11
#define ENTROPY1_STATUS_VALID 1
- #define ENTROPY1_ADDR_ENTROPY ENTROPY1_ADDR_BASE + ADDR(0x20)
- #define ENTROPY1_ADDR_DELTA ENTROPY1_ADDR_BASE + ADDR(0x30)
+ #define ENTROPY1_ADDR_ENTROPY ENTROPY1_ADDR_BASE + 0x20
+ #define ENTROPY1_ADDR_DELTA ENTROPY1_ADDR_BASE + 0x30
-#define ENTROPY2_ADDR_BASE SEGMENT_OFFSET_RNGS + (6 * TRNG_CORE_SIZE)
+#define ENTROPY2_ADDR_BASE SEGMENT_OFFSET_RNGS + (0x06 * TRNG_CORE_SIZE)
#define ENTROPY2_ADDR_NAME0 ENTROPY2_ADDR_BASE + ADDR_NAME0
#define ENTROPY2_ADDR_NAME1 ENTROPY2_ADDR_BASE + ADDR_NAME1
#define ENTROPY2_ADDR_VERSION ENTROPY2_ADDR_BASE + ADDR_VERSION
@@@ -223,57 -192,38 +217,80 @@@
#define CSPRNG_ADDR_NAME0 CSPRNG_ADDR_BASE + ADDR_NAME0
#define CSPRNG_ADDR_NAME1 CSPRNG_ADDR_BASE + ADDR_NAME1
#define CSPRNG_ADDR_VERSION CSPRNG_ADDR_BASE + ADDR_VERSION
- #define CSPRNG_ADDR_CTRL CSPRNG_ADDR_BASE + ADDR(0x10)
+ #define CSPRNG_ADDR_CTRL CSPRNG_ADDR_BASE + 0x10
#define CSPRNG_CTRL_ENABLE 1
#define CSPRNG_CTRL_SEED 2
- #define CSPRNG_ADDR_STATUS CSPRNG_ADDR_BASE + ADDR(0x11)
+ #define CSPRNG_ADDR_STATUS CSPRNG_ADDR_BASE + 0x11
#define CSPRNG_STATUS_VALID 1
- #define CSPRNG_ADDR_RANDOM CSPRNG_ADDR_BASE + ADDR(0x20)
- #define CSPRNG_ADDR_NROUNDS CSPRNG_ADDR_BASE + ADDR(0x40)
- #define CSPRNG_ADDR_NBLOCKS_LO CSPRNG_ADDR_BASE + ADDR(0x41)
- #define CSPRNG_ADDR_NBLOCKS_HI CSPRNG_ADDR_BASE + ADDR(0x42)
+ #define CSPRNG_ADDR_RANDOM CSPRNG_ADDR_BASE + 0x20
+ #define CSPRNG_ADDR_NROUNDS CSPRNG_ADDR_BASE + 0x40
+ #define CSPRNG_ADDR_NBLOCKS_LO CSPRNG_ADDR_BASE + 0x41
+ #define CSPRNG_ADDR_NBLOCKS_HI CSPRNG_ADDR_BASE + 0x42
- #define TRNG_NAME0 "trng";
- #define TRNG_NAME1 " ";
- #define TRNG_VERSION "0.50";
++#define TRNG_NAME0 "trng"
++#define TRNG_NAME1 " "
++#define TRNG_VERSION "0.50"
+
+#define AVALANCHE_ENTROPY_NAME0 "extn"
+#define AVALANCHE_ENTROPY_NAME1 "oise"
+#define AVALANCHE_ENTROPY_VERSION "0.10"
+
- #define ROSC_ENTROPY_NAME0 "rosc";
- #define ROSC_ENTROPY_NAME1 " ent";
- #define ROSC_ENTROPY_VERSION "0.10";
++#define ROSC_ENTROPY_NAME0 "rosc"
++#define ROSC_ENTROPY_NAME1 " ent"
++#define ROSC_ENTROPY_VERSION "0.10"
+
- #define CSPRNG_NAME0 "cspr";
- #define CSPRNG_NAME1 "ng ";
- #define CSPRNG_VERSION "0.50";
++#define CSPRNG_NAME0 "cspr"
++#define CSPRNG_NAME1 "ng "
++#define CSPRNG_VERSION "0.50"
+
+
+// -----------------------------------------------------------------
+// MATH segment.
+// -----------------------------------------------------------------
- #define MATH_CORE_SIZE ADDR(0x100)
++#define MATH_CORE_SIZE 0x100
+
+// addresses and codes for the MATH cores */
+#define MODEXP_ADDR_BASE SEGMENT_OFFSET_MATH + (0x00 * MATH_CORE_SIZE)
+#define MODEXP_ADDR_NAME0 MODEXP_ADDR_BASE + ADDR_NAME0
+#define MODEXP_ADDR_NAME1 MODEXP_ADDR_BASE + ADDR_NAME1
+#define MODEXP_ADDR_VERSION MODEXP_ADDR_BASE + ADDR_VERSION
- #define MODEXP_ADDR_CTRL MODEXP_ADDR_BASE + ADDR(0x08)
++#define MODEXP_ADDR_CTRL MODEXP_ADDR_BASE + 0x08
+#define MODEXP_CTRL_INIT 1
+#define MODEXP_CTRL_NEXT 2
- #define MODEXP_ADDR_STATUS MODEXP_ADDR_BASE + ADDR(0x09)
++#define MODEXP_ADDR_STATUS MODEXP_ADDR_BASE + 0x09
+
- #define MODEXP_ADDR_DELAY MODEXP_ADDR_BASE + ADDR(0x13)
++#define MODEXP_ADDR_DELAY MODEXP_ADDR_BASE + 0x13
+#define MODEXP_STATUS_READY 1
+
- #define MODEXP_MODULUS_LENGTH MODEXP_ADDR_BASE + ADDR(0x20)
- #define MODEXP_EXPONENT_LENGTH MODEXP_ADDR_BASE + ADDR(0x21)
++#define MODEXP_MODULUS_LENGTH MODEXP_ADDR_BASE + 0x20
++#define MODEXP_EXPONENT_LENGTH MODEXP_ADDR_BASE + 0x21
++
++#define MODEXP_NAME0 "mode"
++#define MODEXP_NAME1 "xp "
++#define MODEXP_VERSION "0.50"
++
- #define MODEXP_NAME0 "mode";
- #define MODEXP_NAME1 "xp ";
- #define MODEXP_VERSION "0.50";
+ //------------------------------------------------------------------
+ // Test case public functions
+ //------------------------------------------------------------------
+ void tc_set_debug(int onoff);
+ int tc_write(off_t offset, const uint8_t *buf, size_t len);
+ int tc_read(off_t offset, uint8_t *buf, size_t len);
+ int tc_expected(off_t offset, const uint8_t *expected, size_t len);
+ int tc_init(off_t offset);
+ int tc_next(off_t offset);
+ int tc_wait(off_t offset, uint8_t status, int *count);
+ int tc_wait_ready(off_t offset);
+ int tc_wait_valid(off_t offset);
+
+
+ //------------------------------------------------------------------
+ // I2C configuration
+ // Only used in I2C, but not harmful to define for EIM
+ //------------------------------------------------------------------
+ #define I2C_dev "/dev/i2c-2"
+ #define I2C_addr 0x0f
+ #define I2C_SLAVE 0x0703
//======================================================================
diff --cc sw/hash.c
index 2f1afb8,1b7d2cc..ae34ded
--- a/sw/hash.c
+++ b/sw/hash.c
@@@ -47,11 -47,10 +47,10 @@@
#include <sys/ioctl.h>
#include <arpa/inet.h>
#include <ctype.h>
+#include <stdint.h>
#include <assert.h>
- #include "tc_eim.h"
- #include "cryptech_memory_map.h"
+ #include "cryptech.h"
char *usage =
"Usage: %s [-d] [-v] [-q] [algorithm [file]]\n"
diff --cc sw/hash_tester.c
index 6692b14,6ddc09a..3df62d3
--- a/sw/hash_tester.c
+++ b/sw/hash_tester.c
@@@ -231,39 -229,39 +229,26 @@@ const uint8_t SHA512_DOUBLE_DIGEST[]
int TC0()
{
- uint8_t board_name0[4] = "PVT1";
- uint8_t board_name1[4] = " ";
- uint8_t board_version[4] = "0.10";
-
- uint8_t comm_name0[4] = "eim ";
- uint8_t comm_name1[4] = " ";
- uint8_t comm_version[4] = "0.10";
-
+ uint8_t board_name0[4] = NOVENA_BOARD_NAME0;
+ uint8_t board_name1[4] = NOVENA_BOARD_NAME1;
+ uint8_t board_version[4] = NOVENA_BOARD_VERSION;
-
- uint8_t comm_name0[4] = EIM_INTERFACE_NAME0;
- uint8_t comm_name1[4] = EIM_INTERFACE_NAME1;
- uint8_t comm_version[4] = EIM_INTERFACE_VERSION;
-
uint8_t t[4];
if (!quiet)
-- printf("TC0-1: Reading board type, version, and dummy reg from global registers.\n");
++ printf("TC0: Reading board type, version, and dummy reg from global registers.\n");
/* write current time into dummy register, then try to read it back
* to make sure that we can actually write something into EIM
*/
(void)time((time_t *)t);
-- if (tc_write(BOARD_ADDR_DUMMY, (void *)&t, 4) != 0)
++ if (tc_write(BOARD_ADDR_DUMMY, t, 4) != 0)
return 1;
-- if (tc_expected(BOARD_ADDR_NAME0, board_name0, 4) ||
++ return
++ tc_expected(BOARD_ADDR_NAME0, board_name0, 4) ||
tc_expected(BOARD_ADDR_NAME1, board_name1, 4) ||
tc_expected(BOARD_ADDR_VERSION, board_version, 4) ||
-- tc_expected(BOARD_ADDR_DUMMY, (void *)t, 4))
-- return 1;
--
-- if (!quiet)
-- printf("TC0-2: Reading name and version words from communications core.\n");
--
-- return
-- tc_expected(COMM_ADDR_NAME0, comm_name0, 4) ||
-- tc_expected(COMM_ADDR_NAME1, comm_name1, 4) ||
-- tc_expected(COMM_ADDR_VERSION, comm_version, 4);
++ tc_expected(BOARD_ADDR_DUMMY, t, 4);
}
/* ---------------- SHA-1 test cases ---------------- */
@@@ -340,12 -338,12 +325,12 @@@ int TC3(void
/* TC4: Read name and version from SHA-256 core. */
int TC4(void)
{
- uint8_t name0[4] = "sha2";
- uint8_t name1[4] = "-256";
- uint8_t version[4] = "0.80";
+ uint8_t name0[4] = SHA256_NAME0;
+ uint8_t name1[4] = SHA256_NAME1;
+ uint8_t version[4] = SHA256_VERSION;
if (!quiet)
-- printf("TC4: Reading name, type and version words from SHA-256 core.\n");
++ printf("TC4: Reading name and version words from SHA-256 core.\n");
return
tc_expected(SHA256_ADDR_NAME0, name0, 4) ||
@@@ -457,12 -455,12 +442,12 @@@ int TC7(
/* TC8: Read name and version from SHA-512 core. */
int TC8()
{
- uint8_t name0[4] = "sha2";
- uint8_t name1[4] = "-512";
- uint8_t version[4] = "0.80";
+ uint8_t name0[4] = SHA512_NAME0;
+ uint8_t name1[4] = SHA512_NAME1;
+ uint8_t version[4] = SHA512_VERSION;
if (!quiet)
-- printf("TC8: Reading name, type and version words from SHA-512 core.\n");
++ printf("TC8: Reading name and version words from SHA-512 core.\n");
return
tc_expected(SHA512_ADDR_NAME0, name0, 4) ||
diff --cc sw/trng_extractor.c
index 7b3c2ef,f71a5d6..5c373f4
--- a/sw/trng_extractor.c
+++ b/sw/trng_extractor.c
@@@ -40,10 -40,9 +40,9 @@@
#include <stdint.h>
#include <ctype.h>
- #include "tc_i2c.h"
- #include "cryptech_memory_map.h"
+ #include "cryptech.h"
--char *usage =
++char *usage =
"%s [-a|r|c] [-n #] [-o file]\n\
\n\
-a avalanche entropy\n\
@@@ -53,8 -52,6 +52,30 @@@
-o output file (defaults to stdout)\n\
";
- int debug = 0; /* for dump() */
++/* check availability of avalanche entropy core by reading core name and version */
++static int avalanche_check(void)
++{
++ return
++ tc_expected(ENTROPY1_ADDR_NAME0, (const uint8_t *)AVALANCHE_ENTROPY_NAME0, 4) ||
++ tc_expected(ENTROPY1_ADDR_NAME1, (const uint8_t *)AVALANCHE_ENTROPY_NAME1, 4);
++}
++
++/* check availability of rosc core by reading the core name and version */
++static int rosc_check(void)
++{
++ return
++ tc_expected(ENTROPY2_ADDR_NAME0, (const uint8_t *)ROSC_ENTROPY_NAME0, 4) ||
++ tc_expected(ENTROPY2_ADDR_NAME1, (const uint8_t *)ROSC_ENTROPY_NAME1, 4);
++}
++
++/* check availability of csprng core by reading the core name and version */
++static int csprng_check(void)
++{
++ return
++ tc_expected(CSPRNG_ADDR_NAME0, (const uint8_t *)CSPRNG_NAME0, 4) ||
++ tc_expected(CSPRNG_ADDR_NAME1, (const uint8_t *)CSPRNG_NAME1, 4);
++}
+
/* extract one data sample */
static int extract(off_t status_addr, off_t data_addr, uint32_t *data)
{
@@@ -90,6 -79,6 +103,12 @@@ int main(int argc, char *argv[]
FILE *output = stdout;
uint32_t data;
++ // Check that we have can talk to the trng.
++ if (avalanche_check() || rosc_check() || csprng_check()) {
++ fprintf(stderr, "Can't properly access the trng.\n");
++ return EXIT_FAILURE;
++ }
++
/* parse command line */
while ((opt = getopt(argc, argv, "h?arcn:o:")) != -1) {
switch (opt) {
diff --cc sw/trng_tester.c
index 03f55bd,f0b80d0..715a20c
--- a/sw/trng_tester.c
+++ b/sw/trng_tester.c
@@@ -62,39 -61,39 +61,26 @@@ int wait_stats = 0
int TC0()
{
- uint8_t board_name0[4] = NOVENA_BOARD_NAME0;
- uint8_t board_name1[4] = NOVENA_BOARD_NAME1;
- uint8_t board_version[4] = NOVENA_BOARD_VERSION;
- uint8_t board_name0[4] = "PVT1";
- uint8_t board_name1[4] = " ";
- uint8_t board_version[4] = "0.10";
--
- uint8_t comm_name0[4] = EIM_INTERFACE_NAME0;
- uint8_t comm_name1[4] = EIM_INTERFACE_NAME1;
- uint8_t comm_version[4] = EIM_INTERFACE_VERSION;
- uint8_t comm_name0[4] = "eim ";
- uint8_t comm_name1[4] = " ";
- uint8_t comm_version[4] = "0.10";
--
++ uint8_t name0[4] = NOVENA_BOARD_NAME0;
++ uint8_t name1[4] = NOVENA_BOARD_NAME1;
++ uint8_t version[4] = NOVENA_BOARD_VERSION;
uint8_t t[4];
if (!quiet)
-- printf("TC0-1: Reading board type, version, and dummy reg from global registers.\n");
++ printf("TC0: Reading board type, version, and dummy reg from global registers.\n");
/* write current time into dummy register, then try to read it back
* to make sure that we can actually write something into EIM
*/
(void)time((time_t *)t);
-- if (tc_write(BOARD_ADDR_DUMMY, (void *)&t, 4) != 0)
-- return 1;
--
-- if (tc_expected(BOARD_ADDR_NAME0, board_name0, 4) ||
-- tc_expected(BOARD_ADDR_NAME1, board_name1, 4) ||
-- tc_expected(BOARD_ADDR_VERSION, board_version, 4) ||
-- tc_expected(BOARD_ADDR_DUMMY, (void *)t, 4))
++ if (tc_write(BOARD_ADDR_DUMMY, t, 4) != 0)
return 1;
-- if (!quiet)
-- printf("TC0-2: Reading name and version words from communications core.\n");
--
return
-- tc_expected(COMM_ADDR_NAME0, comm_name0, 4) ||
-- tc_expected(COMM_ADDR_NAME1, comm_name1, 4) ||
-- tc_expected(COMM_ADDR_VERSION, comm_version, 4);
++ tc_expected(BOARD_ADDR_NAME0, name0, 4) ||
++ tc_expected(BOARD_ADDR_NAME1, name1, 4) ||
++ tc_expected(BOARD_ADDR_VERSION, version, 4) ||
++ tc_expected(BOARD_ADDR_DUMMY, t, 4);
}
/* ---------------- trng test cases ---------------- */
@@@ -102,9 -101,9 +88,9 @@@
/* TC1: Read name and version from trng core. */
int TC1(void)
{
-- uint8_t name0[4] = "trng";
-- uint8_t name1[4] = " ";
-- uint8_t version[4] = "0.01";
++ uint8_t name0[4] = TRNG_NAME0;
++ uint8_t name1[4] = TRNG_NAME1;
++ uint8_t version[4] = TRNG_VERSION;
if (!quiet)
printf("TC1: Reading name and version words from trng core.\n");
@@@ -221,8 -220,8 +207,17 @@@ int TC5(void
/* TC6: Read name and version from trng_csprng core. */
int TC6(void)
{
-- /* XXX csprng core currently doesn't have name/version registers */
-- return 0;
++ uint8_t name0[4] = CSPRNG_NAME0;
++ uint8_t name1[4] = CSPRNG_NAME1;
++ uint8_t version[4] = CSPRNG_VERSION;
++
++ if (!quiet)
++ printf("TC6: Reading name and version words from trng_csprng core.\n");
++
++ return
++ tc_expected(CSPRNG_ADDR_NAME0, name0, 4) ||
++ tc_expected(CSPRNG_ADDR_NAME1, name1, 4) ||
++ tc_expected(CSPRNG_ADDR_VERSION, version, 4);
}
/* XXX clear 'enable' control bit, see if we read the same value */
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